/**
* Lower a Sel node. Do not touch Sels accessing entities on the frame type.
*/
-static void lower_sel(ir_node *sel) {
+static void lower_sel(ir_node *sel)
+{
ir_graph *irg = current_ir_graph;
ir_entity *ent;
ir_node *newn, *cnst, *index, *ptr, *bl;
int offset;
/* replace Sel by add(obj, const(ent.offset)) */
- assert(!(get_entity_allocation(ent) == allocation_static &&
- (get_entity_n_overwrites(ent) == 0 && get_entity_n_overwrittenby(ent) == 0)));
newn = get_Sel_ptr(sel);
offset = get_entity_offset(ent);
if (offset != 0) {
/**
* Lower a all possible SymConst nodes.
*/
-static void lower_symconst(ir_node *symc) {
+static void lower_symconst(ir_node *symc)
+{
ir_node *newn;
ir_type *tp;
ir_entity *ent;
hook_lower(symc);
exchange(symc, newn);
break;
- case symconst_addr_name:
- /* do not rewrite - pass info to back end */
- break;
case symconst_addr_ent:
/* leave */
break;
*
* @param size the size on bits
*/
-static int is_integral_size(int size) {
+static int is_integral_size(int size)
+{
/* must be a 2^n */
if (size & (size-1))
return 0;
* @param proj the Proj(result) node
* @param load the Load node
*/
-static void lower_bitfields_loads(ir_node *proj, ir_node *load) {
+static void lower_bitfields_loads(ir_node *proj, ir_node *load)
+{
ir_node *sel = get_Load_ptr(load);
ir_node *block, *n_proj, *res, *ptr;
ir_entity *ent;
*
* @todo: It adds a load which may produce an exception!
*/
-static void lower_bitfields_stores(ir_node *store) {
+static void lower_bitfields_stores(ir_node *store)
+{
ir_node *sel = get_Store_ptr(store);
ir_node *ptr, *value;
ir_entity *ent;
/**
* Lowers unaligned Loads.
*/
-static void lower_unaligned_Load(ir_node *load) {
+static void lower_unaligned_Load(ir_node *load)
+{
(void) load;
/* NYI */
}
/**
* Lowers unaligned Stores
*/
-static void lower_unaligned_Store(ir_node *store) {
+static void lower_unaligned_Store(ir_node *store)
+{
(void) store;
/* NYI */
}
/**
* lowers IR-nodes, called from walker
*/
-static void lower_irnode(ir_node *irn, void *env) {
+static void lower_irnode(ir_node *irn, void *env)
+{
(void) env;
switch (get_irn_opcode(irn)) {
case iro_Sel:
default:
break;
}
-} /* lower_irnode */
+}
/**
* Walker: lowers IR-nodes for bitfield access
*/
-static void lower_bf_access(ir_node *irn, void *env) {
+static void lower_bf_access(ir_node *irn, void *env)
+{
(void) env;
switch (get_irn_opcode(irn)) {
case iro_Proj:
default:
break;
}
-} /* lower_bf_access */
+}
/*
* Replaces SymConsts by a real constant if possible.
* Replace Sel nodes by address computation. Also resolves array access.
* Handle Bitfields by added And/Or calculations.
*/
-void lower_highlevel_graph(ir_graph *irg, int lower_bitfields) {
-
+void lower_highlevel_graph(ir_graph *irg, int lower_bitfields)
+{
if (lower_bitfields) {
/* First step: lower bitfield access: must be run as long as Sels still
* exists. */
/* Finally: lower SymConst-Size and Sel nodes, Casts, unaligned Load/Stores. */
irg_walk_graph(irg, NULL, lower_irnode, NULL);
-} /* lower_highlevel_graph */
+
+ set_irg_outs_inconsistent(irg);
+}
struct pass_t {
ir_graph_pass_t pass;
/**
* Wrapper for running lower_highlevel_graph() as an ir_graph pass.
*/
-static int lower_highlevel_graph_wrapper(ir_graph *irg, void *context) {
+static int lower_highlevel_graph_wrapper(ir_graph *irg, void *context)
+{
struct pass_t *pass = context;
lower_highlevel_graph(irg, pass->lower_bitfields);
return 0;
} /* lower_highlevel_graph_wrapper */
-ir_graph_pass_t *lower_highlevel_graph_pass(const char *name, int lower_bitfields) {
+ir_graph_pass_t *lower_highlevel_graph_pass(const char *name, int lower_bitfields)
+{
struct pass_t *pass = XMALLOCZ(struct pass_t);
pass->lower_bitfields = lower_bitfields;
/*
* does the same as lower_highlevel() for all nodes on the const code irg
*/
-void lower_const_code(void) {
+void lower_const_code(void)
+{
walk_const_code(NULL, lower_irnode, NULL);
} /* lower_const_code */
-ir_prog_pass_t *lower_const_code_pass(const char *name) {
+ir_prog_pass_t *lower_const_code_pass(const char *name)
+{
return def_prog_pass(name ? name : "lower_const_code", lower_const_code);
}
* Replace Sel nodes by address computation. Also resolves array access.
* Handle Bitfields by added And/Or calculations.
*/
-void lower_highlevel(int lower_bitfields) {
+void lower_highlevel(int lower_bitfields)
+{
int i, n;
n = get_irp_n_irgs();