fixed new_tarval_from_long() (added missing sign extend), classify_tarval(), unsigned...

[libfirm] / ir / lower / lower_hl.c

diff --git a/ir/lower/lower_hl.c b/ir/lower/lower_hl.c
index da09af0..09eb960 100644 (file)
--- a/ir/lower/lower_hl.c
+++ b/ir/lower/lower_hl.c
@@ -27,19 +27,19 @@
 # include "config.h"
 #endif
 
+#include "lowering.h"
 #include "irmode_t.h"
 #include "irnode_t.h"
 #include "entity_t.h"
 #include "typerep.h"
 #include "irprog_t.h"
 #include "ircons.h"
-#include "lower_hl.h"
 #include "irhooks.h"
 #include "irgmod.h"
 #include "irgwalk.h"
 
 /**
- * Lower a Sel node. Do not touch Sels accessing entities on teh frame type.
+ * Lower a Sel node. Do not touch Sels accessing entities on the frame type.
  */
 static void lower_sel(ir_node *sel) {
        ir_graph *irg = current_ir_graph;
@@ -307,7 +307,10 @@ static void lower_symconst(ir_node *symc) {
                /* run the hooks */
                hook_lower(symc);
                exchange(symc, newn);
-       break;
+               break;
+       case symconst_label:
+               /* leave */
+               break;
 
        default:
                assert(!"unknown SymConst kind");
@@ -355,15 +358,14 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) {
        if (! bf_mode)
                return;
 
+       mode       = get_irn_mode(proj);
+       block      = get_nodes_block(proj);
        bf_bits    = get_mode_size_bits(bf_mode);
        bit_offset = get_entity_offset_bits_remainder(ent);
-       if (bit_offset == 0 && is_integral_size(bf_bits))
-               return;
 
-       mode   = get_irn_mode(proj);
        bits   = get_mode_size_bits(mode);
        offset = get_entity_offset(ent);
-       block  = get_nodes_block(proj);
+  bit_offset += 8 * offset;
 
        /*
         * ok, here we are: now convert the Proj_mode_bf(Load) into And(Shr(Proj_mode(Load)) for unsigned
@@ -373,7 +375,6 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) {
        /* abandon bitfield sel */
        ptr = get_Sel_ptr(sel);
        db  = get_irn_dbg_info(sel);
-       ptr = new_rd_Add(db, current_ir_graph, block, ptr, new_Const_long(mode_Is, offset), get_irn_mode(ptr));
 
        set_Load_ptr(load, ptr);
        set_Load_mode(load, mode);
@@ -443,21 +444,19 @@ static void lower_bitfields_stores(ir_node *store) {
        if (! bf_mode)
                return;
 
+       value      = get_Store_value(store);
+       mode       = get_irn_mode(value);
+       block      = get_nodes_block(store);
+
        bf_bits    = get_mode_size_bits(bf_mode);
        bit_offset = get_entity_offset_bits_remainder(ent);
-       if (bit_offset == 0 && is_integral_size(bf_bits))
-               return;
-
-       value = get_Store_value(store);
-       mode  = get_irn_mode(value);
 
        /*
         * ok, here we are: now convert the Store(Sel(), value) into Or(And(Load(Sel),c), And(Value,c))
         */
        mem        = get_Store_mem(store);
-       block      = get_nodes_block(store);
-       bit_offset = get_entity_offset_bits_remainder(ent);
        offset     = get_entity_offset(ent);
+  bit_offset += 8 * offset;
 
        bits_mask = get_mode_size_bits(mode) - bf_bits;
        mask = ((unsigned)-1) >> bits_mask;
@@ -467,7 +466,6 @@ static void lower_bitfields_stores(ir_node *store) {
        /* abandon bitfield sel */
        ptr = get_Sel_ptr(sel);
        db  = get_irn_dbg_info(sel);
-       ptr = new_rd_Add(db, current_ir_graph, block, ptr, new_Const_long(mode_Is, offset), get_irn_mode(ptr));
 
        if (neg_mask) {
                /* there are some bits, normal case */
@@ -498,6 +496,7 @@ static void lower_bitfields_stores(ir_node *store) {
  * lowers IR-nodes, called from walker
  */
 static void lower_irnode(ir_node *irn, void *env) {
+       (void) env;
        switch (get_irn_opcode(irn)) {
        case iro_Sel:
                lower_sel(irn);
@@ -514,6 +513,7 @@ static void lower_irnode(ir_node *irn, void *env) {
  * Walker: lowers IR-nodes for bitfield access
  */
 static void lower_bf_access(ir_node *irn, void *env) {
+       (void) env;
        switch (get_irn_opcode(irn)) {
        case iro_Proj:
        {
@@ -547,10 +547,10 @@ void lower_highlevel(void) {
                ir_graph *irg = get_irp_irg(i);
 
                /* First step: lower bitfield access: must be run as long as Sels still exists. */
-               irg_walk_graph(irg, lower_bf_access, NULL, NULL);
+               irg_walk_graph(irg, NULL, lower_bf_access, NULL);
 
                /* Finally: lower SymConst-Size and Sel nodes. */
-               irg_walk_graph(irg, lower_irnode, NULL, NULL);
+               irg_walk_graph(irg, NULL, lower_irnode, NULL);
 
                set_irg_phase_low(irg);
        }