-/**
- * @file irlwrdw.c
- * @date 8.10.2004
- * @author Michael Beck
- * @brief Lower Double word operations, ie Mode L -> I.
- *
- * $Id$
+/*
+ * Project: libFIRM
+ * File name: ir/lower/lower_dw.c
+ * Purpose: Lower Double word operations, ie Mode L -> I.
+ * Author: Michael Beck
+ * Created: 8.10.2004
+ * CVS-ID: $Id$
+ * Copyright: (c) 1998-2006 Universität Karlsruhe
+ * Licence: This file protected by GPL - GNU GENERAL PUBLIC LICENSE.
*/
#ifdef HAVE_CONFIG_H
# include "config.h"
static pmap *lowered_type;
/** The types for the binop and unop intrinsics. */
-static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *tp_s, *tp_u;
+static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
/** the debug handle */
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
typedef struct _lower_env_t {
node_entry_t **entries; /**< entries per node */
struct obstack obst; /**< an obstack holding the temporary data */
- tarval *tv_mode_bytes; /**< a tarval containing the number of bits in the lowered modes */
+ tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
+ tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
const lwrdw_param_t *params; /**< transformation parameter */
pmap_insert(prim_types, mode, tp);
return tp;
-}
+} /* get_primitive_type */
/**
* Create a method type for a Conv emulation from imode to omode.
if (imode == env->params->high_signed) {
set_method_param_type(mtd, n_param++, tp_s);
set_method_param_type(mtd, n_param++, tp_s);
- }
- else if (imode == env->params->high_unsigned) {
+ } else if (imode == env->params->high_unsigned) {
set_method_param_type(mtd, n_param++, tp_u);
set_method_param_type(mtd, n_param++, tp_u);
- }
- else {
+ } else {
ir_type *tp = get_primitive_type(imode);
set_method_param_type(mtd, n_param++, tp);
- }
+ } /* if */
n_res = 0;
if (omode == env->params->high_signed) {
set_method_res_type(mtd, n_res++, tp_s);
set_method_res_type(mtd, n_res++, tp_s);
- }
- else if (omode == env->params->high_unsigned) {
+ } else if (omode == env->params->high_unsigned) {
set_method_res_type(mtd, n_res++, tp_u);
set_method_res_type(mtd, n_res++, tp_u);
- }
- else {
+ } else {
ir_type *tp = get_primitive_type(omode);
set_method_res_type(mtd, n_res++, tp);
- }
-
+ } /* if */
entry->mtd = mtd;
- }
- else
+ } else {
mtd = entry->mtd;
+ } /* if */
return mtd;
-}
+} /* get_conv_type */
/**
* Add an additional control flow input to a block.
in[i] = get_irn_n(phi, i);
in[i] = in[nr];
set_irn_in(phi, i + 1, in);
- }
-}
+ } /* for */
+} /* add_block_cf_input_nr */
/**
* Add an additional control flow input to a block.
if (get_irn_n(block, i) == tmpl) {
nr = i;
break;
- }
- }
+ } /* if */
+ } /* for */
assert(i < arity);
add_block_cf_input_nr(block, nr, cf);
-}
+} /* add_block_cf_input */
/**
* Return the "operational" mode of a Firm node.
switch (get_irn_opcode(node)) {
case iro_Load:
return get_Load_mode(node);
-
case iro_Store:
return get_irn_mode(get_Store_value(node));
-
case iro_DivMod:
return get_irn_mode(get_DivMod_left(node));
-
case iro_Div:
return get_irn_mode(get_Div_left(node));
-
case iro_Mod:
return get_irn_mode(get_Mod_left(node));
-
case iro_Cmp:
return get_irn_mode(get_Cmp_left(node));
-
default:
return get_irn_mode(node);
- }
-}
+ } /* switch */
+} /* get_irn_op_mode */
/**
- * walker, prepare the node links
+ * Walker, prepare the node links.
*/
static void prepare_links(ir_node *node, void *env)
{
lenv->entries[get_irn_idx(node)] = link;
lenv->flags |= MUST_BE_LOWERED;
- }
- else if (get_irn_op(node) == op_Conv) {
+ } else if (get_irn_op(node) == op_Conv) {
/* Conv nodes have two modes */
ir_node *pred = get_Conv_op(node);
mode = get_irn_mode(pred);
if (mode == lenv->params->high_signed ||
mode == lenv->params->high_unsigned) {
- /* must lower this node either */
- link = obstack_alloc(&lenv->obst, sizeof(*link));
-
- memset(link, 0, sizeof(*link));
-
- lenv->entries[get_irn_idx(node)] = link;
+ /* must lower this node either but don't need a link */
lenv->flags |= MUST_BE_LOWERED;
- }
+ } /* if */
return;
- }
+ } /* if */
if (is_Proj(node)) {
/* link all Proj nodes to its predecessor:
set_irn_link(node, get_irn_link(pred));
set_irn_link(pred, node);
- }
- else if (is_Phi(node)) {
+ } else if (is_Phi(node)) {
/* link all Phi nodes to its block */
ir_node *block = get_nodes_block(node);
set_irn_link(node, get_irn_link(block));
set_irn_link(block, node);
- }
- else if (is_Block(node)) {
+ } else if (is_Block(node)) {
/* fill the Proj -> Block map */
for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
ir_node *pred = get_Block_cfgpred(node, i);
if (is_Proj(pred))
pmap_insert(lenv->proj_2_block, pred, node);
- }
- }
-}
+ } /* for */
+ } /* if */
+} /* prepare_links */
/**
* Translate a Constant: create two.
dbg_info *dbg = get_irn_dbg_info(node);
ir_node *block = get_nodes_block(node);
int idx;
+ ir_graph *irg = current_ir_graph;
tv = get_Const_tarval(node);
tv_l = tarval_convert_to(tv, mode);
- low = new_rd_Const(dbg, current_ir_graph, block, mode, tv_l);
+ low = new_rd_Const(dbg, irg, block, mode, tv_l);
- tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bytes), mode);
- high = new_rd_Const(dbg, current_ir_graph, block, mode, tv_h);
+ tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
+ high = new_rd_Const(dbg, irg, block, mode, tv_h);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
env->entries[idx]->low_word = low;
env->entries[idx]->high_word = high;
-}
+} /* lower_Const */
/**
* Translate a Load: create two.
high = new_r_Add(irg, block, adr,
new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
get_irn_mode(adr));
- }
- else {
+ } else {
low = new_r_Add(irg, block, adr,
new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
get_irn_mode(adr));
high = adr;
- }
+ } /* if */
/* create two loads */
dbg = get_irn_dbg_info(node);
break;
default:
assert(0 && "unexpected Proj number");
- }
+ } /* switch */
/* mark this proj: we have handled it already, otherwise we might fall into
* out new nodes. */
mark_irn_visited(proj);
- }
-}
+ } /* for */
+} /* lower_Load */
/**
* Translate a Store: create two.
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
irg = current_ir_graph;
adr = get_Store_ptr(node);
high = new_r_Add(irg, block, adr,
new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
get_irn_mode(adr));
- }
- else {
+ } else {
low = new_r_Add(irg, block, adr,
new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
get_irn_mode(adr));
high = adr;
- }
+ } /* if */
/* create two Stores */
dbg = get_irn_dbg_info(node);
break;
default:
assert(0 && "unexpected Proj number");
- }
+ } /* switch */
/* mark this proj: we have handled it already, otherwise we might fall into
* out new nodes. */
mark_irn_visited(proj);
- }
-}
+ } /* for */
+} /* lower_Store */
/**
* Return a node containing the address of the intrinsic emulation function.
assert(ent && "Intrinsic creator must return an entity");
entry->ent = ent;
- }
- else
+ } else {
ent = entry->ent;
-
+ } /* if */
sym.entity_p = ent;
return new_r_SymConst(current_ir_graph, block, sym, symconst_addr_ent);
-}
+} /* get_intrinsic_address */
/**
* Translate a Div.
dbg_info *dbg;
ir_type *mtp;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_Div_left(node);
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[0] = entry->low_word;
in[1] = entry->high_word;
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[2] = entry->low_word;
in[3] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
- call = new_rd_Call(dbg, current_ir_graph, block, get_Div_mem(node),
+ call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
irn, 4, in, mtp);
set_irn_pinned(call, get_irn_pinned(node));
- irn = new_r_Proj(current_ir_graph, block, call, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
switch (get_Proj_proj(proj)) {
break;
default:
assert(0 && "unexpected Proj number");
- }
+ } /* switch */
/* mark this proj: we have handled it already, otherwise we might fall into
* out new nodes. */
mark_irn_visited(proj);
- }
-}
+ } /* for */
+} /* lower_Div */
/**
* Translate a Mod.
dbg_info *dbg;
ir_type *mtp;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_Mod_left(node);
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[0] = entry->low_word;
in[1] = entry->high_word;
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[2] = entry->low_word;
in[3] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
- call = new_rd_Call(dbg, current_ir_graph, block, get_Mod_mem(node),
+ call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
irn, 4, in, mtp);
set_irn_pinned(call, get_irn_pinned(node));
- irn = new_r_Proj(current_ir_graph, block, call, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
switch (get_Proj_proj(proj)) {
case pn_Mod_res: /* Result of computation. */
idx = get_irn_idx(proj);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
break;
default:
assert(0 && "unexpected Proj number");
- }
+ } /* switch */
/* mark this proj: we have handled it already, otherwise we might fall into
* out new nodes. */
mark_irn_visited(proj);
- }
-}
+ } /* for */
+} /* lower_Mod */
/**
* Translate a DivMod.
int idx;
node_entry_t *entry;
unsigned flags = 0;
+ ir_graph *irg;
/* check if both results are needed */
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
case pn_DivMod_res_div: flags |= 1; break;
case pn_DivMod_res_mod: flags |= 2; break;
default: break;
- }
- }
+ } /* switch */
+ } /* for */
irn = get_DivMod_left(node);
entry = env->entries[get_irn_idx(irn)];
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[0] = entry->low_word;
in[1] = entry->high_word;
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[2] = entry->low_word;
in[3] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mem = get_DivMod_mem(node);
if (flags & 1) {
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
- callDiv = new_rd_Call(dbg, current_ir_graph, block, mem,
+ callDiv = new_rd_Call(dbg, irg, block, mem,
irn, 4, in, mtp);
set_irn_pinned(callDiv, get_irn_pinned(node));
- resDiv = new_r_Proj(current_ir_graph, block, callDiv, mode_T, pn_Call_T_result);
- }
+ resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
+ } /* if */
if (flags & 2) {
if (flags & 1)
- mem = new_r_Proj(current_ir_graph, block, callDiv, mode_M, pn_Call_M);
+ mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
- callMod = new_rd_Call(dbg, current_ir_graph, block, mem,
+ callMod = new_rd_Call(dbg, irg, block, mem,
irn, 4, in, mtp);
set_irn_pinned(callMod, get_irn_pinned(node));
- resMod = new_r_Proj(current_ir_graph, block, callMod, mode_T, pn_Call_T_result);
- }
+ resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
+ } /* if */
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
switch (get_Proj_proj(proj)) {
case pn_DivMod_res_div: /* Result of Div. */
idx = get_irn_idx(proj);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, resDiv, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, resDiv, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
break;
case pn_DivMod_res_mod: /* Result of Mod. */
idx = get_irn_idx(proj);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, resMod, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, resMod, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
break;
default:
assert(0 && "unexpected Proj number");
- }
+ } /* switch */
/* mark this proj: we have handled it already, otherwise we might fall into
* out new nodes. */
mark_irn_visited(proj);
- }
-}
+ } /* for */
+} /* lower_DivMod */
/**
* Translate a Binop.
dbg_info *dbg;
ir_type *mtp;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_binop_left(node);
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[0] = entry->low_word;
in[1] = entry->high_word;
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[2] = entry->low_word;
in[3] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
- irn = new_rd_Call(dbg, current_ir_graph, block, get_irg_no_mem(current_ir_graph),
+ irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
irn, 4, in, mtp);
set_irn_pinned(irn, get_irn_pinned(node));
- irn = new_r_Proj(current_ir_graph, block, irn, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
-}
+ env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
+} /* lower_Binop */
+
+/**
+ * Translate a Shiftop.
+ *
+ * Create an intrinsic Call.
+ */
+static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *block, *irn;
+ ir_node *in[3];
+ dbg_info *dbg;
+ ir_type *mtp;
+ int idx;
+ ir_graph *irg;
+ node_entry_t *entry;
+
+ irn = get_binop_left(node);
+ entry = env->entries[get_irn_idx(irn)];
+ assert(entry);
+
+ if (! entry->low_word) {
+ /* not ready yet, wait */
+ pdeq_putr(env->waitq, node);
+ return;
+ } /* if */
+
+ in[0] = entry->low_word;
+ in[1] = entry->high_word;
+
+ /* The shift count is always mode_Iu in firm, so there is no need for lowering */
+ in[2] = get_binop_right(node);
+
+ dbg = get_irn_dbg_info(node);
+ block = get_nodes_block(node);
+ irg = current_ir_graph;
+
+ mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
+ irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
+ irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
+ irn, 3, in, mtp);
+ set_irn_pinned(irn, get_irn_pinned(node));
+ irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
+
+ idx = get_irn_idx(node);
+ assert(idx < env->n_entries);
+ env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
+} /* lower_Shiftop */
+
+/**
+ * Translate a Shr and handle special cases.
+ */
+static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *right = get_Shr_right(node);
+ ir_graph *irg = current_ir_graph;
+
+ if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
+ tarval *tv = get_Const_tarval(right);
+
+ if (tarval_is_long(tv) &&
+ get_tarval_long(tv) >= get_mode_size_bits(mode)) {
+ ir_node *block = get_nodes_block(node);
+ ir_node *left = get_Shr_left(node);
+ ir_node *c;
+ long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
+ int idx = get_irn_idx(left);
+
+ left = env->entries[idx]->high_word;
+ idx = get_irn_idx(node);
+
+ if (shf_cnt > 0) {
+ c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
+ env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
+ } else {
+ env->entries[idx]->low_word = left;
+ } /* if */
+ env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
+
+ return;
+ } /* if */
+ } /* if */
+ lower_Shiftop(node, mode, env);
+} /* lower_Shr */
+
+/**
+ * Translate a Shl and handle special cases.
+ */
+static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *right = get_Shl_right(node);
+ ir_graph *irg = current_ir_graph;
+
+ if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
+ tarval *tv = get_Const_tarval(right);
+
+ if (tarval_is_long(tv) &&
+ get_tarval_long(tv) >= get_mode_size_bits(mode)) {
+ ir_node *block = get_nodes_block(node);
+ ir_node *left = get_Shl_left(node);
+ ir_node *c;
+ long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
+ int idx = get_irn_idx(left);
+
+ left = env->entries[idx]->low_word;
+ idx = get_irn_idx(node);
+
+ if (shf_cnt > 0) {
+ c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
+ env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
+ } else {
+ env->entries[idx]->high_word = left;
+ } /* if */
+ env->entries[idx]->low_word = new_r_Const(irg, block, mode, get_mode_null(mode));
+
+ return;
+ } /* if */
+ } /* if */
+ lower_Shiftop(node, mode, env);
+} /* lower_Shl */
+
+/**
+ * Translate a Shrs and handle special cases.
+ */
+static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *right = get_Shrs_right(node);
+ ir_graph *irg = current_ir_graph;
+
+ if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
+ tarval *tv = get_Const_tarval(right);
+
+ if (tarval_is_long(tv) &&
+ get_tarval_long(tv) >= get_mode_size_bits(mode)) {
+ ir_node *block = get_nodes_block(node);
+ ir_node *left = get_Shrs_left(node);
+ long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
+ ir_node *c;
+ int idx = get_irn_idx(left);
+
+ left = env->entries[idx]->high_word;
+ idx = get_irn_idx(node);
+
+ if (shf_cnt > 0) {
+ c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
+ env->entries[idx]->low_word = new_r_Shrs(irg, block, left, c, mode);
+ } else {
+ env->entries[idx]->low_word = left;
+ } /* if */
+ c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
+ env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
+
+ return;
+ } /* if */
+ } /* if */
+ lower_Shiftop(node, mode, env);
+} /* lower_Shrs */
+
+/**
+ * Translate a Rot and handle special cases.
+ */
+static void lower_Rot(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *right = get_Rot_right(node);
+
+ if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
+ tarval *tv = get_Const_tarval(right);
+
+ if (tarval_is_long(tv) &&
+ get_tarval_long(tv) == get_mode_size_bits(mode)) {
+ ir_node *left = get_Rot_left(node);
+ ir_node *h, *l;
+ int idx = get_irn_idx(left);
+
+ l = env->entries[idx]->low_word;
+ h = env->entries[idx]->high_word;
+ idx = get_irn_idx(node);
+
+ env->entries[idx]->low_word = h;
+ env->entries[idx]->high_word = l;
+
+ return;
+ } /* if */
+ } /* if */
+ lower_Shiftop(node, mode, env);
+} /* lower_Rot */
/**
* Translate an Unop.
dbg_info *dbg;
ir_type *mtp;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_unop_op(node);
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
in[0] = entry->low_word;
in[1] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
- irn = new_rd_Call(dbg, current_ir_graph, block, get_irg_no_mem(current_ir_graph),
+ irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
irn, 2, in, mtp);
set_irn_pinned(irn, get_irn_pinned(node));
- irn = new_r_Proj(current_ir_graph, block, irn, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
-}
+ env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
+} /* lower_Unop */
/**
* Translate a logical Binop.
ir_node *lop_l, *lop_h, *rop_l, *rop_h;
dbg_info *dbg;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_binop_left(node);
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
lop_l = entry->low_word;
lop_h = entry->high_word;
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
rop_l = entry->low_word;
rop_h = entry->high_word;
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = constr_rd(dbg, current_ir_graph, block, lop_l, rop_l, mode);
- env->entries[idx]->high_word = constr_rd(dbg, current_ir_graph, block, lop_h, rop_h, mode);
-}
+ irg = current_ir_graph;
+ env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, mode);
+ env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
+} /* lower_Binop_logical */
/** create a logical operation tranformation */
#define lower_logical(op) \
ir_node *op_l, *op_h;
dbg_info *dbg;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_Not_op(node);
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
op_l = entry->low_word;
op_h = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
idx = get_irn_idx(node);
assert(idx < env->n_entries);
env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, mode);
env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
-}
+} /* lower_Not */
/**
* Translate a Cond.
idx = get_irn_idx(left);
lentry = env->entries[idx];
- if (! lentry)
+ if (! lentry) {
/* a normal Cmp */
return;
+ } /* if */
right = get_Cmp_right(cmp);
idx = get_irn_idx(right);
/* not yet ready */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
/* all right, build the code */
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
if (proj_nr == pn_Cond_true) {
assert(projT == NULL && "more than one Proj(true)");
projT = proj;
- }
- else {
+ } else {
assert(proj_nr == pn_Cond_false);
assert(projF == NULL && "more than one Proj(false)");
projF = proj;
- }
+ } /* if */
mark_irn_visited(proj);
- }
+ } /* for */
assert(projT && projF);
/* create a new high compare */
proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
mark_irn_visited(proj);
exchange(projT, proj);
- }
- else if (pnc == pn_Cmp_Lg) {
+ } else if (pnc == pn_Cmp_Lg) {
/* simple case:a != b <==> a_h != b_h || a_l != b_l */
pmap_entry *entry = pmap_find(env->proj_2_block, projT);
proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
mark_irn_visited(proj);
exchange(projF, proj);
- }
- else {
+ } else {
/* a rel b <==> a_h rel b_h || (a_h == b_h && a_l rel b_l) */
ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
pmap_entry *entry;
proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
mark_irn_visited(proj);
add_block_cf_input(dstF, projF, proj);
- }
+ } /* if */
/* we have changed the control flow */
env->flags |= CF_CHANGED;
- }
- else {
+ } else {
idx = get_irn_idx(sel);
if (env->entries[idx]) {
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
set_Cond_selector(node, env->entries[idx]->low_word);
- }
- }
-}
+ } /* if */
+ } /* if */
+} /* lower_Cond */
/**
* Translate a Conv to higher_signed
assert(idx < env->n_entries);
if (mode_is_int(imode) || mode_is_reference(imode)) {
- /* simple case: create a high word */
- if (imode != dst_mode)
- op = new_rd_Conv(dbg, irg, block, op, dst_mode);
+ if (imode == env->params->high_unsigned) {
+ /* a Conv from Lu to Ls */
+ int op_idx = get_irn_idx(op);
- env->entries[idx]->low_word = op;
- env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
- new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
- }
- else {
+ if (! env->entries[op_idx]->low_word) {
+ /* not ready yet, wait */
+ pdeq_putr(env->waitq, node);
+ return;
+ } /* if */
+ env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
+ env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
+ } else {
+ /* simple case: create a high word */
+ if (imode != dst_mode)
+ op = new_rd_Conv(dbg, irg, block, op, dst_mode);
+
+ env->entries[idx]->low_word = op;
+ env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
+ new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
+ } /* if */
+ } else {
ir_node *irn, *call;
ir_mode *omode = env->params->high_signed;
ir_type *mtp = get_conv_type(imode, omode, env);
env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
- }
-}
+ } /* if */
+} /* lower_Conv_to_Ls */
/**
* Translate a Conv to higher_unsigned
*/
static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
ir_node *op = get_Conv_op(node);
- ir_mode *imode = get_irn_mode(op);
+ ir_mode *imode = get_irn_mode(op);
ir_mode *dst_mode = env->params->low_unsigned;
int idx = get_irn_idx(node);
ir_graph *irg = current_ir_graph;
assert(idx < env->n_entries);
if (mode_is_int(imode) || mode_is_reference(imode)) {
- /* simple case: create a high word */
- if (imode != dst_mode)
- op = new_rd_Conv(dbg, irg, block, op, dst_mode);
+ if (imode == env->params->high_signed) {
+ /* a Conv from Ls to Lu */
+ int op_idx = get_irn_idx(op);
- env->entries[idx]->low_word = op;
- env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
- }
- else {
+ if (! env->entries[op_idx]->low_word) {
+ /* not ready yet, wait */
+ pdeq_putr(env->waitq, node);
+ return;
+ } /* if */
+ env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
+ env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
+ } else {
+ /* simple case: create a high word */
+ if (imode != dst_mode)
+ op = new_rd_Conv(dbg, irg, block, op, dst_mode);
+
+ env->entries[idx]->low_word = op;
+ env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
+ } /* if */
+ } else {
ir_node *irn, *call;
ir_mode *omode = env->params->high_unsigned;
ir_type *mtp = get_conv_type(imode, omode, env);
+ /* do an intrinsic call */
irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
set_irn_pinned(call, get_irn_pinned(node));
env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
- }
-}
+ } /* if */
+} /* lower_Conv_to_Lu */
/**
* Translate a Conv from higher_signed
op = new_rd_Conv(dbg, irg, block, op, omode);
set_Conv_op(node, op);
- }
- else {
+ } else {
ir_node *irn, *call, *in[2];
ir_mode *imode = env->params->high_signed;
ir_type *mtp = get_conv_type(imode, omode, env);
irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
exchange(node, new_r_Proj(irg, block, irn, omode, 0));
- }
-}
+ } /* if */
+} /* lower_Conv_from_Ls */
/**
* Translate a Conv from higher_unsigned
op = new_rd_Conv(dbg, irg, block, op, omode);
set_Conv_op(node, op);
- }
- else {
+ } else {
ir_node *irn, *call, *in[2];
ir_mode *imode = env->params->high_unsigned;
ir_type *mtp = get_conv_type(imode, omode, env);
irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
exchange(node, new_r_Proj(irg, block, irn, omode, 0));
- }
-}
+ } /* if */
+} /* lower_Conv_from_Lu */
/**
* Translate a Conv.
static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
mode = get_irn_mode(node);
- if (mode == env->params->high_signed)
+ if (mode == env->params->high_signed) {
lower_Conv_to_Ls(node, env);
- else if (mode == env->params->high_unsigned)
+ } else if (mode == env->params->high_unsigned) {
lower_Conv_to_Lu(node, env);
- else {
+ } else {
ir_mode *mode = get_irn_mode(get_Conv_op(node));
- if (mode == env->params->high_signed)
+ if (mode == env->params->high_signed) {
lower_Conv_from_Ls(node, env);
- else {
- assert(mode == env->params->high_unsigned);
+ } else if (mode == env->params->high_unsigned) {
lower_Conv_from_Lu(node, env);
- }
- }
-}
+ } /* if */
+ } /* if */
+} /* lower_Conv */
/**
* Lower the method type.
if (mode == env->params->high_signed ||
mode == env->params->high_unsigned)
++n_param;
- }
- }
+ } /* if */
+ } /* for */
/* count new number of results */
n_res = r = get_method_n_ress(mtp);
if (mode == env->params->high_signed ||
mode == env->params->high_unsigned)
++n_res;
- }
- }
+ } /* if */
+ } /* for */
id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
res = new_type_method(id, n_param, n_res);
if (mode == env->params->high_signed) {
set_method_param_type(res, n_param++, tp_s);
set_method_param_type(res, n_param++, tp_s);
- }
- else if (mode == env->params->high_unsigned) {
+ } else if (mode == env->params->high_unsigned) {
set_method_param_type(res, n_param++, tp_u);
set_method_param_type(res, n_param++, tp_u);
- }
- else
+ } else {
set_method_param_type(res, n_param++, tp);
- }
- }
+ } /* if */
+ } else {
+ set_method_param_type(res, n_param++, tp);
+ } /* if */
+ } /* for */
for (i = n_res = 0; i < r; ++i) {
ir_type *tp = get_method_res_type(mtp, i);
if (mode == env->params->high_signed) {
set_method_res_type(res, n_res++, tp_s);
set_method_res_type(res, n_res++, tp_s);
- }
- else if (mode == env->params->high_unsigned) {
+ } else if (mode == env->params->high_unsigned) {
set_method_res_type(res, n_res++, tp_u);
set_method_res_type(res, n_res++, tp_u);
- }
- else
+ } else {
set_method_res_type(res, n_res++, tp);
- }
- }
+ } /* if */
+ } else {
+ set_method_res_type(res, n_res++, tp);
+ } /* if */
+ } /* for */
set_lowered_type(mtp, res);
pmap_insert(lowered_type, mtp, res);
- }
- else
+ } else {
res = entry->value;
+ } /* if */
return res;
-}
+} /* lower_mtp */
/**
* Translate a Return.
/* not ready yet, wait */
pdeq_putr(env->waitq, node);
return;
- }
+ } /* if */
need_conv = 1;
- }
- }
+ } /* if */
+ } /* for */
if (! need_conv)
return;
if (env->entries[idx]) {
in[++j] = env->entries[idx]->low_word;
in[++j] = env->entries[idx]->high_word;
- }
- else
+ } else {
in[++j] = pred;
- }
+ } /* if */
+ } /* for */
set_irn_in(node, j+1, in);
-}
+} /* lower_Return */
/**
* Translate the parameters.
int i, j, n_params, rem;
ir_node *proj, *args;
- if (is_lowered_type(tp))
+ if (is_lowered_type(tp)) {
mtp = get_associated_type(tp);
- else
+ } else {
mtp = tp;
-
+ } /* if */
assert(! is_lowered_type(mtp));
n_params = get_method_n_params(mtp);
if (mode == env->params->high_signed ||
mode == env->params->high_unsigned)
++j;
- }
- }
+ } /* if */
+ } /* for */
if (i == j)
return;
if (env->entries[idx]) {
mode = get_irn_mode(proj);
- if (mode == env->params->high_signed)
+ if (mode == env->params->high_signed) {
mode = env->params->low_signed;
- else
- mode = env->params->high_signed;
+ } else {
+ mode = env->params->low_unsigned;
+ } /* if */
dbg = get_irn_dbg_info(proj);
env->entries[idx]->low_word =
new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr]);
env->entries[idx]->high_word =
new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
- }
- }
+ } /* if */
+ } /* for */
set_optimize(rem);
-}
+} /* lower_Start */
/**
* Translate a Call.
int i, j;
long *res_numbers = NULL;
- if (is_lowered_type(tp))
+ if (is_lowered_type(tp)) {
call_tp = get_associated_type(tp);
- else
+ } else {
call_tp = tp;
+ } /* if */
assert(! is_lowered_type(call_tp));
mode == env->params->high_unsigned) {
need_lower = 1;
break;
- }
- }
- }
+ } /* if */
+ } /* if */
+ } /* for */
n_res = get_method_n_ress(call_tp);
if (n_res > 0) {
NEW_ARR_A(long, res_numbers, n_res);
mode == env->params->high_unsigned) {
need_lower = 1;
++j;
- }
- }
- }
- }
+ } /* if */
+ } /* if */
+ } /* for */
+ } /* if */
if (! need_lower)
return;
}
in[j++] = env->entries[idx]->low_word;
in[j++] = env->entries[idx]->high_word;
- }
- else
+ } else {
in[j++] = pred;
- }
+ } /* if */
+ } /* for */
set_irn_in(node, j, in);
/* found the result proj */
results = proj;
break;
- }
- }
+ } /* if */
+ } /* for */
if (results) { /* there are results */
int rem = get_optimize();
ir_mode *mode = get_irn_mode(proj);
dbg_info *dbg;
- if (mode == env->params->high_signed)
+ if (mode == env->params->high_signed) {
mode = env->params->low_signed;
- else
+ } else {
mode = env->params->low_unsigned;
+ } /* if */
dbg = get_irn_dbg_info(proj);
env->entries[idx]->low_word =
new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr]);
env->entries[idx]->high_word =
new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
- }
+ } /* if */
mark_irn_visited(proj);
- }
- }
+ } /* if */
+ } /* for */
set_optimize(rem);
}
-}
+} /* lower_Call */
/**
* Translate an Unknown into two.
*/
static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
int idx = get_irn_idx(node);
+ ir_graph *irg = current_ir_graph;
env->entries[idx]->low_word =
- env->entries[idx]->high_word = new_r_Unknown(current_ir_graph, mode);
-}
+ env->entries[idx]->high_word = new_r_Unknown(irg, mode);
+} /* lower_Unknown */
/**
* Translate a Phi.
* First step: just create two templates
*/
static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
+ ir_graph *irg = current_ir_graph;
ir_node *block, *unk;
ir_node **inl, **inh;
dbg_info *dbg;
if (env->entries[idx]->low_word) {
set_Phi_pred(phil, i, env->entries[idx]->low_word);
- set_Phi_pred(phil, i, env->entries[idx]->high_word);
- }
- else {
+ set_Phi_pred(phih, i, env->entries[idx]->high_word);
+ } else {
/* still not ready */
pdeq_putr(env->waitq, phi);
return;
- }
- }
- }
+ } /* if */
+ } /* for */
+ } /* if */
/* first create a new in array */
NEW_ARR_A(ir_node *, inl, arity);
NEW_ARR_A(ir_node *, inh, arity);
- unk = new_r_Unknown(current_ir_graph, mode);
+ unk = new_r_Unknown(irg, mode);
for (i = 0; i < arity; ++i) {
ir_node *pred = get_Phi_pred(phi, i);
if (env->entries[idx]->low_word) {
inl[i] = env->entries[idx]->low_word;
inh[i] = env->entries[idx]->high_word;
- }
- else {
+ } else {
inl[i] = unk;
inh[i] = unk;
enq = 1;
- }
- }
+ } /* if */
+ } /* for */
- dbg = get_irn_dbg_info(phi);
+ dbg = get_irn_dbg_info(phi);
block = get_nodes_block(phi);
idx = get_irn_idx(phi);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_rd_Phi(dbg, current_ir_graph, block, arity, inl, mode);
- env->entries[idx]->high_word = new_rd_Phi(dbg, current_ir_graph, block, arity, inh, mode);
+ env->entries[idx]->low_word = new_rd_Phi(dbg, irg, block, arity, inl, mode);
+ env->entries[idx]->high_word = new_rd_Phi(dbg, irg, block, arity, inh, mode);
if (enq) {
/* not yet finished */
pdeq_putr(env->waitq, phi);
- }
-}
+ } /* if */
+} /* lower_Phi */
/**
* check for opcodes that must always be lowered.
case iro_Call:
case iro_Return:
case iro_Cond:
+ case iro_Conv:
return 1;
default:
return 0;
- }
-}
+ } /* switch */
+} /* always_lower */
-/** The type of a lower function. */
+/**
+ * The type of a lower function.
+ *
+ * @param node the node to be lowered
+ * @param mode the low mode for the destination node
+ * @param env the lower environment
+ */
typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
/**
- * lower a node.
+ * Lower a node.
*/
static void lower_ops(ir_node *node, void *env)
{
DB((dbg, LEVEL_1, " %+F\n", node));
func(node, mode, lenv);
- }
- }
-}
+ } /* if */
+ } /* if */
+} /* lower_ops */
#define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
const op_mode_entry_t *e2 = key;
return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
-}
+} /* cmp_op_mode */
/**
* Compare two conv_tp_entry_t's.
const conv_tp_entry_t *e2 = key;
return (e1->imode - e2->imode) | (e1->omode - e2->omode);
-}
+} /* static int cmp_conv_tp */
/*
* Do the lowering.
{
lower_env_t lenv;
int i;
+ ir_graph *rem;
if (! param)
return;
return;
FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
- firm_dbg_set_mask(dbg, SET_LEVEL_2);
assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
+ /* create the necessary maps */
if (! prim_types)
prim_types = pmap_create();
if (! intrinsic_fkt)
if (! lowered_type)
lowered_type = pmap_create();
+ /* create a primitive unsigned and signed type */
if (! tp_u)
tp_u = get_primitive_type(param->low_unsigned);
if (! tp_s)
tp_s = get_primitive_type(param->low_signed);
-
+ /* create method types for the created binop calls */
if (! binop_tp_u) {
binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
-
set_method_param_type(binop_tp_u, 0, tp_u);
set_method_param_type(binop_tp_u, 1, tp_u);
set_method_param_type(binop_tp_u, 2, tp_u);
set_method_param_type(binop_tp_u, 3, tp_u);
set_method_res_type(binop_tp_u, 0, tp_u);
set_method_res_type(binop_tp_u, 1, tp_u);
- }
+ } /* if */
if (! binop_tp_s) {
binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
set_method_param_type(binop_tp_s, 0, tp_s);
set_method_param_type(binop_tp_s, 3, tp_s);
set_method_res_type(binop_tp_s, 0, tp_s);
set_method_res_type(binop_tp_s, 1, tp_s);
- }
+ } /* if */
+ if (! shiftop_tp_u) {
+ shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
+ set_method_param_type(shiftop_tp_u, 0, tp_u);
+ set_method_param_type(shiftop_tp_u, 1, tp_u);
+ set_method_param_type(shiftop_tp_u, 2, tp_u);
+ set_method_res_type(shiftop_tp_u, 0, tp_u);
+ set_method_res_type(shiftop_tp_u, 1, tp_u);
+ } /* if */
+ if (! shiftop_tp_s) {
+ shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
+ set_method_param_type(shiftop_tp_s, 0, tp_s);
+ set_method_param_type(shiftop_tp_s, 1, tp_s);
+ /* beware: shift count is always mode_Iu */
+ set_method_param_type(shiftop_tp_s, 2, tp_u);
+ set_method_res_type(shiftop_tp_s, 0, tp_s);
+ set_method_res_type(shiftop_tp_s, 1, tp_s);
+ } /* if */
if (! unop_tp_u) {
unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
set_method_param_type(unop_tp_u, 0, tp_u);
set_method_param_type(unop_tp_u, 1, tp_u);
set_method_res_type(unop_tp_u, 0, tp_u);
set_method_res_type(unop_tp_u, 1, tp_u);
- }
+ } /* if */
if (! unop_tp_s) {
unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
set_method_param_type(unop_tp_s, 0, tp_s);
set_method_param_type(unop_tp_s, 1, tp_s);
set_method_res_type(unop_tp_s, 0, tp_s);
set_method_res_type(unop_tp_s, 1, tp_s);
- }
+ } /* if */
lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
+ lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
lenv.waitq = new_pdeq();
lenv.params = param;
#define LOWER_BIN(op) LOWER2(op, lower_Binop)
#define LOWER_UN(op) LOWER2(op, lower_Unop)
+ /* the table of all operations that must be lowered follows */
LOWER(Load);
LOWER(Store);
LOWER(Const);
LOWER_BIN(Add);
LOWER_BIN(Sub);
LOWER_BIN(Mul);
- LOWER_BIN(Shl);
- LOWER_BIN(Shr);
- LOWER_BIN(Shrs);
- LOWER_BIN(Rot);
+ LOWER(Shl);
+ LOWER(Shr);
+ LOWER(Shrs);
+ LOWER(Rot);
LOWER_UN(Minus);
LOWER(DivMod);
LOWER(Div);
#undef LOWER2
/* transform all graphs */
+ rem = current_ir_graph;
for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
ir_graph *irg = get_irp_irg(i);
int n_idx;
/* last step: all waiting nodes */
DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
+ current_ir_graph = irg;
while (! pdeq_empty(lenv.waitq)) {
ir_node *node = pdeq_getl(lenv.waitq);
lower_ops(node, &lenv);
- }
+ } /* while */
/* outs are invalid, we changed the graph */
set_irg_outs_inconsistent(irg);
set_irg_doms_inconsistent(irg);
set_irg_extblk_inconsistent(irg);
set_irg_loopinfo_inconsistent(irg);
- }
+ } /* if */
dump_ir_block_graph(irg, "-dw");
- }
+ } /* if */
pmap_destroy(lenv.proj_2_block);
free(lenv.entries);
obstack_free(&lenv.obst, NULL);
- }
+ } /* for */
del_pdeq(lenv.waitq);
-}
+ current_ir_graph = rem;
+} /* lower_dw_ops */
/* Default implementation. */
entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
ident *id;
entity *ent;
- if (imode == omode)
+ if (imode == omode) {
snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
- else
+ } else {
snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
get_mode_name(imode), get_mode_name(omode));
+ } /* if */
id = new_id_from_str(buf);
ent = new_entity(get_glob_type(), id, method);
set_entity_ld_ident(ent, get_entity_ident(ent));
set_entity_visibility(ent, visibility_external_allocated);
return ent;
-}
+} /* def_create_intrinsic_fkt */
projects / libfirm / blobdiff