static pmap *lowered_type;
/** The types for the binop and unop intrinsics. */
-static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *tp_s, *tp_u;
+static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
/** the debug handle */
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
pmap_insert(prim_types, mode, tp);
return tp;
-}
+} /* get_primitive_type */
/**
* Create a method type for a Conv emulation from imode to omode.
else
mtd = entry->mtd;
return mtd;
-}
+} /* get_conv_type */
/**
* Add an additional control flow input to a block.
in[i] = in[nr];
set_irn_in(phi, i + 1, in);
}
-}
+} /* add_block_cf_input_nr */
/**
* Add an additional control flow input to a block.
}
assert(i < arity);
add_block_cf_input_nr(block, nr, cf);
-}
+} /* add_block_cf_input */
/**
* Return the "operational" mode of a Firm node.
default:
return get_irn_mode(node);
}
-}
+} /* get_irn_op_mode */
/**
- * walker, prepare the node links
+ * Walker, prepare the node links.
*/
static void prepare_links(ir_node *node, void *env)
{
pmap_insert(lenv->proj_2_block, pred, node);
}
}
-}
+} /* prepare_links */
/**
* Translate a Constant: create two.
dbg_info *dbg = get_irn_dbg_info(node);
ir_node *block = get_nodes_block(node);
int idx;
+ ir_graph *irg = current_ir_graph;
tv = get_Const_tarval(node);
tv_l = tarval_convert_to(tv, mode);
- low = new_rd_Const(dbg, current_ir_graph, block, mode, tv_l);
+ low = new_rd_Const(dbg, irg, block, mode, tv_l);
tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
- high = new_rd_Const(dbg, current_ir_graph, block, mode, tv_h);
+ high = new_rd_Const(dbg, irg, block, mode, tv_h);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
env->entries[idx]->low_word = low;
env->entries[idx]->high_word = high;
-}
+} /* lower_Const */
/**
* Translate a Load: create two.
* out new nodes. */
mark_irn_visited(proj);
}
-}
+} /* lower_Load */
/**
* Translate a Store: create two.
* out new nodes. */
mark_irn_visited(proj);
}
-}
+} /* lower_Store */
/**
* Return a node containing the address of the intrinsic emulation function.
sym.entity_p = ent;
return new_r_SymConst(current_ir_graph, block, sym, symconst_addr_ent);
-}
+} /* get_intrinsic_address */
/**
* Translate a Div.
dbg_info *dbg;
ir_type *mtp;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_Div_left(node);
in[2] = entry->low_word;
in[3] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
- call = new_rd_Call(dbg, current_ir_graph, block, get_Div_mem(node),
+ call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
irn, 4, in, mtp);
set_irn_pinned(call, get_irn_pinned(node));
- irn = new_r_Proj(current_ir_graph, block, call, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
switch (get_Proj_proj(proj)) {
* out new nodes. */
mark_irn_visited(proj);
}
-}
+} /* lower_Div */
/**
* Translate a Mod.
dbg_info *dbg;
ir_type *mtp;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_Mod_left(node);
in[2] = entry->low_word;
in[3] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
- call = new_rd_Call(dbg, current_ir_graph, block, get_Mod_mem(node),
+ call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
irn, 4, in, mtp);
set_irn_pinned(call, get_irn_pinned(node));
- irn = new_r_Proj(current_ir_graph, block, call, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
switch (get_Proj_proj(proj)) {
case pn_Mod_res: /* Result of computation. */
idx = get_irn_idx(proj);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
break;
default:
assert(0 && "unexpected Proj number");
* out new nodes. */
mark_irn_visited(proj);
}
-}
+} /* lower_Mod */
/**
* Translate a DivMod.
int idx;
node_entry_t *entry;
unsigned flags = 0;
+ ir_graph *irg;
/* check if both results are needed */
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
in[2] = entry->low_word;
in[3] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mem = get_DivMod_mem(node);
if (flags & 1) {
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
- callDiv = new_rd_Call(dbg, current_ir_graph, block, mem,
+ callDiv = new_rd_Call(dbg, irg, block, mem,
irn, 4, in, mtp);
set_irn_pinned(callDiv, get_irn_pinned(node));
- resDiv = new_r_Proj(current_ir_graph, block, callDiv, mode_T, pn_Call_T_result);
+ resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
}
if (flags & 2) {
if (flags & 1)
- mem = new_r_Proj(current_ir_graph, block, callDiv, mode_M, pn_Call_M);
+ mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
- callMod = new_rd_Call(dbg, current_ir_graph, block, mem,
+ callMod = new_rd_Call(dbg, irg, block, mem,
irn, 4, in, mtp);
set_irn_pinned(callMod, get_irn_pinned(node));
- resMod = new_r_Proj(current_ir_graph, block, callMod, mode_T, pn_Call_T_result);
+ resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
}
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
case pn_DivMod_res_div: /* Result of Div. */
idx = get_irn_idx(proj);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, resDiv, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, resDiv, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
break;
case pn_DivMod_res_mod: /* Result of Mod. */
idx = get_irn_idx(proj);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, resMod, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, resMod, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
break;
default:
assert(0 && "unexpected Proj number");
* out new nodes. */
mark_irn_visited(proj);
}
-}
+} /* lower_DivMod */
/**
* Translate a Binop.
dbg_info *dbg;
ir_type *mtp;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_binop_left(node);
in[2] = entry->low_word;
in[3] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
- irn = new_rd_Call(dbg, current_ir_graph, block, get_irg_no_mem(current_ir_graph),
+ irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
irn, 4, in, mtp);
set_irn_pinned(irn, get_irn_pinned(node));
- irn = new_r_Proj(current_ir_graph, block, irn, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
-}
+ env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
+} /* lower_Binop */
+
+/**
+ * Translate a Shiftop.
+ *
+ * Create an intrinsic Call.
+ */
+static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *block, *irn;
+ ir_node *in[3];
+ dbg_info *dbg;
+ ir_type *mtp;
+ int idx;
+ ir_graph *irg;
+ node_entry_t *entry;
+
+ irn = get_binop_left(node);
+ entry = env->entries[get_irn_idx(irn)];
+ assert(entry);
+
+ if (! entry->low_word) {
+ /* not ready yet, wait */
+ pdeq_putr(env->waitq, node);
+ return;
+ }
+
+ in[0] = entry->low_word;
+ in[1] = entry->high_word;
+
+ /* The shift count is always mode_Iu in firm, so there is no need for lowering */
+ in[2] = get_binop_right(node);
+
+ dbg = get_irn_dbg_info(node);
+ block = get_nodes_block(node);
+ irg = current_ir_graph;
+
+ mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
+ irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
+ irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
+ irn, 3, in, mtp);
+ set_irn_pinned(irn, get_irn_pinned(node));
+ irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
+
+ idx = get_irn_idx(node);
+ assert(idx < env->n_entries);
+ env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
+} /* lower_Shiftop */
+
+/**
+ * Translate a Shr and handle special cases.
+ */
+static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *right = get_Shr_right(node);
+ ir_graph *irg = current_ir_graph;
+
+ if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
+ tarval *tv = get_Const_tarval(right);
+
+ if (tarval_is_long(tv) &&
+ get_tarval_long(tv) >= get_mode_size_bits(mode)) {
+ ir_node *block = get_nodes_block(node);
+ ir_node *left = get_Shr_left(node);
+ ir_node *c;
+ long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
+ int idx = get_irn_idx(left);
+
+ left = env->entries[idx]->high_word;
+ idx = get_irn_idx(node);
+
+ if (shf_cnt > 0) {
+ c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
+ env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
+ }
+ else
+ env->entries[idx]->low_word = left;
+ env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
+
+ return;
+ }
+ }
+ lower_Shiftop(node, mode, env);
+} /* lower_Shr */
+
+/**
+ * Translate a Shl and handle special cases.
+ */
+static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *right = get_Shl_right(node);
+ ir_graph *irg = current_ir_graph;
+
+ if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
+ tarval *tv = get_Const_tarval(right);
+
+ if (tarval_is_long(tv) &&
+ get_tarval_long(tv) >= get_mode_size_bits(mode)) {
+ ir_node *block = get_nodes_block(node);
+ ir_node *left = get_Shl_left(node);
+ ir_node *c;
+ long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
+ int idx = get_irn_idx(left);
+
+ left = env->entries[idx]->low_word;
+ idx = get_irn_idx(node);
+
+ if (shf_cnt > 0) {
+ c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
+ env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
+ }
+ else
+ env->entries[idx]->high_word = left;
+ env->entries[idx]->low_word = new_r_Const(irg, block, mode, get_mode_null(mode));
+
+ return;
+ }
+ }
+ lower_Shiftop(node, mode, env);
+} /* lower_Shl */
+
+/**
+ * Translate a Shrs and handle special cases.
+ */
+static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *right = get_Shrs_right(node);
+ ir_graph *irg = current_ir_graph;
+
+ if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
+ tarval *tv = get_Const_tarval(right);
+
+ if (tarval_is_long(tv) &&
+ get_tarval_long(tv) >= get_mode_size_bits(mode)) {
+ ir_node *block = get_nodes_block(node);
+ ir_node *left = get_Shrs_left(node);
+ long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
+ ir_node *c;
+ int idx = get_irn_idx(left);
+
+ left = env->entries[idx]->high_word;
+ idx = get_irn_idx(node);
+
+ if (shf_cnt > 0) {
+ c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
+ env->entries[idx]->low_word = new_r_Shrs(irg, block, left, c, mode);
+ }
+ else
+ env->entries[idx]->low_word = left;
+
+ c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
+ env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
+
+ return;
+ }
+ }
+ lower_Shiftop(node, mode, env);
+} /* lower_Shrs */
+
+/**
+ * Translate a Rot and handle special cases.
+ */
+static void lower_Rot(ir_node *node, ir_mode *mode, lower_env_t *env) {
+ ir_node *right = get_Rot_right(node);
+
+ if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
+ tarval *tv = get_Const_tarval(right);
+
+ if (tarval_is_long(tv) &&
+ get_tarval_long(tv) == get_mode_size_bits(mode)) {
+ ir_node *left = get_Rot_left(node);
+ ir_node *h, *l;
+ int idx = get_irn_idx(left);
+
+ l = env->entries[idx]->low_word;
+ h = env->entries[idx]->high_word;
+ idx = get_irn_idx(node);
+
+ env->entries[idx]->low_word = h;
+ env->entries[idx]->high_word = l;
+
+ return;
+ }
+ }
+ lower_Shiftop(node, mode, env);
+} /* lower_Rot */
/**
* Translate an Unop.
dbg_info *dbg;
ir_type *mtp;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_unop_op(node);
in[0] = entry->low_word;
in[1] = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
- irn = new_rd_Call(dbg, current_ir_graph, block, get_irg_no_mem(current_ir_graph),
+ irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
irn, 2, in, mtp);
set_irn_pinned(irn, get_irn_pinned(node));
- irn = new_r_Proj(current_ir_graph, block, irn, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
- env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
-}
+ env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
+ env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
+} /* lower_Unop */
/**
* Translate a logical Binop.
ir_node *lop_l, *lop_h, *rop_l, *rop_h;
dbg_info *dbg;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_binop_left(node);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = constr_rd(dbg, current_ir_graph, block, lop_l, rop_l, mode);
- env->entries[idx]->high_word = constr_rd(dbg, current_ir_graph, block, lop_h, rop_h, mode);
-}
+ irg = current_ir_graph;
+ env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, mode);
+ env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
+} /* lower_Binop_logical */
/** create a logical operation tranformation */
#define lower_logical(op) \
ir_node *op_l, *op_h;
dbg_info *dbg;
int idx;
+ ir_graph *irg;
node_entry_t *entry;
irn = get_Not_op(node);
op_l = entry->low_word;
op_h = entry->high_word;
- dbg = get_irn_dbg_info(node);
+ dbg = get_irn_dbg_info(node);
block = get_nodes_block(node);
+ irg = current_ir_graph;
idx = get_irn_idx(node);
assert(idx < env->n_entries);
env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, mode);
env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
-}
+} /* lower_Not */
/**
* Translate a Cond.
set_Cond_selector(node, env->entries[idx]->low_word);
}
}
-}
+} /* lower_Cond */
/**
* Translate a Conv to higher_signed
env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
}
-}
+} /* lower_Conv_to_Ls */
/**
* Translate a Conv to higher_unsigned
env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
}
-}
+} /* lower_Conv_to_Lu */
/**
* Translate a Conv from higher_signed
exchange(node, new_r_Proj(irg, block, irn, omode, 0));
}
-}
+} /* lower_Conv_from_Ls */
/**
* Translate a Conv from higher_unsigned
exchange(node, new_r_Proj(irg, block, irn, omode, 0));
}
-}
+} /* lower_Conv_from_Lu */
/**
* Translate a Conv.
lower_Conv_from_Lu(node, env);
}
}
-}
+} /* lower_Conv */
/**
* Lower the method type.
else
res = entry->value;
return res;
-}
+} /* lower_mtp */
/**
* Translate a Return.
}
set_irn_in(node, j+1, in);
-}
+} /* lower_Return */
/**
* Translate the parameters.
if (mode == env->params->high_signed)
mode = env->params->low_signed;
else
- mode = env->params->high_signed;
+ mode = env->params->low_unsigned;
dbg = get_irn_dbg_info(proj);
env->entries[idx]->low_word =
}
}
set_optimize(rem);
-}
+} /* lower_Start */
/**
* Translate a Call.
}
set_optimize(rem);
}
-}
+} /* lower_Call */
/**
* Translate an Unknown into two.
*/
static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
int idx = get_irn_idx(node);
+ ir_graph *irg = current_ir_graph;
env->entries[idx]->low_word =
- env->entries[idx]->high_word = new_r_Unknown(current_ir_graph, mode);
-}
+ env->entries[idx]->high_word = new_r_Unknown(irg, mode);
+} /* lower_Unknown */
/**
* Translate a Phi.
* First step: just create two templates
*/
static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
+ ir_graph *irg = current_ir_graph;
ir_node *block, *unk;
ir_node **inl, **inh;
dbg_info *dbg;
if (env->entries[idx]->low_word) {
set_Phi_pred(phil, i, env->entries[idx]->low_word);
- set_Phi_pred(phil, i, env->entries[idx]->high_word);
+ set_Phi_pred(phih, i, env->entries[idx]->high_word);
}
else {
/* still not ready */
/* first create a new in array */
NEW_ARR_A(ir_node *, inl, arity);
NEW_ARR_A(ir_node *, inh, arity);
- unk = new_r_Unknown(current_ir_graph, mode);
+ unk = new_r_Unknown(irg, mode);
for (i = 0; i < arity; ++i) {
ir_node *pred = get_Phi_pred(phi, i);
idx = get_irn_idx(phi);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_rd_Phi(dbg, current_ir_graph, block, arity, inl, mode);
- env->entries[idx]->high_word = new_rd_Phi(dbg, current_ir_graph, block, arity, inh, mode);
+ env->entries[idx]->low_word = new_rd_Phi(dbg, irg, block, arity, inl, mode);
+ env->entries[idx]->high_word = new_rd_Phi(dbg, irg, block, arity, inh, mode);
if (enq) {
/* not yet finished */
pdeq_putr(env->waitq, phi);
}
-}
+} /* lower_Phi */
/**
* check for opcodes that must always be lowered.
default:
return 0;
}
-}
+} /* always_lower */
/** The type of a lower function. */
typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
/**
- * lower a node.
+ * Lower a node.
*/
static void lower_ops(ir_node *node, void *env)
{
func(node, mode, lenv);
}
}
-}
+} /* lower_ops */
#define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
const op_mode_entry_t *e2 = key;
return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
-}
+} /* cmp_op_mode */
/**
* Compare two conv_tp_entry_t's.
const conv_tp_entry_t *e2 = key;
return (e1->imode - e2->imode) | (e1->omode - e2->omode);
-}
+} /*
+static int cmp_conv_tp */
/*
* Do the lowering.
{
lower_env_t lenv;
int i;
+ ir_graph *rem;
if (! param)
return;
return;
FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
- firm_dbg_set_mask(dbg, SET_LEVEL_2);
assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
if (! binop_tp_u) {
binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
-
set_method_param_type(binop_tp_u, 0, tp_u);
set_method_param_type(binop_tp_u, 1, tp_u);
set_method_param_type(binop_tp_u, 2, tp_u);
set_method_res_type(binop_tp_s, 0, tp_s);
set_method_res_type(binop_tp_s, 1, tp_s);
}
+ if (! shiftop_tp_u) {
+ shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
+ set_method_param_type(shiftop_tp_u, 0, tp_u);
+ set_method_param_type(shiftop_tp_u, 1, tp_u);
+ set_method_param_type(shiftop_tp_u, 2, tp_u);
+ set_method_res_type(shiftop_tp_u, 0, tp_u);
+ set_method_res_type(shiftop_tp_u, 1, tp_u);
+ }
+ if (! shiftop_tp_s) {
+ shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
+ set_method_param_type(shiftop_tp_s, 0, tp_s);
+ set_method_param_type(shiftop_tp_s, 1, tp_s);
+ /* beware: shift count is always mode_Iu */
+ set_method_param_type(shiftop_tp_s, 2, tp_u);
+ set_method_res_type(shiftop_tp_s, 0, tp_s);
+ set_method_res_type(shiftop_tp_s, 1, tp_s);
+ }
if (! unop_tp_u) {
unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
set_method_param_type(unop_tp_u, 0, tp_u);
LOWER_BIN(Add);
LOWER_BIN(Sub);
LOWER_BIN(Mul);
- LOWER_BIN(Shl);
- LOWER_BIN(Shr);
- LOWER_BIN(Shrs);
- LOWER_BIN(Rot);
+ LOWER(Shl);
+ LOWER(Shr);
+ LOWER(Shrs);
+ LOWER(Rot);
LOWER_UN(Minus);
LOWER(DivMod);
LOWER(Div);
#undef LOWER2
/* transform all graphs */
+ rem = current_ir_graph;
for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
ir_graph *irg = get_irp_irg(i);
int n_idx;
/* last step: all waiting nodes */
DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
+ current_ir_graph = irg;
while (! pdeq_empty(lenv.waitq)) {
ir_node *node = pdeq_getl(lenv.waitq);
obstack_free(&lenv.obst, NULL);
}
del_pdeq(lenv.waitq);
-}
+ current_ir_graph = rem;
+} /* lower_dw_ops */
/* Default implementation. */
entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
set_entity_ld_ident(ent, get_entity_ident(ent));
set_entity_visibility(ent, visibility_external_allocated);
return ent;
-}
+} /* def_create_intrinsic_fkt */
projects / libfirm / blobdiff