ir_graph *irg;
struct obstack obst; /**< an obstack holding the temporary data */
ir_tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
- ir_tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
ir_node **lowered_phis; /**< list of lowered phis */
ir_mode *high_signed; /**< doubleword signed type */
key.omode = omode;
key.mtd = NULL;
- entry = (conv_tp_entry_t*)set_insert(conv_types, &key, sizeof(key), hash_ptr(imode) ^ hash_ptr(omode));
+ entry = set_insert(conv_tp_entry_t, conv_types, &key, sizeof(key), hash_ptr(imode) ^ hash_ptr(omode));
if (! entry->mtd) {
int n_param = 1, n_res = 1;
*/
static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
{
- int i, arity = get_irn_arity(block);
+ int i, arity = get_Block_n_cfgpreds(block);
ir_node **in;
- const ir_edge_t *edge;
assert(nr < arity);
NEW_ARR_A(ir_node *, in, arity + 1);
for (i = 0; i < arity; ++i)
- in[i] = get_irn_n(block, i);
+ in[i] = get_Block_cfgpred(block, i);
in[i] = cf;
set_irn_in(block, i + 1, in);
*/
static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
{
- int i, arity = get_irn_arity(block);
+ int i, arity = get_Block_n_cfgpreds(block);
int nr = 0;
for (i = 0; i < arity; ++i) {
- if (get_irn_n(block, i) == tmpl) {
+ if (get_Block_cfgpred(block, i) == tmpl) {
nr = i;
break;
}
ir_tarval *tv = get_Const_tarval(node);
ir_tarval *tv_l = tarval_convert_to(tv, low_mode);
ir_node *res_low = new_rd_Const(dbg, irg, tv_l);
- ir_tarval *tv_shrs = tarval_shrs(tv, env->tv_mode_bits);
+ ir_tarval *tv_shrs = tarval_shrs_unsigned(tv, get_mode_size_bits(low_mode));
ir_tarval *tv_h = tarval_convert_to(tv_shrs, mode);
ir_node *res_high = new_rd_Const(dbg, irg, tv_h);
ir_node *block = get_nodes_block(node);
ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
? cons_volatile : cons_none;
- const ir_edge_t *edge;
- const ir_edge_t *next;
if (env->params->little_endian) {
low = adr;
proj_m = new_r_Proj(low, mode_M, pn_Load_M);
high = new_rd_Load(dbg, block, proj_m, high, mode, volatility);
- foreach_out_edge_safe(node, edge, next) {
+ foreach_out_edge_safe(node, edge) {
ir_node *proj = get_edge_src_irn(edge);
if (!is_Proj(proj))
continue;
const lower64_entry_t *entry = get_node_entry(value);
ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
? cons_volatile : cons_none;
- const ir_edge_t *edge;
- const ir_edge_t *next;
(void) mode;
assert(entry);
proj_m = new_r_Proj(low, mode_M, pn_Store_M);
high = new_rd_Store(dbg, block, proj_m, high, entry->high_word, volatility);
- foreach_out_edge_safe(node, edge, next) {
+ foreach_out_edge_safe(node, edge) {
ir_node *proj = get_edge_src_irn(edge);
if (!is_Proj(proj))
continue;
key.omode = omode;
key.ent = NULL;
- entry = (op_mode_entry_t*)set_insert(intrinsic_fkt, &key, sizeof(key),
+ entry = set_insert(op_mode_entry_t, intrinsic_fkt, &key, sizeof(key),
hash_ptr(op) ^ hash_ptr(imode) ^ (hash_ptr(omode) << 8));
if (! entry->ent) {
/* create a new one */
*/
static void lower_Div(ir_node *node, ir_mode *mode)
{
- ir_node *left = get_Div_left(node);
- ir_node *right = get_Div_right(node);
- ir_node *block = get_nodes_block(node);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
- ir_mode *opmode = get_irn_op_mode(node);
- ir_node *addr
- = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
- ir_node *in[4];
- ir_node *call;
- ir_node *resproj;
- const ir_edge_t *edge;
- const ir_edge_t *next;
+ ir_node *left = get_Div_left(node);
+ ir_node *right = get_Div_right(node);
+ ir_node *block = get_nodes_block(node);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
+ ir_mode *opmode = get_irn_op_mode(node);
+ ir_node *addr = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
+ ir_node *in[4];
+ ir_node *call;
+ ir_node *resproj;
if (env->params->little_endian) {
in[0] = get_lowered_low(left);
resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
set_irn_pinned(call, get_irn_pinned(node));
- foreach_out_edge_safe(node, edge, next) {
+ foreach_out_edge_safe(node, edge) {
ir_node *proj = get_edge_src_irn(edge);
if (!is_Proj(proj))
continue;
*/
static void lower_Mod(ir_node *node, ir_mode *mode)
{
- ir_node *left = get_Mod_left(node);
- ir_node *right = get_Mod_right(node);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *block = get_nodes_block(node);
- ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
- ir_mode *opmode = get_irn_op_mode(node);
- ir_node *addr
- = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
- ir_node *in[4];
- ir_node *call;
- ir_node *resproj;
- const ir_edge_t *edge;
- const ir_edge_t *next;
+ ir_node *left = get_Mod_left(node);
+ ir_node *right = get_Mod_right(node);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = get_nodes_block(node);
+ ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
+ ir_mode *opmode = get_irn_op_mode(node);
+ ir_node *addr = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
+ ir_node *in[4];
+ ir_node *call;
+ ir_node *resproj;
if (env->params->little_endian) {
in[0] = get_lowered_low(left);
resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
set_irn_pinned(call, get_irn_pinned(node));
- foreach_out_edge_safe(node, edge, next) {
+ foreach_out_edge_safe(node, edge) {
ir_node *proj = get_edge_src_irn(edge);
if (!is_Proj(proj))
continue;
/* move its Projs */
if (get_irn_mode(node) == mode_T) {
- const ir_edge_t *edge;
foreach_out_edge(node, edge) {
ir_node *proj = get_edge_src_irn(edge);
if (!is_Proj(proj))
int n_cfgpreds = get_Block_n_cfgpreds(old_block);
ir_node **cfgpreds = get_Block_cfgpred_arr(old_block);
ir_node *new_block = new_r_Block(irg, n_cfgpreds, cfgpreds);
- const ir_edge_t *edge;
- const ir_edge_t *next;
/* old_block has no predecessors anymore for now */
set_irn_in(old_block, 0, NULL);
move(node, old_block, new_block);
/* move Phi nodes to new_block */
- foreach_out_edge_safe(old_block, edge, next) {
+ foreach_out_edge_safe(old_block, edge) {
ir_node *phi = get_edge_src_irn(edge);
if (!is_Phi(phi))
continue;
ir_relation relation;
ir_graph *irg;
dbg_info *dbg;
- const ir_edge_t *edge;
- const ir_edge_t *next;
(void) high_mode;
rentry = get_node_entry(right);
/* all right, build the code */
- foreach_out_edge_safe(node, edge, next) {
+ foreach_out_edge_safe(node, edge) {
ir_node *proj = get_edge_src_irn(edge);
long proj_nr;
if (!is_Proj(proj))
*/
static void lower_Return(ir_node *node, ir_mode *mode)
{
- ir_graph *irg = get_irn_irg(node);
- ir_entity *ent = get_irg_entity(irg);
- ir_type *mtp = get_entity_type(ent);
ir_node **in;
size_t i, j, n;
int need_conv = 0;
if (! need_conv)
return;
- ent = get_irg_entity(irg);
- mtp = get_entity_type(ent);
+ ir_graph *irg = get_irn_irg(node);
+ ir_entity *ent = get_irg_entity(irg);
+ ir_type *mtp = get_entity_type(ent);
/* create a new in array */
NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
ir_node *args;
long *new_projs;
size_t i, j, n_params;
- const ir_edge_t *edge;
- const ir_edge_t *next;
(void) high_mode;
/* if type link is NULL then the type was not lowered, hence no changes
return;
/* fix all Proj's and create new ones */
- foreach_out_edge_safe(args, edge, next) {
+ foreach_out_edge_safe(args, edge) {
ir_node *proj = get_edge_src_irn(edge);
ir_mode *mode = get_irn_mode(proj);
ir_mode *mode_l = env->low_unsigned;
size_t p;
long *res_numbers = NULL;
ir_node *resproj;
- const ir_edge_t *edge;
- const ir_edge_t *next;
(void) mode;
n_params = get_method_n_params(tp);
return;
/* fix the results */
- foreach_out_edge_safe(resproj, edge, next) {
+ foreach_out_edge_safe(resproj, edge) {
ir_node *proj = get_edge_src_irn(edge);
ir_mode *proj_mode = get_irn_mode(proj);
ir_mode *mode_l = env->low_unsigned;
ir_asm_constraint *output_constraints = get_ASM_output_constraints(asmn);
ir_asm_constraint *input_constraints = get_ASM_input_constraints(asmn);
unsigned n_64bit_outs = 0;
- int i;
(void)mode;
- for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
+ for (int i = get_irn_arity(asmn) - 1; i >= 0; --i) {
ir_node *op = get_irn_n(asmn, i);
ir_mode *op_mode = get_irn_mode(op);
if (op_mode == high_signed || op_mode == high_unsigned) {
}
}
- for (i = 0; i < n_outs; ++i) {
- const ir_asm_constraint *constraint = &output_constraints[i];
+ for (int o = 0; o < n_outs; ++o) {
+ const ir_asm_constraint *constraint = &output_constraints[o];
if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
const char *constr = get_id_str(constraint->constraint);
++n_64bit_outs;
if (n_64bit_outs == 0)
return;
- {
- dbg_info *dbgi = get_irn_dbg_info(asmn);
- ir_node *block = get_nodes_block(asmn);
- int arity = get_irn_arity(asmn);
- ir_node **in = get_irn_in(asmn) + 1;
- int new_n_outs = 0;
- int n_clobber = get_ASM_n_clobbers(asmn);
- long *proj_map = ALLOCAN(long, n_outs);
- ident **clobbers = get_ASM_clobbers(asmn);
- ident *asm_text = get_ASM_text(asmn);
- ir_asm_constraint *new_outputs
- = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
- ir_node *new_asm;
- const ir_edge_t *edge;
- const ir_edge_t *next;
-
- for (i = 0; i < n_outs; ++i) {
- const ir_asm_constraint *constraint = &output_constraints[i];
- if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
- new_outputs[new_n_outs].pos = constraint->pos;
- new_outputs[new_n_outs].constraint = new_id_from_str("=a");
- new_outputs[new_n_outs].mode = env->low_unsigned;
- proj_map[i] = new_n_outs;
- ++new_n_outs;
- new_outputs[new_n_outs].pos = constraint->pos;
- new_outputs[new_n_outs].constraint = new_id_from_str("=d");
- if (constraint->mode == high_signed)
- new_outputs[new_n_outs].mode = env->low_signed;
- else
- new_outputs[new_n_outs].mode = env->low_unsigned;
- ++new_n_outs;
- } else {
- new_outputs[new_n_outs] = *constraint;
- proj_map[i] = new_n_outs;
- ++new_n_outs;
- }
+ dbg_info *dbgi = get_irn_dbg_info(asmn);
+ ir_node *block = get_nodes_block(asmn);
+ ir_node *mem = get_ASM_mem(asmn);
+ int new_n_outs = 0;
+ int n_clobber = get_ASM_n_clobbers(asmn);
+ long *proj_map = ALLOCAN(long, n_outs);
+ ident **clobbers = get_ASM_clobbers(asmn);
+ ident *asm_text = get_ASM_text(asmn);
+ ir_asm_constraint *new_outputs
+ = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
+ ir_node *new_asm;
+
+ for (int o = 0; o < n_outs; ++o) {
+ const ir_asm_constraint *constraint = &output_constraints[o];
+ if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
+ new_outputs[new_n_outs].pos = constraint->pos;
+ new_outputs[new_n_outs].constraint = new_id_from_str("=a");
+ new_outputs[new_n_outs].mode = env->low_unsigned;
+ proj_map[o] = new_n_outs;
+ ++new_n_outs;
+ new_outputs[new_n_outs].pos = constraint->pos;
+ new_outputs[new_n_outs].constraint = new_id_from_str("=d");
+ if (constraint->mode == high_signed)
+ new_outputs[new_n_outs].mode = env->low_signed;
+ else
+ new_outputs[new_n_outs].mode = env->low_unsigned;
+ ++new_n_outs;
+ } else {
+ new_outputs[new_n_outs] = *constraint;
+ proj_map[o] = new_n_outs;
+ ++new_n_outs;
}
- assert(new_n_outs == n_outs+(int)n_64bit_outs);
+ }
+ assert(new_n_outs == n_outs+(int)n_64bit_outs);
- new_asm = new_rd_ASM(dbgi, block, arity, in, input_constraints,
- new_n_outs, new_outputs, n_clobber, clobbers,
- asm_text);
+ int n_inputs = get_ASM_n_inputs(asmn);
+ ir_node **new_ins = ALLOCAN(ir_node*, n_inputs);
+ for (int i = 0; i < n_inputs; ++i)
+ new_ins[i] = get_ASM_input(asmn, i);
- foreach_out_edge_safe(asmn, edge, next) {
- ir_node *proj = get_edge_src_irn(edge);
- ir_mode *proj_mode = get_irn_mode(proj);
- long pn;
+ new_asm = new_rd_ASM(dbgi, block, mem, n_inputs, new_ins, input_constraints,
+ new_n_outs, new_outputs, n_clobber, clobbers,
+ asm_text);
- if (!is_Proj(proj))
- continue;
- pn = get_Proj_proj(proj);
+ foreach_out_edge_safe(asmn, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ ir_mode *proj_mode = get_irn_mode(proj);
+ long pn;
- if (pn < n_outs)
- pn = proj_map[pn];
- else
- pn = new_n_outs + pn - n_outs;
-
- if (proj_mode == high_signed || proj_mode == high_unsigned) {
- ir_mode *high_mode
- = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
- ir_node *np_low = new_r_Proj(new_asm, env->low_unsigned, pn);
- ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
- ir_set_dw_lowered(proj, np_low, np_high);
- } else {
- ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
- exchange(proj, np);
- }
+ if (!is_Proj(proj))
+ continue;
+ pn = get_Proj_proj(proj);
+
+ if (pn < n_outs)
+ pn = proj_map[pn];
+ else
+ pn = new_n_outs + pn - n_outs;
+
+ if (proj_mode == high_signed || proj_mode == high_unsigned) {
+ ir_mode *high_mode
+ = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
+ ir_node *np_low = new_r_Proj(new_asm, env->low_unsigned, pn);
+ ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
+ ir_set_dw_lowered(proj, np_low, np_high);
+ } else {
+ ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
+ exchange(proj, np);
}
}
}
ir_node *mem = get_Builtin_mem(builtin);
const lower64_entry_t *entry = get_node_entry(operand);
ir_mode *mode_high = get_irn_mode(entry->high_word);
- const ir_edge_t *edge;
- const ir_edge_t *next;
ir_node *res_high;
ir_node *res_low;
}
/* search result Proj */
- foreach_out_edge_safe(builtin, edge, next) {
+ foreach_out_edge_safe(builtin, edge) {
ir_node *proj = get_edge_src_irn(edge);
if (!is_Proj(proj))
continue;
case iro_Call:
case iro_Return:
case iro_Cond:
+ case iro_Switch:
case iro_Conv:
case iro_Sel:
return true;
}
lenv.tv_mode_bytes = new_tarval_from_long(param->doubleword_size/(2*8), lenv.low_unsigned);
- lenv.tv_mode_bits = new_tarval_from_long(param->doubleword_size/2, lenv.low_unsigned);
lenv.waitq = new_pdeq();
lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);