/*
- * Project: libFIRM
- * File name: ir/ir/irvrfy.c
- * Purpose: Check irnodes for correctness.
- * Author: Christian Schaefer
- * Modified by: Goetz Lindenmaier. Till Riedel. Michael Beck.
- * Created:
- * CVS-ID: $Id$
- * Copyright: (c) 1998-2003 Universität Karlsruhe
- * Licence: This file protected by GPL - GNU GENERAL PUBLIC LICENSE.
+ * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
+/**
+ * @file
+ * @brief Check irnodes for correctness.
+ * @author Christian Schaefer, Goetz Lindenmaier, Till Riedel, Michael Beck
+ * @version $Id$
*/
-
#ifdef HAVE_CONFIG_H
# include "config.h"
#endif
fprintf(stderr, "\nFIRM: irn_vrfy_irg() <of CONST_CODE_IRG> failed\n");
}
else {
- entity *ent = get_irg_entity(irg);
+ ir_entity *ent = get_irg_entity(irg);
if (ent) {
ir_type *ent_type = get_entity_owner(ent);
/**
* Prints a failure message for a proj
*/
-static void show_proj_failure_ent(ir_node *n, entity *ent)
+static void show_proj_failure_ent(ir_node *n, ir_entity *ent)
{
ir_node *op = get_Proj_pred(n);
int proj = get_Proj_proj(n);
*/
static void show_return_modes(ir_graph *irg, ir_node *n, ir_type *mt, int i)
{
- entity *ent = get_irg_entity(irg);
+ ir_entity *ent = get_irg_entity(irg);
show_entity_failure(n);
fprintf(stderr, " Return node %ld in entity \"%s\" mode %s different from type mode %s\n",
*/
static void show_return_nres(ir_graph *irg, ir_node *n, ir_type *mt)
{
- entity *ent = get_irg_entity(irg);
+ ir_entity *ent = get_irg_entity(irg);
show_entity_failure(n);
fprintf(stderr, " Return node %ld in entity \"%s\" has %d results different from type %d\n",
}
/** If the address is Sel or SymConst, return the entity. */
-static entity *get_ptr_entity(ir_node *ptr) {
+static ir_entity *get_ptr_entity(ir_node *ptr) {
if (get_irn_op(ptr) == op_Sel) {
return get_Sel_entity(ptr);
} else if ((get_irn_op(ptr) == op_SymConst) && (get_SymConst_kind(ptr) == symconst_addr_ent)) {
(proj == pn_Start_M && mode == mode_M) ||
(proj == pn_Start_P_frame_base && mode_is_reference(mode)) ||
(proj == pn_Start_P_globals && mode_is_reference(mode)) ||
+ (proj == pn_Start_P_tls && mode_is_reference(mode)) ||
(proj == pn_Start_T_args && mode == mode_T) ||
(proj == pn_Start_P_value_arg_base && mode_is_reference(mode)) ||
(proj == pn_Start_P_value_arg_base && mode == mode_T) /* FIXME: only one of those */
if (proj == pn_Load_res) {
ir_node *ptr = get_Load_ptr(n);
- entity *ent = get_ptr_entity(ptr);
+ ir_entity *ent = get_ptr_entity(ptr);
if (vrfy_entities && ent && get_irg_phase_state(current_ir_graph) == phase_high) {
/* do NOT check this for lowered phases, see comment on Store */
break;
default:
- ASSERT_AND_RET(0, "Unknown opcode", 0);
+ /* ASSERT_AND_RET(0, "Unknown opcode", 0); */
+ break;
}
return 1;
}
long proj = get_Proj_proj(p);
ASSERT_AND_RET_DBG(
- ((proj == pn_CopyB_M && mode == mode_M) ||
- (proj == pn_CopyB_X_except && mode == mode_X)),
+ ((proj == pn_CopyB_M_regular && mode == mode_M) ||
+ (proj == pn_CopyB_X_except && mode == mode_X) ||
+ (proj == pn_CopyB_M_except && mode == mode_M)),
"wrong Proj from CopyB", 0,
show_proj_failure(p);
);
ir_mode *mode = get_irn_mode(p);
long proj = get_Proj_proj(p);
+ /* ignore Bound checks of Bad */
+ if (is_Bad(get_Bound_index(n)))
+ return 1;
ASSERT_AND_RET_DBG(
((proj == pn_Bound_M && mode == mode_M) ||
(proj == pn_Bound_X_except && mode == mode_X) ||
}
/* End block may only have Return, Raise or fragile ops as preds. */
- if (n == get_irg_end_block(irg))
+ if (n == get_irg_end_block(irg) && get_irg_phase_state(irg) != phase_backend)
for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) {
ir_node *pred = skip_Proj(get_Block_cfgpred(n, i));
if (is_Proj(pred) || get_irn_op(pred) == op_Tuple)
break; /* We can not test properly. How many tuples are there? */
- ASSERT_AND_RET(((get_irn_op(pred) == op_Return) ||
+ ASSERT_AND_RET((is_Return(pred) ||
is_Bad(pred) ||
(get_irn_op(pred) == op_Raise) ||
is_fragile_op(pred) ),
mymode == mode_b) /* we want boolean constants for static evaluation */
,"Const node", 0 /* of Cmp. */
);
+ ASSERT_AND_RET(
+ /* the modes of the constant and teh tarval must match */
+ mymode == get_tarval_mode(get_Const_tarval(n)),
+ "Const node, tarval and node mode mismatch", 0
+ );
return 1;
}
ir_mode *mymode = get_irn_mode(n);
if (get_SymConst_kind(n) == symconst_addr_ent) {
- entity *ent = get_SymConst_entity(n);
+ ir_entity *ent = get_SymConst_entity(n);
if (is_Method_type(get_entity_type(ent)) &&
get_irn_irg(n) != get_const_code_irg()) {
#if 1
ir_mode *mymode = get_irn_mode(n);
ir_mode *op1mode = get_irn_mode(get_Sel_mem(n));
ir_mode *op2mode = get_irn_mode(get_Sel_ptr(n));
- entity *ent;
+ ir_entity *ent;
ASSERT_AND_RET_DBG(
/* Sel: BB x M x ref x int^n --> ref */
ASSERT_AND_RET_DBG(
/* And or Or or Eor: BB x int x int --> int */
- mode_is_int(mymode) &&
+ (mode_is_int(mymode) || mymode == mode_b) &&
op2mode == op1mode &&
mymode == op2mode,
"And, Or or Eor node", 0,
);
}
ASSERT_AND_RET( mode_is_dataM(mymode), "Phi node", 0 );
+
+ if (mymode == mode_M) {
+ for (i = get_Phi_n_preds(n) - 1; i >= 0; --i) {
+ int j;
+ ir_node *pred_i = get_Phi_pred(n, i);
+
+ if (is_Bad(pred_i))
+ continue;
+ for (j = i - 1; j >= 0; --j) {
+ ir_node *pred_j = get_Phi_pred(n, j);
+
+ if (is_Bad(pred_j))
+ continue;
+#if 0
+ /* currently this checks fails for blocks with exception
+ outputs (and these are NOT basic blocks). So it is disabled yet. */
+ ASSERT_AND_RET_DBG(
+ (pred_i == pred_j) || (get_irn_n(pred_i, -1) != get_irn_n(pred_j, -1)),
+ "At least two different PhiM predecessors are in the same block",
+ 0,
+ ir_printf("%+F and %+F of %+F are in %+F\n", pred_i, pred_j, n, get_irn_n(pred_i, -1))
+ );
+#endif
+ }
+ }
+ }
return 1;
}
ir_mode *op1mode = get_irn_mode(get_Load_mem(n));
ir_mode *op2mode = get_irn_mode(get_Load_ptr(n));
- ASSERT_AND_RET(
- /* Load: BB x M x ref --> M x X x data */
- op1mode == mode_M && mode_is_reference(op2mode),
- "Load node", 0
- );
+ ASSERT_AND_RET(op1mode == mode_M, "Load node", 0);
+ if(get_irg_phase_state(irg) != phase_backend) {
+ ASSERT_AND_RET(mode_is_reference(op2mode), "Load node", 0 );
+ } else {
+ ASSERT_AND_RET(mode_is_reference(op2mode) ||
+ (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "Load node", 0 );
+ }
ASSERT_AND_RET( mymode == mode_T, "Load node", 0 );
/*
* mode_T
*
{
- entity *ent = hunt_for_entity (get_Load_ptr (n), n);
+ ir_entity *ent = hunt_for_entity (get_Load_ptr (n), n);
assert ((NULL != ent) || (mymode != mode_T));
}
*/
* verify a Store node
*/
static int verify_node_Store(ir_node *n, ir_graph *irg) {
- entity *target;
+ ir_entity *target;
ir_mode *mymode = get_irn_mode(n);
ir_mode *op1mode = get_irn_mode(get_Store_mem(n));
ir_mode *op2mode = get_irn_mode(get_Store_ptr(n));
ir_mode *op3mode = get_irn_mode(get_Store_value(n));
- ASSERT_AND_RET(
- /* Store: BB x M x ref x data --> M x X */
- op1mode == mode_M && mode_is_reference(op2mode) && mode_is_data(op3mode),
- "Store node", 0
- );
+ ASSERT_AND_RET(op1mode == mode_M && mode_is_data(op3mode), "Store node", 0 );
+ if(get_irg_phase_state(irg) != phase_backend) {
+ ASSERT_AND_RET(mode_is_reference(op2mode), "Store node", 0 );
+ } else {
+ ASSERT_AND_RET(mode_is_reference(op2mode) ||
+ (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "Store node", 0 );
+ }
ASSERT_AND_RET(mymode == mode_T, "Store node", 0);
target = get_ptr_entity(get_Store_ptr(n));
ir_type *t = get_CopyB_type(n);
/* CopyB: BB x M x ref x ref --> M x X */
- ASSERT_AND_RET(
- mymode == mode_T &&
- op1mode == mode_M &&
- mode_is_reference(op2mode) &&
- mode_is_reference(op3mode),
- "CopyB node", 0 ); /* operand M x ref x ref */
+ ASSERT_AND_RET(mymode == mode_T && op1mode == mode_M, "CopyB node", 0);
+ if(get_irg_phase_state(irg) != phase_backend) {
+ ASSERT_AND_RET(mode_is_reference(op2mode) && mode_is_reference(op3mode),
+ "CopyB node", 0 );
+ } else {
+ ASSERT_AND_RET(mode_is_reference(op2mode) ||
+ (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "Load node", 0 );
+ ASSERT_AND_RET(mode_is_reference(op3mode) ||
+ (mode_is_int(op3mode) && get_mode_size_bits(op3mode) == get_mode_size_bits(mode_P)), "Load node", 0 );
+ }
ASSERT_AND_RET(
is_compound_type(t),
return 1;
}
-/*
+/**
* Check dominance.
* For each usage of a node, it is checked, if the block of the
* node dominates the block of the usage (for phis: the predecessor
* block of the phi for the corresponding edge).
+ *
+ * @return non-zero on success, 0 on dominance error
*/
static int check_dominance_for_node(ir_node *use)
{
show_node_on_graph(irg, n);
);
assert(get_irn_irg(n) == irg);
+ {
+ unsigned idx = get_irn_idx(n);
+ ir_node *node_from_map = get_idx_irn(irg, idx);
+ ASSERT_AND_RET_DBG(node_from_map == n, "Node index and index map entry differ", 0, ir_printf("node %+F node in map %+F(%p)", n, node_from_map, node_from_map));
+ }
}
op = get_irn_op(n);
current_ir_graph = rem;
if (get_node_verification_mode() == FIRM_VERIFICATION_REPORT && ! res) {
- entity *ent = get_irg_entity(current_ir_graph);
+ ir_entity *ent = get_irg_entity(current_ir_graph);
if (ent)
fprintf(stderr, "irg_verify: Verifying graph %s failed\n", get_entity_name(ent));
firm_vrfy_failure_msg = NULL;
do_node_verification(FIRM_VERIFICATION_ERROR_ONLY);
res = irn_vrfy_irg(n, irg);
- if (! res && get_irg_dom_state(irg) == dom_consistent &&
+ if (res && get_irg_dom_state(irg) == dom_consistent &&
get_irg_pinned(irg) == op_pin_state_pinned)
res = check_dominance_for_node(n);
do_node_verification(old);
fprintf(stderr, "irg_vrfy_bads: Block %ld has Bad predecessor\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
+ dump_ir_block_graph(current_ir_graph, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_vrfy_bads: node %ld has Bad Block\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
+ dump_ir_block_graph(current_ir_graph, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_vrfy_bads: node %ld is a Tuple\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
+ dump_ir_block_graph(current_ir_graph, "-assert");
assert(0 && "Tuple detected");
}
}
fprintf(stderr, "irg_vrfy_bads: Phi %ld has Bad Input\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
+ dump_ir_block_graph(current_ir_graph, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_vrfy_bads: node %ld has Bad Input\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
+ dump_ir_block_graph(current_ir_graph, "-assert");
assert(0 && "Bad NON-CF detected");
}
}
/*
* set the default verify operation
*/
-void firm_set_default_verifyer(opcode code, ir_op_ops *ops)
+void firm_set_default_verifyer(ir_opcode code, ir_op_ops *ops)
{
#define CASE(a) \
case iro_##a: \
projects / libfirm / blobdiff