# include "irdump.h"
# include "irdom_t.h"
# include "irprintf.h"
+# include "irouts.h"
/** if this flag is set, verify entity types in Load & Store nodes */
static int vrfy_entities = 0;
op = get_irn_op(pred);
- if (op->verify_proj_node)
- return op->verify_proj_node(pred, p);
+ if (op->ops.verify_proj_node)
+ return op->ops.verify_proj_node(pred, p);
/* all went ok */
return 1;
mode_is_int(op1mode) ), "Cond node", 0
);
ASSERT_AND_RET(mymode == mode_T, "Cond mode is not a tuple", 0);
+
+ if (op1mode == mode_b && get_irg_outs_state(irg) == outs_consistent &&
+ !is_Block_dead(get_nodes_block(n))) {
+ /* we have consistent outs, check for the right number of Proj's */
+ ASSERT_AND_RET(
+ get_irn_n_outs(n) == 2,
+ "Live binary Cond node must have 2 successors", 0);
+ }
return 1;
}
return 1;
}
+/**
+ * verify a CopyB node
+ */
+static int verify_node_CopyB(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_CopyB_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_CopyB_dst(n));
+ ir_mode *op3mode = get_irn_mode(get_CopyB_src(n));
+ type *t = get_CopyB_type(n);
+
+ /* CopyB: BB x M x ref x ref --> M x X */
+ ASSERT_AND_RET(
+ mymode == mode_T &&
+ op1mode == mode_M &&
+ mode_is_reference(op2mode) &&
+ mode_is_reference(op3mode),
+ "CopyB node", 0 ); /* operand M x ref x ref */
+
+ ASSERT_AND_RET(
+ is_compound_type(t),
+ "CopyB node should copy compound types only", 0 );
+
+ /* NoMem nodes are only allowed as memory input if the CopyB is NOT pinned.
+ This should happen RARELY, as CopyB COPIES MEMORY */
+ ASSERT_AND_RET(
+ (get_irn_op(get_CopyB_mem(n)) == op_NoMem) ||
+ (get_irn_op(get_CopyB_mem(n)) != op_NoMem && get_irn_pinned(n) == op_pin_state_pinned),
+ "CopyB node with wrong memory input", 0 );
+ return 1;
+}
+
/*
* Check dominance.
* For each usage of a node, it is checked, if the block of the
return 1;
}
+/* Tests the modes of n and its predecessors. */
int irn_vrfy_irg(ir_node *n, ir_graph *irg)
{
int i;
return 1;
}
- if (op->verify_node)
- return op->verify_node(n, irg);
+ if (op->ops.verify_node)
+ return op->ops.verify_node(n, irg);
/* All went ok */
return 1;
/**
* Walker to check every node including SSA property.
- * Only called if domonance info is available.
+ * Only called if dominance info is available.
*/
static void vrfy_wrap_ssa(ir_node *node, void *env)
{
current_ir_graph = irg;
last_irg_error = NULL;
- assert(get_irg_pinned(irg) == op_pin_state_pinned);
+ assert(get_irg_pinned(irg) == op_pin_state_pinned && "Verification need pinned graph");
if (flags & VRFY_ENFORCE_SSA)
compute_doms(irg);
firm_vrfy_failure_msg = NULL;
opt_do_node_verification = NODE_VERIFICATION_ERROR_ONLY;
res = irn_vrfy_irg(n, irg);
+ if (! res && get_irg_dom_state(irg) == dom_consistent &&
+ get_irg_pinned(irg) == op_pin_state_pinned)
+ res = check_dominance_for_node(n);
opt_do_node_verification = old;
*bad_string = firm_vrfy_failure_msg;
/*
* set the default verify operation
*/
-void firm_set_default_verifyer(ir_op *op)
+void firm_set_default_verifyer(opcode code, ir_op_ops *ops)
{
-#define CASE(a) \
- case iro_##a: \
- op->verify_node = verify_node_##a; \
+#define CASE(a) \
+ case iro_##a: \
+ ops->verify_node = verify_node_##a; \
break
- switch (op->code) {
+ switch (code) {
CASE(Proj);
CASE(Block);
CASE(Start);
CASE(Sync);
CASE(Confirm);
CASE(Mux);
+ CASE(CopyB);
default:
- op->verify_node = NULL;
+ /* leave NULL */;
}
#undef CASE
#define CASE(a) \
case iro_##a: \
- op->verify_proj_node = verify_node_Proj_##a; \
+ ops->verify_proj_node = verify_node_Proj_##a; \
break
- switch (op->code) {
+ switch (code) {
CASE(Start);
CASE(Cond);
CASE(Raise);
CASE(EndReg);
CASE(EndExcept);
default:
- op->verify_proj_node = NULL;
+ /* leave NULL */;
}
#undef CASE
}