/*
- * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
#include "irouts.h"
#include "irflag_t.h"
#include "irpass_t.h"
+#include "irnodeset.h"
/** if this flag is set, verify entity types in Load & Store nodes */
static int verify_entities = 0;
}
}
+static const char *get_irn_modename(const ir_node *node)
+{
+ ir_mode *mode = get_irn_mode(node);
+ return get_mode_name(mode);
+}
+
/**
* Prints a failure for a Node
*/
*/
static void show_call_param(ir_node *n, ir_type *mt)
{
- int i;
+ size_t i;
char type_name[256];
ir_print_type(type_name, sizeof(type_name), mt);
ir_entity *ent = get_irg_entity(irg);
show_entity_failure(n);
- fprintf(stderr, " Return node %ld in entity \"%s\" has %d results different from type %d\n",
+ fprintf(stderr, " Return node %ld in entity \"%s\" has %lu results different from type %lu\n",
get_irn_node_nr(n), get_entity_name(ent),
- get_Return_n_ress(n), get_method_n_ress(mt));
+ (unsigned long) get_Return_n_ress(n),
+ (unsigned long) get_method_n_ress(mt));
}
/**
(proj == pn_Start_X_initial_exec && mode == mode_X) ||
(proj == pn_Start_M && mode == mode_M) ||
(proj == pn_Start_P_frame_base && mode_is_reference(mode)) ||
- (proj == pn_Start_P_tls && mode_is_reference(mode)) ||
(proj == pn_Start_T_args && mode == mode_T)
),
"wrong Proj from Start", 0,
ASSERT_AND_RET_DBG(
(
(proj >= 0 && mode == mode_X && get_irn_mode(get_Cond_selector(pred)) == mode_b) || /* compare */
- (mode == mode_X && mode_is_int(get_irn_mode(get_Cond_selector(pred)))) || /* switch */
- is_Bad(get_Cond_selector(pred)) /* rare */
+ (mode == mode_X && mode_is_int(get_irn_mode(get_Cond_selector(pred)))) /* switch */
),
"wrong Proj from Cond", 0,
show_proj_failure(p);
(proj == pn_Call_M && mode == mode_M) ||
(proj == pn_Call_X_regular && mode == mode_X) ||
(proj == pn_Call_X_except && mode == mode_X) ||
- (proj == pn_Call_T_result && mode == mode_T) ||
- (proj == pn_Call_P_value_res_base && mode_is_reference(mode))
+ (proj == pn_Call_T_result && mode == mode_T)
),
"wrong Proj from Call", 0,
show_proj_failure(p);
return 1;
}
-/**
- * verify a Proj(Quot) node
- */
-static int verify_node_Proj_Quot(ir_node *n, ir_node *p)
-{
- ir_mode *mode = get_irn_mode(p);
- long proj = get_Proj_proj(p);
-
- ASSERT_AND_RET_DBG(
- (
- (proj == pn_Quot_M && mode == mode_M) ||
- (proj == pn_Quot_X_regular && mode == mode_X) ||
- (proj == pn_Quot_X_except && mode == mode_X) ||
- (proj == pn_Quot_res && mode_is_float(mode) && mode == get_Quot_resmode(n))
- ),
- "wrong Proj from Quot", 0,
- show_proj_failure(p);
- );
- if (proj == pn_Quot_X_regular)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Regular Proj from unpinned Quot", 0);
- else if (proj == pn_Quot_X_except)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Exception Proj from unpinned Quot", 0);
- else if (proj == pn_Quot_M)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Memory Proj from unpinned Quot", 0);
- return 1;
-}
-
-/**
- * verify a Proj(DivMod) node
- */
-static int verify_node_Proj_DivMod(ir_node *n, ir_node *p)
-{
- ir_mode *mode = get_irn_mode(p);
- long proj = get_Proj_proj(p);
-
- ASSERT_AND_RET_DBG(
- (
- (proj == pn_DivMod_M && mode == mode_M) ||
- (proj == pn_DivMod_X_regular && mode == mode_X) ||
- (proj == pn_DivMod_X_except && mode == mode_X) ||
- (proj == pn_DivMod_res_div && mode_is_int(mode) && mode == get_DivMod_resmode(n)) ||
- (proj == pn_DivMod_res_mod && mode_is_int(mode) && mode == get_DivMod_resmode(n))
- ),
- "wrong Proj from DivMod", 0,
- show_proj_failure(p);
- );
- if (proj == pn_DivMod_X_regular)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Regular Proj from unpinned DivMod", 0);
- else if (proj == pn_DivMod_X_except)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Exception Proj from unpinned DivMod", 0);
- else if (proj == pn_DivMod_M)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Memory Proj from unpinned DivMod", 0);
- return 1;
-}
-
/**
* verify a Proj(Div) node
*/
(proj == pn_Div_M && mode == mode_M) ||
(proj == pn_Div_X_regular && mode == mode_X) ||
(proj == pn_Div_X_except && mode == mode_X) ||
- (proj == pn_Div_res && mode_is_int(mode) && mode == get_Div_resmode(n))
+ (proj == pn_Div_res && mode_is_data(mode) && mode == get_Div_resmode(n))
),
"wrong Proj from Div", 0,
show_proj_failure(p);
(proj == pn_Mod_M && mode == mode_M) ||
(proj == pn_Mod_X_regular && mode == mode_X) ||
(proj == pn_Mod_X_except && mode == mode_X) ||
- (proj == pn_Mod_res && mode_is_int(mode) && mode == get_Mod_resmode(n))
+ (proj == pn_Mod_res && mode == get_Mod_resmode(n))
),
"wrong Proj from Mod", 0,
show_proj_failure(p);
return 1;
}
-/**
- * verify a Proj(Cmp) node
- */
-static int verify_node_Proj_Cmp(ir_node *n, ir_node *p)
-{
- ir_mode *mode = get_irn_mode(p);
- long proj = get_Proj_proj(p);
- (void) n;
-
- ASSERT_AND_RET_DBG(
- (proj >= 0 && proj <= 15 && mode == mode_b),
- "wrong Proj from Cmp", 0,
- show_proj_failure(p);
- );
- ASSERT_AND_RET_DBG(
- (mode_is_float(get_irn_mode(get_Cmp_left(n))) || !(proj & pn_Cmp_Uo)),
- "unordered Proj for non-float Cmp", 0,
- show_proj_failure(p);
- );
- return 1;
-}
-
/**
* verify a Proj(Load) node
*/
long proj = get_Proj_proj(p);
if (proj == pn_Load_res) {
- ir_node *ptr = get_Load_ptr(n);
+ ir_node *ptr = get_Load_ptr(n);
ir_entity *ent = get_ptr_entity(ptr);
+ ir_graph *irg = get_irn_irg(n);
- if (verify_entities && ent && get_irg_phase_state(current_ir_graph) == phase_high) {
+ if (verify_entities && ent && get_irg_phase_state(irg) == phase_high) {
/* do NOT check this for lowered phases, see comment on Store */
ASSERT_AND_RET_DBG(
(mode == get_type_mode(get_entity_type(ent))),
(proj >= 0 && mode_is_datab(mode)),
"wrong Proj from Proj from Start", 0);
ASSERT_AND_RET(
- (proj < get_method_n_params(mt)),
+ (proj < (int)get_method_n_params(mt)),
"More Projs for args than args in type", 0
);
if ((mode_is_reference(mode)) && is_compound_type(get_method_param_type(mt, proj)))
ASSERT_AND_RET(mt == get_unknown_type() || is_Method_type(mt),
"wrong call type on call", 0);
ASSERT_AND_RET(
- (proj < get_method_n_ress(mt)),
+ (proj < (int)get_method_n_ress(mt)),
"More Projs for results than results in type.", 0);
if ((mode_is_reference(mode)) && is_compound_type(get_method_res_type(mt, proj)))
/* value result */ break;
/* We don't test */
break;
- case iro_Bad:
- /* hmm, optimization did not remove it */
- break;
-
default:
/* ASSERT_AND_RET(0, "Unknown opcode", 0); */
break;
ir_mode *mode = get_irn_mode(p);
long proj = get_Proj_proj(p);
- /* ignore Bound checks of Bad */
- if (is_Bad(get_Bound_index(n)))
- return 1;
ASSERT_AND_RET_DBG(
(
(proj == pn_Bound_M && mode == mode_M) ||
static int verify_node_Block(ir_node *n, ir_graph *irg)
{
int i;
- ir_node *mb = get_Block_MacroBlock(n);
-
- ASSERT_AND_RET(is_Block(mb) || is_Bad(mb), "Block node with wrong MacroBlock", 0);
-
- if (is_Block(mb) && mb != n) {
- ir_node *pred;
-
- /* Blocks with more than one predecessor must be header blocks */
- ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 1, "partBlock with more than one predecessor", 0);
- if (get_irg_phase_state(irg) != phase_backend) {
- pred = get_Block_cfgpred(n, 0);
- if (is_Proj(pred)) {
- /* the predecessor MUST be a regular Proj */
- ir_node *frag_op = get_Proj_pred(pred);
- ASSERT_AND_RET(
- is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular,
- "partBlock with non-regular predecessor", 0);
- } else {
- /* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization
- of fragile nodes during construction. It does not violate our assumption of dominance
- so let it. */
- ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred),
- "partBlock with non-regular predecessor", 0);
- }
- } else {
- /* relax in backend: Bound nodes are probably lowered into conditional jumps */
- }
- }
for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) {
ir_node *pred = get_Block_cfgpred(n, i);
- ASSERT_AND_RET(
- is_Bad(pred) || (get_irn_mode(pred) == mode_X),
+ ASSERT_AND_RET(get_irn_mode(pred) == mode_X,
"Block node must have a mode_X predecessor", 0);
+ ASSERT_AND_RET(is_cfop(skip_Proj(skip_Tuple(pred))), "Block predecessor must be a cfop", 0);
}
if (n == get_irg_start_block(irg)) {
ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 0, "Start Block node", 0);
}
- if (n == get_irg_end_block(irg) && get_irg_phase_state(irg) != phase_backend)
+ if (n == get_irg_end_block(irg) && get_irg_phase_state(irg) != phase_backend) {
/* End block may only have Return, Raise or fragile ops as preds. */
for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) {
ir_node *pred = skip_Proj(get_Block_cfgpred(n, i));
break; /* We can not test properly. How many tuples are there? */
ASSERT_AND_RET(
(
- is_Return(pred) ||
- is_Unreachable(pred) ||
- is_Bad(pred) ||
- is_Raise(pred) ||
+ is_Return(pred) ||
+ is_Bad(pred) ||
+ is_Raise(pred) ||
is_fragile_op(pred)
),
"End Block node", 0);
}
- /* irg attr must == graph we are in. */
- ASSERT_AND_RET(((get_irn_irg(n) && get_irn_irg(n) == irg)), "Block node has wrong irg attribute", 0);
- return 1;
+ }
+ /* irg attr must == graph we are in. */
+ ASSERT_AND_RET(((get_irn_irg(n) && get_irn_irg(n) == irg)), "Block node has wrong irg attribute", 0);
+ return 1;
}
/**
ASSERT_AND_RET( mymode == mode_X, "Result X", 0 ); /* result X */
/* Compare returned results with result types of method type */
mt = get_entity_type(get_irg_entity(irg));
- ASSERT_AND_RET_DBG( get_Return_n_ress(n) == get_method_n_ress(mt),
+ ASSERT_AND_RET_DBG(get_Return_n_ress(n) == get_method_n_ress(mt),
"Number of results for Return doesn't match number of results in type.", 0,
show_return_nres(irg, n, mt););
for (i = get_Return_n_ress(n) - 1; i >= 0; --i) {
ir_mode *op1mode = get_irn_mode(get_Call_mem(n));
ir_mode *op2mode = get_irn_mode(get_Call_ptr(n));
ir_type *mt;
- int i;
+ size_t i;
+ size_t n_params;
(void) irg;
/* Call: BB x M x ref x data1 x ... x datan
return 1;
}
- for (i = get_Call_n_params(n) - 1; i >= 0; --i) {
+ n_params = get_Call_n_params(n);
+ for (i = 0; i < n_params; ++i) {
ASSERT_AND_RET( mode_is_datab(get_irn_mode(get_Call_param(n, i))), "Call node", 0 ); /* operand datai */
}
return 1;
}
-/**
- * verify a Quot node
- */
-static int verify_node_Quot(ir_node *n, ir_graph *irg)
-{
- ir_mode *mymode = get_irn_mode(n);
- ir_mode *op1mode = get_irn_mode(get_Quot_mem(n));
- ir_mode *op2mode = get_irn_mode(get_Quot_left(n));
- ir_mode *op3mode = get_irn_mode(get_Quot_right(n));
- (void) irg;
-
- ASSERT_AND_RET_DBG(
- /* Quot: BB x M x float x float --> M x X x float */
- op1mode == mode_M && op2mode == op3mode &&
- get_mode_sort(op2mode) == irms_float_number &&
- mymode == mode_T,
- "Quot node",0,
- show_binop_failure(n, "/* Quot: BB x M x float x float --> M x X x float */");
- );
- return 1;
-}
-
-/**
- * verify a DivMod node
- */
-static int verify_node_DivMod(ir_node *n, ir_graph *irg)
-{
- ir_mode *mymode = get_irn_mode(n);
- ir_mode *op1mode = get_irn_mode(get_DivMod_mem(n));
- ir_mode *op2mode = get_irn_mode(get_DivMod_left(n));
- ir_mode *op3mode = get_irn_mode(get_DivMod_right(n));
- (void) irg;
-
- ASSERT_AND_RET(
- /* DivMod: BB x M x int x int --> M x X x int x int */
- op1mode == mode_M &&
- mode_is_int(op2mode) &&
- op3mode == op2mode &&
- mymode == mode_T,
- "DivMod node", 0
- );
- return 1;
-}
-
/**
* verify a Div node
*/
(void) irg;
ASSERT_AND_RET(
- /* Div: BB x M x int x int --> M x X x int */
+ /* Div: BB x M x data x data --> M x X x data */
op1mode == mode_M &&
op2mode == op3mode &&
- mode_is_int(op2mode) &&
+ mode_is_data(op2mode) &&
mymode == mode_T,
"Div node", 0
);
return 1;
}
-/**
- * verify an Abs node
- */
-static int verify_node_Abs(ir_node *n, ir_graph *irg)
-{
- ir_mode *mymode = get_irn_mode(n);
- ir_mode *op1mode = get_irn_mode(get_Abs_op(n));
- (void) irg;
-
- ASSERT_AND_RET_DBG(
- /* Abs: BB x num --> num */
- op1mode == mymode &&
- mode_is_num (op1mode),
- "Abs node", 0,
- show_unop_failure(n, "/* Abs: BB x num --> num */");
- );
- return 1;
-}
-
/**
* verify a logical And, Or, Eor node
*/
ASSERT_AND_RET_DBG(
/* And or Or or Eor: BB x int x int --> int */
- (mode_is_int(mymode) || mymode == mode_b) &&
+ (mode_is_int(mymode) || mode_is_reference(mymode) || mymode == mode_b) &&
op2mode == op1mode &&
mymode == op2mode,
"And, Or or Eor node", 0,
/* Cmp: BB x datab x datab --> b16 */
mode_is_datab(op1mode) &&
op2mode == op1mode &&
- mymode == mode_T,
+ mymode == mode_b,
"Cmp node", 0,
show_binop_failure(n, "/* Cmp: BB x datab x datab --> b16 */");
);
/* Phi: BB x dataM^n --> dataM */
for (i = get_Phi_n_preds(n) - 1; i >= 0; --i) {
ir_node *pred = get_Phi_pred(n, i);
- if (!is_Bad(pred)) {
- ASSERT_AND_RET_DBG(
- get_irn_mode(pred) == mymode,
- "Phi node", 0,
- show_phi_failure(n, pred, i);
- );
- }
+ ASSERT_AND_RET_DBG(get_irn_mode(pred) == mymode,
+ "Phi node", 0, show_phi_failure(n, pred, i);
+ );
}
ASSERT_AND_RET(mode_is_dataM(mymode) || mymode == mode_b, "Phi node", 0 );
+#if 0
if (mymode == mode_M) {
for (i = get_Phi_n_preds(n) - 1; i >= 0; --i) {
int j;
ir_node *pred_i = get_Phi_pred(n, i);
- if (is_Bad(pred_i))
- continue;
for (j = i - 1; j >= 0; --j) {
ir_node *pred_j = get_Phi_pred(n, j);
- if (is_Bad(pred_j))
- continue;
-#if 0
/* currently this checks fails for blocks with exception
outputs (and these are NOT basic blocks). So it is disabled yet. */
ASSERT_AND_RET_DBG(
0,
ir_printf("%+F and %+F of %+F are in %+F\n", pred_i, pred_j, n, get_irn_n(pred_i, -1))
);
-#endif
}
}
}
+#endif
return 1;
}
ASSERT_AND_RET(mymode == mode_T, "Store node", 0);
target = get_ptr_entity(get_Store_ptr(n));
- if (verify_entities && target && get_irg_phase_state(current_ir_graph) == phase_high) {
+ if (verify_entities && target && get_irg_phase_state(irg) == phase_high) {
/*
* If lowered code, any Sels that add 0 may be removed, causing
* an direct access to entities of array or compound type.
*/
static int check_dominance_for_node(ir_node *use)
{
- if (is_Block(use)) {
- ir_node *mbh = get_Block_MacroBlock(use);
-
- if (mbh != use) {
- /* must be a partBlock */
- if (is_Block(mbh)) {
- ASSERT_AND_RET(block_dominates(mbh, use), "MacroBlock header must dominate a partBlock", 0);
- }
- }
- }
/* This won't work for blocks and the end node */
- else if (use != get_irg_end(current_ir_graph) && use != current_ir_graph->anchor) {
+ if (!is_Block(use) && !is_End(use) && !is_Anchor(use)) {
int i;
ir_node *bl = get_nodes_block(use);
for (i = get_irn_arity(use) - 1; i >= 0; --i) {
- ir_node *def = get_irn_n(use, i);
- ir_node *def_bl = get_nodes_block(def);
- ir_node *use_bl = bl;
-
- /* ignore dead definition blocks, will be removed */
- if (is_Block_dead(def_bl) || get_Block_dom_depth(def_bl) == -1)
+ ir_node *def = get_irn_n(use, i);
+ ir_node *def_bl = get_nodes_block(def);
+ ir_node *use_bl = bl;
+ ir_graph *irg;
+
+ /* we have no dominance relation for unreachable blocks, so we can't
+ * check the dominance property there */
+ if (!is_Block(def_bl) || get_Block_dom_depth(def_bl) == -1)
continue;
- if (is_Phi(use))
+ if (is_Phi(use)) {
+ if (is_Bad(def))
+ continue;
use_bl = get_Block_cfgpred_block(bl, i);
+ }
- /* ignore dead use blocks, will be removed */
- if (is_Block_dead(use_bl) || get_Block_dom_depth(use_bl) == -1)
+ if (!is_Block(use_bl) || get_Block_dom_depth(use_bl) == -1)
continue;
+ irg = get_irn_irg(use);
ASSERT_AND_RET_DBG(
block_dominates(def_bl, use_bl),
"the definition of a value used violates the dominance property", 0,
ir_fprintf(stderr,
"graph %+F: %+F of %+F must dominate %+F of user %+F input %d\n",
- current_ir_graph, def_bl, def, use_bl, use, i
+ irg, def_bl, def, use_bl, use, i
);
);
}
/* Tests the modes of n and its predecessors. */
int irn_verify_irg(ir_node *n, ir_graph *irg)
{
- int i;
ir_op *op;
if (!get_node_verification_mode())
op = get_irn_op(n);
- /* We don't want to test nodes whose predecessors are Bad,
- as we would have to special case that for each operation. */
- if (op != op_Phi && op != op_Block) {
- for (i = get_irn_arity(n) - 1; i >= 0; --i) {
- if (is_Bad(get_irn_n(n, i)))
- return 1;
- }
- }
-
if (_get_op_pinned(op) >= op_pin_state_exc_pinned) {
op_pin_state state = get_irn_pinned(n);
ASSERT_AND_RET_DBG(
state == op_pin_state_pinned,
"invalid pin state", 0,
ir_printf("node %+F", n));
+ } else if (!is_Block(n) && is_irn_pinned_in_irg(n)
+ && !is_irg_state(irg, IR_GRAPH_STATE_BAD_BLOCK)) {
+ ASSERT_AND_RET_DBG(is_Block(get_nodes_block(n)) || is_Anchor(n),
+ "block input is not a block", 0,
+ ir_printf("node %+F", n));
}
if (op->ops.verify_node)
int irn_verify(ir_node *n)
{
#ifdef DEBUG_libfirm
- return irn_verify_irg(n, current_ir_graph);
+ return irn_verify_irg(n, get_irn_irg(n));
#else
(void)n;
return 1;
*/
static void verify_wrap(ir_node *node, void *env)
{
- int *res = env;
- *res = irn_verify_irg(node, current_ir_graph);
+ int *res = (int*)env;
+ *res = irn_verify_irg(node, get_irn_irg(node));
}
/**
*/
static void verify_wrap_ssa(ir_node *node, void *env)
{
- int *res = env;
+ int *res = (int*)env;
- *res = irn_verify_irg(node, current_ir_graph);
+ *res = irn_verify_irg(node, get_irn_irg(node));
if (*res) {
*res = check_dominance_for_node(node);
}
#endif /* DEBUG_libfirm */
+typedef struct check_cfg_env_t {
+ pmap *branch_nodes; /**< map blocks to their branching nodes,
+ map mode_X nodes to the blocks they branch to */
+ int res;
+ ir_nodeset_t reachable_blocks;
+ ir_nodeset_t kept_nodes;
+ ir_nodeset_t true_projs;
+ ir_nodeset_t false_projs;
+} check_cfg_env_t;
+
+static int check_block_cfg(ir_node *block, check_cfg_env_t *env)
+{
+ pmap *branch_nodes;
+ int n_cfgpreds;
+ int i;
+
+ ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->reachable_blocks, block),
+ "Block is not reachable by blockwalker (endless loop with no kept block?)", 0,
+ ir_printf("block %+F\n", block));
+
+ n_cfgpreds = get_Block_n_cfgpreds(block);
+ branch_nodes = env->branch_nodes;
+ for (i = 0; i < n_cfgpreds; ++i) {
+ /* check that each mode_X node is only connected
+ * to 1 user */
+ ir_node *branch = get_Block_cfgpred(block, i);
+ ir_node *former_dest;
+ ir_node *former_branch;
+ ir_node *branch_proj;
+ ir_node *branch_block;
+ branch = skip_Tuple(branch);
+ if (is_Bad(branch))
+ continue;
+ former_dest = pmap_get(branch_nodes, branch);
+ ASSERT_AND_RET_DBG(former_dest==NULL || is_unknown_jump(skip_Proj(branch)),
+ "Multiple users on mode_X node", 0,
+ ir_printf("node %+F\n", branch));
+ pmap_insert(branch_nodes, branch, block);
+
+ /* check that there's only 1 branching instruction in each block */
+ branch_block = get_nodes_block(branch);
+ branch_proj = branch;
+ if (is_Proj(branch)) {
+ branch = skip_Proj(branch);
+ }
+ former_branch = pmap_get(branch_nodes, branch_block);
+
+ ASSERT_AND_RET_DBG(former_branch == NULL || former_branch == branch,
+ "Multiple branching nodes in a block", 0,
+ ir_printf("nodes %+F,%+F in block %+F\n",
+ branch, former_branch, branch_block));
+ pmap_insert(branch_nodes, branch_block, branch);
+
+ if (is_Cond(branch)) {
+ long pn = get_Proj_proj(branch_proj);
+ if (get_irn_mode(get_Cond_selector(branch)) == mode_b) {
+ if (pn == pn_Cond_true)
+ ir_nodeset_insert(&env->true_projs, branch);
+ if (pn == pn_Cond_false)
+ ir_nodeset_insert(&env->false_projs, branch);
+ } else {
+ int default_pn = get_Cond_default_proj(branch);
+ if (pn == default_pn)
+ ir_nodeset_insert(&env->true_projs, branch);
+ }
+ }
+ }
+
+ return 1;
+}
+
+static void check_cfg_walk_func(ir_node *node, void *data)
+{
+ check_cfg_env_t *env = (check_cfg_env_t*)data;
+ if (!is_Block(node))
+ return;
+ env->res &= check_block_cfg(node, env);
+}
+
+static int verify_block_branch(ir_node *block, check_cfg_env_t *env)
+{
+ ir_node *branch = pmap_get(env->branch_nodes, block);
+ ASSERT_AND_RET_DBG(branch != NULL
+ || ir_nodeset_contains(&env->kept_nodes, block)
+ || block == get_irg_end_block(get_irn_irg(block)),
+ "block contains no cfop", 0,
+ ir_printf("block %+F\n", block));
+ return 1;
+}
+
+static int verify_cond_projs(ir_node *cond, check_cfg_env_t *env)
+{
+ if (get_irn_mode(get_Cond_selector(cond)) == mode_b) {
+ ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->true_projs, cond),
+ "Cond node lacks true proj", 0,
+ ir_printf("Cond %+F\n", cond));
+ ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->false_projs, cond),
+ "Cond node lacks false proj", 0,
+ ir_printf("Cond %+F\n", cond));
+ } else {
+ ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->true_projs, cond),
+ "Cond node lacks default Proj", 0,
+ ir_printf("Cond %+F\n", cond));
+ }
+ return 1;
+}
+
+static void assert_branch(ir_node *node, void *data)
+{
+ check_cfg_env_t *env = (check_cfg_env_t*)data;
+ if (is_Block(node)) {
+ env->res &= verify_block_branch(node, env);
+ } else if (is_Cond(node)) {
+ env->res &= verify_cond_projs(node, env);
+ }
+}
+
+static void collect_reachable_blocks(ir_node *block, void *data)
+{
+ ir_nodeset_t *reachable_blocks = (ir_nodeset_t*) data;
+ ir_nodeset_insert(reachable_blocks, block);
+}
+
+/**
+ * Checks CFG well-formedness
+ */
+static int check_cfg(ir_graph *irg)
+{
+ check_cfg_env_t env;
+ env.branch_nodes = pmap_create(); /**< map blocks to branch nodes */
+ env.res = 1;
+ ir_nodeset_init(&env.reachable_blocks);
+ ir_nodeset_init(&env.true_projs);
+ ir_nodeset_init(&env.false_projs);
+
+ irg_block_walk_graph(irg, collect_reachable_blocks, NULL,
+ &env.reachable_blocks);
+
+ /* note that we do not use irg_walk_block because it will miss these
+ * invalid blocks without a jump instruction which we want to detect
+ * here */
+ irg_walk_graph(irg, check_cfg_walk_func, NULL, &env);
+
+ ir_nodeset_init(&env.kept_nodes);
+ {
+ ir_node *end = get_irg_end(irg);
+ int arity = get_irn_arity(end);
+ int i;
+ for (i = 0; i < arity; ++i) {
+ ir_node *n = get_irn_n(end, i);
+ ir_nodeset_insert(&env.kept_nodes, n);
+ }
+ }
+ irg_walk_graph(irg, assert_branch, NULL, &env);
+
+ ir_nodeset_destroy(&env.false_projs);
+ ir_nodeset_destroy(&env.true_projs);
+ ir_nodeset_destroy(&env.kept_nodes);
+ ir_nodeset_destroy(&env.reachable_blocks);
+ pmap_destroy(env.branch_nodes);
+ return env.res;
+}
+
/*
* Calls irn_verify for each node in irg.
* Graph must be in state "op_pin_state_pinned".
{
int res = 1;
#ifdef DEBUG_libfirm
- ir_graph *rem;
-
- rem = current_ir_graph;
- current_ir_graph = irg;
+ int pinned = get_irg_pinned(irg) == op_pin_state_pinned;
#ifndef NDEBUG
- last_irg_error = NULL;
+ last_irg_error = NULL;
#endif /* NDEBUG */
- assert(get_irg_pinned(irg) == op_pin_state_pinned && "Verification need pinned graph");
+ if (!check_cfg(irg))
+ res = 0;
- if (flags & VERIFY_ENFORCE_SSA)
+ if (res == 1 && (flags & VERIFY_ENFORCE_SSA) && pinned)
compute_doms(irg);
irg_walk_anchors(
irg,
- get_irg_dom_state(irg) == dom_consistent &&
- get_irg_pinned(irg) == op_pin_state_pinned ? verify_wrap_ssa : verify_wrap,
- NULL, &res
+ pinned && get_irg_dom_state(irg) == dom_consistent
+ ? verify_wrap_ssa : verify_wrap,
+ NULL,
+ &res
);
if (get_node_verification_mode() == FIRM_VERIFICATION_REPORT && ! res) {
fprintf(stderr, "irg_verify: Verifying graph %p failed\n", (void *)irg);
}
- current_ir_graph = rem;
#else
(void)irg;
(void)flags;
return res;
}
-struct pass_t {
+typedef struct pass_t {
ir_graph_pass_t pass;
unsigned flags;
-};
+} pass_t;
/**
* Wrapper to irg_verify to be run as an ir_graph pass.
*/
static int irg_verify_wrapper(ir_graph *irg, void *context)
{
- struct pass_t *pass = context;
+ pass_t *pass = (pass_t*)context;
irg_verify(irg, pass->flags);
/* do NOT rerun the pass if verify is ok :-) */
return 0;
/* Creates an ir_graph pass for irg_verify(). */
ir_graph_pass_t *irg_verify_pass(const char *name, unsigned flags)
{
- struct pass_t *pass = XMALLOCZ(struct pass_t);
+ pass_t *pass = XMALLOCZ(pass_t);
def_graph_pass_constructor(
&pass->pass, name ? name : "irg_verify", irg_verify_wrapper);
*/
static void check_bads(ir_node *node, void *env)
{
- verify_bad_env_t *venv = env;
+ verify_bad_env_t *venv = (verify_bad_env_t*)env;
int i, arity = get_irn_arity(node);
+ ir_graph *irg = get_irn_irg(node);
if (is_Block(node)) {
if ((venv->flags & BAD_CF) == 0) {
fprintf(stderr, "irg_verify_bads: Block %ld has Bad predecessor\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_verify_bads: node %ld has Bad Block\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_verify_bads: node %ld is a Tuple\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Tuple detected");
}
}
fprintf(stderr, "irg_verify_bads: Phi %ld has Bad Input\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_verify_bads: node %ld has Bad Input\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Bad NON-CF detected");
}
}
/*
* set the default verify operation
*/
-void firm_set_default_verifyer(ir_opcode code, ir_op_ops *ops)
+void firm_set_default_verifier(unsigned code, ir_op_ops *ops)
{
#define CASE(a) \
case iro_##a: \
CASE(Minus);
CASE(Mul);
CASE(Mulh);
- CASE(Quot);
- CASE(DivMod);
CASE(Div);
CASE(Mod);
- CASE(Abs);
CASE(And);
CASE(Or);
CASE(Eor);
CASE(Raise);
CASE(InstOf);
CASE(Call);
- CASE(Quot);
- CASE(DivMod);
CASE(Div);
CASE(Mod);
- CASE(Cmp);
CASE(Load);
CASE(Store);
CASE(Alloc);
projects / libfirm / blobdiff