/*
- * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
}
}
+static const char *get_irn_modename(const ir_node *node)
+{
+ ir_mode *mode = get_irn_mode(node);
+ return get_mode_name(mode);
+}
+
/**
* Prints a failure for a Node
*/
*/
static void show_call_param(ir_node *n, ir_type *mt)
{
- int i;
+ size_t i;
char type_name[256];
ir_print_type(type_name, sizeof(type_name), mt);
ir_entity *ent = get_irg_entity(irg);
show_entity_failure(n);
- fprintf(stderr, " Return node %ld in entity \"%s\" has %d results different from type %d\n",
+ fprintf(stderr, " Return node %ld in entity \"%s\" has %lu results different from type %lu\n",
get_irn_node_nr(n), get_entity_name(ent),
- get_Return_n_ress(n), get_method_n_ress(mt));
+ (unsigned long) get_Return_n_ress(n),
+ (unsigned long) get_method_n_ress(mt));
}
/**
return 1;
}
-/**
- * verify a Proj(DivMod) node
- */
-static int verify_node_Proj_DivMod(ir_node *n, ir_node *p)
-{
- ir_mode *mode = get_irn_mode(p);
- long proj = get_Proj_proj(p);
-
- ASSERT_AND_RET_DBG(
- (
- (proj == pn_DivMod_M && mode == mode_M) ||
- (proj == pn_DivMod_X_regular && mode == mode_X) ||
- (proj == pn_DivMod_X_except && mode == mode_X) ||
- (proj == pn_DivMod_res_div && mode_is_int(mode) && mode == get_DivMod_resmode(n)) ||
- (proj == pn_DivMod_res_mod && mode_is_int(mode) && mode == get_DivMod_resmode(n))
- ),
- "wrong Proj from DivMod", 0,
- show_proj_failure(p);
- );
- if (proj == pn_DivMod_X_regular)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Regular Proj from unpinned DivMod", 0);
- else if (proj == pn_DivMod_X_except)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Exception Proj from unpinned DivMod", 0);
- else if (proj == pn_DivMod_M)
- ASSERT_AND_RET(
- get_irn_pinned(n) == op_pin_state_pinned,
- "Memory Proj from unpinned DivMod", 0);
- return 1;
-}
-
/**
* verify a Proj(Div) node
*/
);
ASSERT_AND_RET_DBG(
(mode_is_float(get_irn_mode(get_Cmp_left(n))) || !(proj & pn_Cmp_Uo)),
- "unordered Proj for non-float Cmp", 0,
+ "unordered Proj for non-float Cmp (Did you use Ne instead of Lg?)", 0,
show_proj_failure(p);
);
return 1;
long proj = get_Proj_proj(p);
if (proj == pn_Load_res) {
- ir_node *ptr = get_Load_ptr(n);
+ ir_node *ptr = get_Load_ptr(n);
ir_entity *ent = get_ptr_entity(ptr);
+ ir_graph *irg = get_irn_irg(n);
- if (verify_entities && ent && get_irg_phase_state(current_ir_graph) == phase_high) {
+ if (verify_entities && ent && get_irg_phase_state(irg) == phase_high) {
/* do NOT check this for lowered phases, see comment on Store */
ASSERT_AND_RET_DBG(
(mode == get_type_mode(get_entity_type(ent))),
(proj >= 0 && mode_is_datab(mode)),
"wrong Proj from Proj from Start", 0);
ASSERT_AND_RET(
- (proj < get_method_n_params(mt)),
+ (proj < (int)get_method_n_params(mt)),
"More Projs for args than args in type", 0
);
if ((mode_is_reference(mode)) && is_compound_type(get_method_param_type(mt, proj)))
ASSERT_AND_RET(mt == get_unknown_type() || is_Method_type(mt),
"wrong call type on call", 0);
ASSERT_AND_RET(
- (proj < get_method_n_ress(mt)),
+ (proj < (int)get_method_n_ress(mt)),
"More Projs for results than results in type.", 0);
if ((mode_is_reference(mode)) && is_compound_type(get_method_res_type(mt, proj)))
/* value result */ break;
static int verify_node_Block(ir_node *n, ir_graph *irg)
{
int i;
- ir_node *mb = get_Block_MacroBlock(n);
-
- ASSERT_AND_RET(is_Block(mb) || is_Bad(mb), "Block node with wrong MacroBlock", 0);
-
- if (is_Block(mb) && mb != n) {
- ir_node *pred;
-
- /* Blocks with more than one predecessor must be header blocks */
- ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 1, "partBlock with more than one predecessor", 0);
- if (get_irg_phase_state(irg) != phase_backend) {
- pred = get_Block_cfgpred(n, 0);
- if (is_Proj(pred)) {
- /* the predecessor MUST be a regular Proj */
- ir_node *frag_op = get_Proj_pred(pred);
- ASSERT_AND_RET(
- is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular,
- "partBlock with non-regular predecessor", 0);
- } else {
- /* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization
- of fragile nodes during construction. It does not violate our assumption of dominance
- so let it. */
- ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred),
- "partBlock with non-regular predecessor", 0);
- }
- } else {
- /* relax in backend: Bound nodes are probably lowered into conditional jumps */
- }
- }
for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) {
ir_node *pred = get_Block_cfgpred(n, i);
ASSERT_AND_RET(
- is_Bad(pred) || (get_irn_mode(pred) == mode_X),
+ is_Bad(pred) || (get_irn_mode(pred) == mode_X),
"Block node must have a mode_X predecessor", 0);
}
ASSERT_AND_RET( mymode == mode_X, "Result X", 0 ); /* result X */
/* Compare returned results with result types of method type */
mt = get_entity_type(get_irg_entity(irg));
- ASSERT_AND_RET_DBG( get_Return_n_ress(n) == get_method_n_ress(mt),
+ ASSERT_AND_RET_DBG(get_Return_n_ress(n) == get_method_n_ress(mt),
"Number of results for Return doesn't match number of results in type.", 0,
show_return_nres(irg, n, mt););
for (i = get_Return_n_ress(n) - 1; i >= 0; --i) {
ir_mode *op1mode = get_irn_mode(get_Call_mem(n));
ir_mode *op2mode = get_irn_mode(get_Call_ptr(n));
ir_type *mt;
- int i;
+ size_t i;
+ size_t n_params;
(void) irg;
/* Call: BB x M x ref x data1 x ... x datan
return 1;
}
- for (i = get_Call_n_params(n) - 1; i >= 0; --i) {
+ n_params = get_Call_n_params(n);
+ for (i = 0; i < n_params; ++i) {
ASSERT_AND_RET( mode_is_datab(get_irn_mode(get_Call_param(n, i))), "Call node", 0 ); /* operand datai */
}
return 1;
}
-/**
- * verify a DivMod node
- */
-static int verify_node_DivMod(ir_node *n, ir_graph *irg)
-{
- ir_mode *mymode = get_irn_mode(n);
- ir_mode *op1mode = get_irn_mode(get_DivMod_mem(n));
- ir_mode *op2mode = get_irn_mode(get_DivMod_left(n));
- ir_mode *op3mode = get_irn_mode(get_DivMod_right(n));
- (void) irg;
-
- ASSERT_AND_RET(
- /* DivMod: BB x M x int x int --> M x X x int x int */
- op1mode == mode_M &&
- mode_is_int(op2mode) &&
- op3mode == op2mode &&
- mymode == mode_T,
- "DivMod node", 0
- );
- return 1;
-}
-
/**
* verify a Div node
*/
return 1;
}
-/**
- * verify an Abs node
- */
-static int verify_node_Abs(ir_node *n, ir_graph *irg)
-{
- ir_mode *mymode = get_irn_mode(n);
- ir_mode *op1mode = get_irn_mode(get_Abs_op(n));
- (void) irg;
-
- ASSERT_AND_RET_DBG(
- /* Abs: BB x num --> num */
- op1mode == mymode &&
- mode_is_num (op1mode),
- "Abs node", 0,
- show_unop_failure(n, "/* Abs: BB x num --> num */");
- );
- return 1;
-}
-
/**
* verify a logical And, Or, Eor node
*/
(void) irg;
ASSERT_AND_RET_DBG(
- get_irg_phase_state(irg) == phase_backend ||
+ is_irg_state(irg, IR_GRAPH_STATE_BCONV_ALLOWED) ||
(mode_is_datab(op1mode) && mode_is_data(mymode)),
"Conv node", 0,
show_unop_failure(n, "/* Conv: BB x datab --> data */");
ASSERT_AND_RET(mymode == mode_T, "Store node", 0);
target = get_ptr_entity(get_Store_ptr(n));
- if (verify_entities && target && get_irg_phase_state(current_ir_graph) == phase_high) {
+ if (verify_entities && target && get_irg_phase_state(irg) == phase_high) {
/*
* If lowered code, any Sels that add 0 may be removed, causing
* an direct access to entities of array or compound type.
*/
static int check_dominance_for_node(ir_node *use)
{
- if (is_Block(use)) {
- ir_node *mbh = get_Block_MacroBlock(use);
-
- if (mbh != use) {
- /* must be a partBlock */
- if (is_Block(mbh)) {
- ASSERT_AND_RET(block_dominates(mbh, use), "MacroBlock header must dominate a partBlock", 0);
- }
- }
- }
/* This won't work for blocks and the end node */
- else if (use != get_irg_end(current_ir_graph) && use != current_ir_graph->anchor) {
+ if (!is_Block(use) && !is_End(use) && !is_Anchor(use)) {
int i;
ir_node *bl = get_nodes_block(use);
ir_node *def = get_irn_n(use, i);
ir_node *def_bl = get_nodes_block(def);
ir_node *use_bl = bl;
+ ir_graph *irg;
/* ignore dead definition blocks, will be removed */
if (is_Block_dead(def_bl) || get_Block_dom_depth(def_bl) == -1)
if (is_Block_dead(use_bl) || get_Block_dom_depth(use_bl) == -1)
continue;
+ irg = get_irn_irg(use);
ASSERT_AND_RET_DBG(
block_dominates(def_bl, use_bl),
"the definition of a value used violates the dominance property", 0,
ir_fprintf(stderr,
"graph %+F: %+F of %+F must dominate %+F of user %+F input %d\n",
- current_ir_graph, def_bl, def, use_bl, use, i
+ irg, def_bl, def, use_bl, use, i
);
);
}
int irn_verify(ir_node *n)
{
#ifdef DEBUG_libfirm
- return irn_verify_irg(n, current_ir_graph);
+ return irn_verify_irg(n, get_irn_irg(n));
#else
(void)n;
return 1;
*/
static void verify_wrap(ir_node *node, void *env)
{
- int *res = env;
- *res = irn_verify_irg(node, current_ir_graph);
+ int *res = (int*)env;
+ *res = irn_verify_irg(node, get_irn_irg(node));
}
/**
*/
static void verify_wrap_ssa(ir_node *node, void *env)
{
- int *res = env;
+ int *res = (int*)env;
- *res = irn_verify_irg(node, current_ir_graph);
+ *res = irn_verify_irg(node, get_irn_irg(node));
if (*res) {
*res = check_dominance_for_node(node);
}
{
int res = 1;
#ifdef DEBUG_libfirm
- ir_graph *rem;
-
- rem = current_ir_graph;
- current_ir_graph = irg;
#ifndef NDEBUG
last_irg_error = NULL;
fprintf(stderr, "irg_verify: Verifying graph %p failed\n", (void *)irg);
}
- current_ir_graph = rem;
#else
(void)irg;
(void)flags;
return res;
}
-struct pass_t {
+typedef struct pass_t {
ir_graph_pass_t pass;
unsigned flags;
-};
+} pass_t;
/**
* Wrapper to irg_verify to be run as an ir_graph pass.
*/
static int irg_verify_wrapper(ir_graph *irg, void *context)
{
- struct pass_t *pass = context;
+ pass_t *pass = (pass_t*)context;
irg_verify(irg, pass->flags);
/* do NOT rerun the pass if verify is ok :-) */
return 0;
/* Creates an ir_graph pass for irg_verify(). */
ir_graph_pass_t *irg_verify_pass(const char *name, unsigned flags)
{
- struct pass_t *pass = XMALLOCZ(struct pass_t);
+ pass_t *pass = XMALLOCZ(pass_t);
def_graph_pass_constructor(
&pass->pass, name ? name : "irg_verify", irg_verify_wrapper);
*/
static void check_bads(ir_node *node, void *env)
{
- verify_bad_env_t *venv = env;
+ verify_bad_env_t *venv = (verify_bad_env_t*)env;
int i, arity = get_irn_arity(node);
+ ir_graph *irg = get_irn_irg(node);
if (is_Block(node)) {
if ((venv->flags & BAD_CF) == 0) {
fprintf(stderr, "irg_verify_bads: Block %ld has Bad predecessor\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_verify_bads: node %ld has Bad Block\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_verify_bads: node %ld is a Tuple\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Tuple detected");
}
}
fprintf(stderr, "irg_verify_bads: Phi %ld has Bad Input\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Bad CF detected");
}
}
fprintf(stderr, "irg_verify_bads: node %ld has Bad Input\n", get_irn_node_nr(node));
}
if (get_node_verification_mode() == FIRM_VERIFICATION_ON) {
- dump_ir_graph(current_ir_graph, "-assert");
+ dump_ir_graph(irg, "-assert");
assert(0 && "Bad NON-CF detected");
}
}
CASE(Mul);
CASE(Mulh);
CASE(Quot);
- CASE(DivMod);
CASE(Div);
CASE(Mod);
- CASE(Abs);
CASE(And);
CASE(Or);
CASE(Eor);
CASE(InstOf);
CASE(Call);
CASE(Quot);
- CASE(DivMod);
CASE(Div);
CASE(Mod);
CASE(Cmp);
projects / libfirm / blobdiff