ir_node *aba = skip_Id(skip_Proj(ab));
if ( ( (/* aa is ProjP and aaa is Alloc */
- (get_irn_op(aa) == op_Proj)
- && (mode_is_reference(get_irn_mode(aa)))
- && (get_irn_op(aaa) == op_Alloc))
+ is_Proj(aa)
+ && mode_is_reference(get_irn_mode(aa))
+ && is_Alloc(aaa))
&& ( (/* ab is NULL */
- (get_irn_op(ab) == op_Const)
- && (mode_is_reference(get_irn_mode(ab)))
- && (get_Const_tarval(ab) == get_mode_null(get_irn_mode(ab))))
+ is_Const(ab)
+ && mode_is_reference(get_irn_mode(ab))
+ && is_Const_null(ab))
|| (/* ab is other Alloc */
- (get_irn_op(ab) == op_Proj)
- && (mode_is_reference(get_irn_mode(ab)))
- && (get_irn_op(aba) == op_Alloc)
+ is_Proj(ab)
+ && mode_is_reference(get_irn_mode(ab))
+ && is_Alloc(aba)
&& (aaa != aba))))
|| (/* aa is NULL and aba is Alloc */
- (get_irn_op(aa) == op_Const)
- && (mode_is_reference(get_irn_mode(aa)))
- && (get_Const_tarval(aa) == get_mode_null(get_irn_mode(aa)))
- && (get_irn_op(ab) == op_Proj)
- && (mode_is_reference(get_irn_mode(ab)))
- && (get_irn_op(aba) == op_Alloc)))
+ is_Const(aa)
+ && mode_is_reference(get_irn_mode(aa))
+ && is_Const_null(aa)
+ && is_Proj(ab)
+ && mode_is_reference(get_irn_mode(ab))
+ && is_Alloc(aba)))
/* 3.: */
return new_tarval_from_long(proj_nr & pn_Cmp_Ne, mode_b);
}
This should be true, as the block is matured before optimize is called.
But what about Phi-cycles with the Phi0/Id that could not be resolved?
Remaining Phi nodes are just Ids. */
- if ((n_preds == 1) && (get_irn_op(get_Block_cfgpred(n, 0)) == op_Jmp)) {
+ if (n_preds == 1 && is_Jmp(get_Block_cfgpred(n, 0))) {
ir_node *predblock = get_nodes_block(get_Block_cfgpred(n, 0));
if (predblock == oldn) {
/* Jmp jumps into the block it is in -- deal self cycle. */
n = predblock;
DBG_OPT_STG(oldn, n);
}
- } else if ((n_preds == 1) &&
- (get_irn_op(skip_Proj(get_Block_cfgpred(n, 0))) == op_Cond)) {
+ } else if (n_preds == 1 && is_Cond(skip_Proj(get_Block_cfgpred(n, 0)))) {
ir_node *predblock = get_Block_cfgpred_block(n, 0);
if (predblock == oldn) {
/* Jmp jumps into the block it is in -- deal self cycle. */
ir_node *a = get_Block_cfgpred(n, 0);
ir_node *b = get_Block_cfgpred(n, 1);
- if ((get_irn_op(a) == op_Proj) &&
- (get_irn_op(b) == op_Proj) &&
+ if (is_Proj(a) &&
+ is_Proj(b) &&
(get_Proj_pred(a) == get_Proj_pred(b)) &&
- (get_irn_op(get_Proj_pred(a)) == op_Cond) &&
+ is_Cond(get_Proj_pred(a)) &&
(get_irn_mode(get_Cond_selector(get_Proj_pred(a))) == mode_b)) {
/* Also a single entry Block following a single exit Block. Phis have
twice the same operand and will be optimized away. */
left = get_Add_left(n);
right = get_Add_right(n);
- if (get_irn_op(left) == op_Sub) {
+ if (is_Sub(left)) {
if (get_Sub_right(left) == right) {
/* (a - x) + x */
}
}
}
- if (get_irn_op(right) == op_Sub) {
+ if (is_Sub(right)) {
if (get_Sub_right(right) == left) {
/* x + (a - x) */
}
n = a;
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_CONV);
- } else if (get_irn_op(a) == op_Conv) { /* Conv(Conv(b)) */
+ } else if (is_Conv(a)) { /* Conv(Conv(b)) */
ir_mode *b_mode;
b = get_Conv_op(a);
ir_node *oldn = proj;
ir_node *a = get_Proj_pred(proj);
- if (get_irn_op(a) == op_Tuple) {
+ if (is_Tuple(a)) {
/* Remove the Tuple/Proj combination. */
if ( get_Proj_proj(proj) <= get_Tuple_n_preds(a) ) {
proj = get_Tuple_pred(a, get_Proj_proj(proj));
/* Remove dead control flow -- early gigo(). */
proj = new_Bad();
} else if (get_opt_ldst_only_null_ptr_exceptions()) {
- ir_op *op = get_irn_op(a);
-
- if (op == op_Load) {
+ if (is_Load(a)) {
/* get the Load address */
ir_node *addr = get_Load_ptr(a);
ir_node *blk = get_irn_n(a, -1);
} else
return new_r_Jmp(current_ir_graph, blk);
}
- } else if (op == op_Store) {
+ } else if (is_Store(a)) {
/* get the load/store address */
ir_node *addr = get_Store_ptr(a);
ir_node *blk = get_irn_n(a, -1);
n = get_Mux_true(n);
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_MUX_EQ);
}
- else if (get_irn_op(sel) == op_Proj && !mode_honor_signed_zeros(get_irn_mode(n))) {
+ else if (is_Proj(sel) && !mode_honor_signed_zeros(get_irn_mode(n))) {
ir_node *cmp = get_Proj_pred(sel);
long proj_nr = get_Proj_proj(sel);
ir_node *b = get_Mux_false(n);
* with NaN's because -NaN == NaN.
* However, if +0 and -0 is handled differently, we cannot use the first one.
*/
- if (get_irn_op(cmp) == op_Cmp && get_Cmp_left(cmp) == a) {
+ if (is_Cmp(cmp) && get_Cmp_left(cmp) == a) {
ir_node *cmp_r = get_Cmp_right(cmp);
if (is_Const(cmp_r) && is_Const_null(cmp_r)) {
/* Mux(a CMP 0, X, a) */
- if (get_irn_op(b) == op_Minus && get_Minus_op(b) == a) {
+ if (is_Minus(b) && get_Minus_op(b) == a) {
/* Mux(a CMP 0, -a, a) */
if (proj_nr == pn_Cmp_Eq) {
/* Mux(a == 0, -a, a) ==> -a */
ir_node *pred = get_Confirm_value(n);
pn_Cmp pnc = get_Confirm_cmp(n);
- if (get_irn_op(pred) == op_Confirm && pnc == get_Confirm_cmp(pred)) {
+ if (is_Confirm(pred) && pnc == get_Confirm_cmp(pred)) {
/*
* rare case: two identical Confirms one after another,
* replace the second one with the first.
ir_node *right = get_binop_right(n);
int ref_bits = get_mode_size_bits(mode);
- if (get_irn_op(left) == op_Conv) {
+ if (is_Conv(left)) {
ir_mode *mode = get_irn_mode(left);
int bits = get_mode_size_bits(mode);
}
}
- if (get_irn_op(right) == op_Conv) {
+ if (is_Conv(right)) {
ir_mode *mode = get_irn_mode(right);
int bits = get_mode_size_bits(mode);
if (mode_is_num(mode)) {
/* the following code leads to endless recursion when Mul are replaced by a simple instruction chain */
- if (!get_opt_arch_dep_running() && a == b && mode_is_int(mode)) {
+ if (!is_arch_dep_running() && a == b && mode_is_int(mode)) {
ir_node *block = get_irn_n(n, -1);
n = new_rd_Mul(
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_ADD_A_MINUS_B);
return n;
}
- if (! get_opt_reassociation()) {
+ if (! is_reassoc_running()) {
/* do NOT execute this code if reassociation is enabled, it does the inverse! */
if (is_Mul(a)) {
ir_node *ma = get_Mul_left(a);
ir_node *op = get_Not_op(b);
if (op == a) {
- /* ~x + x = -1 */
+ /* x + ~x = -1 */
ir_node *blk = get_irn_n(n, -1);
n = new_r_Const(current_ir_graph, blk, mode, get_mode_minus_one(mode));
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_ADD_X_NOT_X);
}
}
/* do NOT execute this code if reassociation is enabled, it does the inverse! */
- if (get_opt_reassociation() && get_irn_op(a) == op_Mul) {
+ if (!is_reassoc_running() && is_Mul(a)) {
ir_node *ma = get_Mul_left(a);
ir_node *mb = get_Mul_right(a);
return n;
}
}
- if (is_Sub(a)) {
- ir_node *x = get_Sub_left(a);
- ir_node *y = get_Sub_right(a);
- ir_node *blk = get_irn_n(n, -1);
- ir_mode *m_b = get_irn_mode(b);
- ir_mode *m_y = get_irn_mode(y);
+ if (is_Sub(a)) { /* (x - y) - b -> x - (y + b) */
+ ir_node *x = get_Sub_left(a);
+ ir_node *y = get_Sub_right(a);
+ ir_node *blk = get_irn_n(n, -1);
+ ir_mode *m_b = get_irn_mode(b);
+ ir_mode *m_y = get_irn_mode(y);
+ ir_mode *add_mode;
ir_node *add;
/* Determine the right mode for the Add. */
if (m_b == m_y)
- mode = m_b;
+ add_mode = m_b;
else if (mode_is_reference(m_b))
- mode = m_b;
+ add_mode = m_b;
else if (mode_is_reference(m_y))
- mode = m_y;
+ add_mode = m_y;
else {
/*
* Both modes are different but none is reference,
return n;
}
- add = new_r_Add(current_ir_graph, blk, y, b, mode);
+ add = new_r_Add(current_ir_graph, blk, y, b, add_mode);
n = new_rd_Sub(get_irn_dbg_info(n), current_ir_graph, blk, x, add, mode);
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_SUB_SUB_X_Y_Z);
dbg_info *dbg = get_irn_dbg_info(n);
ir_node *block = get_nodes_block(n);
- ar = new_rd_Minus(dbg, current_ir_graph, block, ar, mode);
+ ar = new_rd_Not(dbg, current_ir_graph, block, ar, mode);
n = new_rd_And(dbg, current_ir_graph, block, ar, b, mode);
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_EOR_TO_NOT);
return n;
dbg_info *dbg = get_irn_dbg_info(n);
ir_node *block = get_nodes_block(n);
- al = new_rd_Minus(dbg, current_ir_graph, block, al, mode);
+ al = new_rd_Not(dbg, current_ir_graph, block, al, mode);
n = new_rd_And(dbg, current_ir_graph, block, al, b, mode);
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_EOR_TO_NOT);
return n;
dbg_info *dbg = get_irn_dbg_info(n);
ir_node *block = get_nodes_block(n);
- br = new_rd_Minus(dbg, current_ir_graph, block, br, mode);
+ br = new_rd_Not(dbg, current_ir_graph, block, br, mode);
n = new_rd_And(dbg, current_ir_graph, block, br, a, mode);
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_EOR_TO_NOT);
return n;
dbg_info *dbg = get_irn_dbg_info(n);
ir_node *block = get_nodes_block(n);
- bl = new_rd_Minus(dbg, current_ir_graph, block, bl, mode);
+ bl = new_rd_Not(dbg, current_ir_graph, block, bl, mode);
n = new_rd_And(dbg, current_ir_graph, block, bl, a, mode);
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_EOR_TO_NOT);
return n;
HANDLE_BINOP_PHI(tarval_eor, a,b,c);
/* we can evaluate 2 Projs of the same Cmp */
- if(get_irn_mode(n) == mode_b && is_Proj(a) && is_Proj(b)) {
+ if (mode == mode_b && is_Proj(a) && is_Proj(b)) {
ir_node *pred_a = get_Proj_pred(a);
ir_node *pred_b = get_Proj_pred(b);
if(pred_a == pred_b) {
n = new_rd_Const(get_irn_dbg_info(n), current_ir_graph, get_irn_n(n, -1),
mode, get_mode_null(mode));
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_EOR_A_A);
- } else if ((mode == mode_b)
- && (get_irn_op(a) == op_Proj)
- && (get_irn_mode(a) == mode_b)
- && is_Const(b) && is_Const_one(b)
- && (get_irn_op(get_Proj_pred(a)) == op_Cmp)) {
+ } else if (mode == mode_b &&
+ is_Proj(a) &&
+ is_Const(b) && is_Const_one(b) &&
+ is_Cmp(get_Proj_pred(a))) {
/* The Eor negates a Cmp. The Cmp has the negated result anyways! */
n = new_r_Proj(current_ir_graph, get_irn_n(n, -1), get_Proj_pred(a),
mode_b, get_negated_pnc(get_Proj_proj(a), mode));
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_EOR_TO_NOT_BOOL);
- } else if (mode == mode_b && is_Const(b) && is_Const_one(b)) {
- /* The Eor is a Not. Replace it by a Not. */
- /* ????!!!Extend to bitfield 1111111. */
- n = new_r_Not(current_ir_graph, get_irn_n(n, -1), a, mode_b);
-
- DBG_OPT_ALGSIM0(oldn, n, FS_OPT_EOR_TO_NOT);
+ } else if (is_Const(b)) {
+ if (is_Not(a)) { /* ~x ^ const -> x ^ ~const */
+ ir_node *cnst = new_Const(mode, tarval_not(get_Const_tarval(b)));
+ ir_node *not_op = get_Not_op(a);
+ dbg_info *dbg = get_irn_dbg_info(n);
+ ir_graph *irg = current_ir_graph;
+ ir_node *block = get_nodes_block(n);
+ ir_mode *mode = get_irn_mode(n);
+ n = new_rd_Eor(dbg, irg, block, not_op, cnst, mode);
+ return n;
+ } else if (is_Const_all_one(b)) { /* x ^ 1...1 -> ~1 */
+ n = new_r_Not(current_ir_graph, get_nodes_block(n), a, mode);
+ DBG_OPT_ALGSIM0(oldn, n, FS_OPT_EOR_TO_NOT);
+ }
} else {
n = transform_bitwise_distributive(n, transform_node_Eor);
}
*/
static ir_node *transform_node_Not(ir_node *n) {
ir_node *c, *oldn = n;
- ir_node *a = get_Not_op(n);
- ir_op *op_a = get_irn_op(a);
+ ir_node *a = get_Not_op(n);
+ ir_mode *mode = get_irn_mode(n);
HANDLE_UNOP_PHI(tarval_not,a,c);
/* check for a boolean Not */
- if ( (get_irn_mode(n) == mode_b)
- && (op_a == op_Proj)
- && (get_irn_mode(a) == mode_b)
- && (get_irn_op(get_Proj_pred(a)) == op_Cmp)) {
+ if (mode == mode_b &&
+ is_Proj(a) &&
+ is_Cmp(get_Proj_pred(a))) {
/* We negate a Cmp. The Cmp has the negated result anyways! */
n = new_r_Proj(current_ir_graph, get_irn_n(n, -1), get_Proj_pred(a),
mode_b, get_negated_pnc(get_Proj_proj(a), mode_b));
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_NOT_CMP);
- return n;
+ return n;
}
- if (op_a == op_Sub) {
- ir_node *sub_r = get_Sub_right(a);
- if (is_Const(sub_r) && is_Const_one(sub_r)) {
- /* ~(x-1) = -x */
- ir_node *op = get_Sub_left(a);
- ir_node *blk = get_irn_n(n, -1);
- n = new_rd_Minus(get_irn_dbg_info(n), current_ir_graph, blk, op, get_irn_mode(n));
- DBG_OPT_ALGSIM0(oldn, n, FS_OPT_NOT_MINUS_1);
+ if (is_Eor(a)) {
+ ir_node *eor_b = get_Eor_right(a);
+ if (is_Const(eor_b)) { /* ~(x ^ const) -> x ^ ~const */
+ ir_node *cnst = new_Const(mode, tarval_not(get_Const_tarval(eor_b)));
+ ir_node *eor_a = get_Eor_left(a);
+ dbg_info *dbg = get_irn_dbg_info(n);
+ ir_graph *irg = current_ir_graph;
+ ir_node *block = get_nodes_block(n);
+ ir_mode *mode = get_irn_mode(n);
+ n = new_rd_Eor(dbg, irg, block, eor_a, cnst, mode);
+ return n;
+ }
+ }
+ if (get_mode_arithmetic(mode) == irma_twos_complement) {
+ if (is_Minus(a)) { /* ~-x -> x + -1 */
+ dbg_info *dbg = get_irn_dbg_info(n);
+ ir_graph *irg = current_ir_graph;
+ ir_node *block = get_nodes_block(n);
+ ir_node *add_l = get_Minus_op(a);
+ ir_node *add_r = new_rd_Const(dbg, irg, block, mode, get_mode_minus_one(mode));
+ n = new_rd_Add(dbg, irg, block, add_l, add_r, mode);
+ } else if (is_Add(a)) {
+ ir_node *add_r = get_Add_right(a);
+ if (is_Const(add_r) && is_Const_all_one(add_r)) {
+ /* ~(x + -1) = -x */
+ ir_node *op = get_Add_left(a);
+ ir_node *blk = get_irn_n(n, -1);
+ n = new_rd_Minus(get_irn_dbg_info(n), current_ir_graph, blk, op, get_irn_mode(n));
+ DBG_OPT_ALGSIM0(oldn, n, FS_OPT_NOT_MINUS_1);
+ }
}
}
return n;
return n;
}
+ if (is_Mul(a)) { /* -(a * const) -> a * -const */
+ ir_node *mul_l = get_Mul_left(a);
+ ir_node *mul_r = get_Mul_right(a);
+ if (is_Const(mul_r)) {
+ tarval *tv = tarval_neg(get_Const_tarval(mul_r));
+ ir_node *cnst = new_Const(mode, tv);
+ dbg_info *dbg = get_irn_dbg_info(a);
+ ir_graph *irg = current_ir_graph;
+ ir_node *block = get_nodes_block(a);
+ n = new_rd_Mul(dbg, irg, block, mul_l, cnst, mode);
+ return n;
+ }
+ }
+
return n;
} /* transform_node_Minus */
ir_node *pred = get_Cast_op(n);
ir_type *tp = get_irn_type(n);
- if (get_irn_op(pred) == op_Const && get_Const_type(pred) != tp) {
+ if (is_Const(pred) && get_Const_type(pred) != tp) {
n = new_rd_Const_type(NULL, current_ir_graph, get_irn_n(pred, -1), get_irn_mode(pred),
get_Const_tarval(pred), tp);
DBG_OPT_CSTEVAL(oldn, n);
- } else if ((get_irn_op(pred) == op_SymConst) && (get_SymConst_value_type(pred) != tp)) {
+ } else if (is_SymConst(pred) && get_SymConst_value_type(pred) != tp) {
n = new_rd_SymConst_type(NULL, current_ir_graph, get_irn_n(pred, -1), get_SymConst_symbol(pred),
get_SymConst_kind(pred), tp);
DBG_OPT_CSTEVAL(oldn, n);
if (value_not_zero(b, &confirm)) {
/* div(x, y) && y != 0 */
+ if (confirm == NULL) {
+ /* we are sure we have a Const != 0 */
+ new_mem = get_Div_mem(div);
+ if (is_Pin(new_mem))
+ new_mem = get_Pin_op(new_mem);
+ set_Div_mem(div, new_mem);
+ set_irn_pinned(div, op_pin_state_floats);
+ }
+
proj_nr = get_Proj_proj(proj);
switch (proj_nr) {
case pn_Div_X_regular:
/* mod(x, y) && y != 0 */
proj_nr = get_Proj_proj(proj);
+ if (confirm == NULL) {
+ /* we are sure we have a Const != 0 */
+ new_mem = get_Mod_mem(mod);
+ if (is_Pin(new_mem))
+ new_mem = get_Pin_op(new_mem);
+ set_Mod_mem(mod, new_mem);
+ set_irn_pinned(mod, op_pin_state_floats);
+ }
+
switch (proj_nr) {
case pn_Mod_X_regular:
/* This node can only float up to the Confirm block */
new_mem = new_r_Pin(current_ir_graph, get_nodes_block(confirm), new_mem);
}
- set_irn_pinned(mod, op_pin_state_floats);
/* this is a Mod without exception, we can remove the memory edge */
- set_Mod_mem(mod, get_irg_no_mem(current_ir_graph));
+ set_Mod_mem(mod, new_mem);
return res;
case pn_Mod_res:
if (get_Mod_left(mod) == b) {
/* DivMod(x, y) && y != 0 */
proj_nr = get_Proj_proj(proj);
+ if (confirm == NULL) {
+ /* we are sure we have a Const != 0 */
+ new_mem = get_DivMod_mem(divmod);
+ if (is_Pin(new_mem))
+ new_mem = get_Pin_op(new_mem);
+ set_DivMod_mem(divmod, new_mem);
+ set_irn_pinned(divmod, op_pin_state_floats);
+ }
+
switch (proj_nr) {
case pn_DivMod_X_regular:
/* This node can only float up to the Confirm block */
new_mem = new_r_Pin(current_ir_graph, get_nodes_block(confirm), new_mem);
}
- set_irn_pinned(divmod, op_pin_state_floats);
/* this is a DivMod without exception, we can remove the memory edge */
- set_DivMod_mem(divmod, get_irg_no_mem(current_ir_graph));
+ set_DivMod_mem(divmod, new_mem);
return res;
case pn_DivMod_res_mod:
/* a-b == 0 ==> a == b, a-b != 0 ==> a != b */
if (tarval_is_null(tv) && is_Sub(left)) {
- right =get_Sub_right(left);
+ right = get_Sub_right(left);
left = get_Sub_left(left);
tv = value_of(right);
}
if (tv != tarval_bad) {
- ir_op *op = get_irn_op(left);
-
/* a-c1 == c2 ==> a == c2+c1, a-c1 != c2 ==> a != c2+c1 */
- if (op == op_Sub) {
+ if (is_Sub(left)) {
ir_node *c1 = get_Sub_right(left);
tarval *tv2 = value_of(c1);
}
}
/* a+c1 == c2 ==> a == c2-c1, a+c1 != c2 ==> a != c2-c1 */
- else if (op == op_Add) {
+ else if (is_Add(left)) {
ir_node *a_l = get_Add_left(left);
ir_node *a_r = get_Add_right(left);
ir_node *a;
tarval *tv2;
- if (get_irn_op(a_l) == op_Const) {
+ if (is_Const(a_l)) {
a = a_r;
tv2 = value_of(a_l);
} else {
}
}
/* -a == c ==> a == -c, -a != c ==> a != -c */
- else if (op == op_Minus) {
+ else if (is_Minus(left)) {
tarval *tv2 = tarval_sub(get_mode_null(mode), tv);
if (tv2 != tarval_bad) {
/* the following reassociations work only for <= */
else if (proj_nr == pn_Cmp_Le || proj_nr == pn_Cmp_Lt) {
if (tv != tarval_bad) {
- ir_op *op = get_irn_op(left);
-
/* c >= 0 : Abs(a) <= c ==> (unsigned)(a + c) <= 2*c */
- if (op == op_Abs) {
+ if (get_irn_op(left) == op_Abs) { // TODO something is missing here
}
}
}
} /* tarval != bad */
}
+ if (changed & 2) /* need a new Const */
+ right = new_Const(mode, tv);
+
+ if ((proj_nr == pn_Cmp_Eq || proj_nr == pn_Cmp_Lg) && is_Const(right) && is_Const_null(right) && is_Proj(left)) {
+ ir_node *op = get_Proj_pred(left);
+
+ if ((is_Mod(op) && get_Proj_proj(left) == pn_Mod_res) ||
+ (is_DivMod(op) && get_Proj_proj(left) == pn_DivMod_res_mod)) {
+ ir_node *c = get_binop_right(op);
+
+ if (is_Const(c)) {
+ tarval *tv = get_Const_tarval(c);
+
+ if (tarval_is_single_bit(tv)) {
+ /* special case: (x % 2^n) CMP 0 ==> x & (2^n-1) CMP 0 */
+ ir_node *v = get_binop_left(op);
+ ir_node *blk = get_irn_n(op, -1);
+ ir_mode *mode = get_irn_mode(v);
+
+ tv = tarval_sub(tv, get_mode_one(mode));
+ left = new_rd_And(get_irn_dbg_info(op), current_ir_graph, blk, v, new_Const(mode, tv), mode);
+ changed |= 1;
+ }
+ }
+ }
+ }
+
if (changed) {
ir_node *block = get_irn_n(n, -1); /* Beware of get_nodes_Block() */
- if (changed & 2) /* need a new Const */
- right = new_Const(mode, tv);
-
/* create a new compare */
n = new_rd_Cmp(get_irn_dbg_info(n), current_ir_graph, block, left, right);
assert(is_op_commutative(get_irn_op(binop)));
- if (get_irn_op(op_a) == op_Const) {
+ if (is_Const(op_a)) {
*a = op_b;
*c = op_a;
} else {
shl = get_binop_left(or);
shr = get_binop_right(or);
- if (get_irn_op(shl) == op_Shr) {
- if (get_irn_op(shr) != op_Shl)
+ if (is_Shr(shl)) {
+ if (!is_Shl(shr))
return or;
irn = shl;
shl = shr;
shr = irn;
- } else if (get_irn_op(shl) != op_Shl) {
+ } else if (!is_Shl(shl)) {
return or;
- } else if (get_irn_op(shr) != op_Shr) {
+ } else if (!is_Shr(shr)) {
return or;
}
x = get_Shl_left(shl);
c1 = get_Shl_right(shl);
c2 = get_Shr_right(shr);
- if (get_irn_op(c1) == op_Const && get_irn_op(c2) == op_Const) {
+ if (is_Const(c1) && is_Const(c2)) {
tv1 = get_Const_tarval(c1);
if (! tarval_is_long(tv1))
return or;
DBG_OPT_ALGSIM1(or, shl, shr, n, FS_OPT_OR_SHFT_TO_ROT);
return n;
- } else if (get_irn_op(c1) == op_Sub) {
+ } else if (is_Sub(c1)) {
v = c2;
sub = c1;
return or;
c1 = get_Sub_left(sub);
- if (get_irn_op(c1) != op_Const)
+ if (!is_Const(c1))
return or;
tv1 = get_Const_tarval(c1);
DBG_OPT_ALGSIM0(or, n, FS_OPT_OR_SHFT_TO_ROT);
return n;
- } else if (get_irn_op(c2) == op_Sub) {
+ } else if (is_Sub(c2)) {
v = c1;
sub = c2;
c1 = get_Sub_left(sub);
- if (get_irn_op(c1) != op_Const)
+ if (!is_Const(c1))
return or;
tv1 = get_Const_tarval(c1);
}
}
- if (get_irn_op(sel) == op_Proj && !mode_honor_signed_zeros(mode)) {
+ if (is_Proj(sel) && !mode_honor_signed_zeros(mode)) {
ir_node *cmp = get_Proj_pred(sel);
long pn = get_Proj_proj(sel);
ir_node *f = get_Mux_false(n);
}
}
- if (mode_is_int(mode) && mode_is_signed(mode) &&
- get_mode_arithmetic(mode) == irma_twos_complement) {
- ir_node *x = get_Cmp_left(cmp);
-
- /* the following optimization works only with signed integer two-complement mode */
-
- if (mode == get_irn_mode(x)) {
- /*
- * FIXME: this restriction is two rigid, as it would still
- * work if mode(x) = Hs and mode == Is, but at least it removes
- * all wrong cases.
- */
- if ((pn == pn_Cmp_Lt || pn == pn_Cmp_Le) &&
- is_Const(t) && is_Const_all_one(t) &&
- is_Const(f) && is_Const_null(f)) {
- /*
- * Mux(x:T </<= 0, 0, -1) -> Shrs(x, sizeof_bits(T) - 1)
- * Conditions:
- * T must be signed.
- */
- n = new_rd_Shrs(get_irn_dbg_info(n),
- current_ir_graph, block, x,
- new_r_Const_long(current_ir_graph, block, mode_Iu,
- get_mode_size_bits(mode) - 1),
- mode);
- DBG_OPT_ALGSIM1(oldn, cmp, sel, n, FS_OPT_MUX_TO_SHR);
- return n;
- } else if ((pn == pn_Cmp_Gt || pn == pn_Cmp_Ge) &&
- is_Const(t) && is_Const_one(t) &&
- is_Const(f) && is_Const_null(f)) {
- /*
- * Mux(x:T >/>= 0, 0, 1) -> Shr(-x, sizeof_bits(T) - 1)
- * Conditions:
- * T must be signed.
- */
- n = new_rd_Shr(get_irn_dbg_info(n),
- current_ir_graph, block,
- new_r_Minus(current_ir_graph, block, x, mode),
- new_r_Const_long(current_ir_graph, block, mode_Iu,
- get_mode_size_bits(mode) - 1),
- mode);
- DBG_OPT_ALGSIM1(oldn, cmp, sel, n, FS_OPT_MUX_TO_SHR);
- return n;
- }
- }
- }
}
}
}
return n;
} /* transform_node_Psi */
+/**
+ * optimize sync nodes that have other syncs as input we simply add the inputs
+ * of the other sync to our own inputs
+ */
+static ir_node *transform_node_Sync(ir_node *n) {
+ int i, arity;
+
+ arity = get_irn_arity(n);
+ for(i = 0; i < get_irn_arity(n); /*empty*/) {
+ int i2, arity2;
+ ir_node *in = get_irn_n(n, i);
+ if(!is_Sync(in)) {
+ ++i;
+ continue;
+ }
+
+ /* set sync input 0 instead of the sync */
+ set_irn_n(n, i, get_irn_n(in, 0));
+ /* so we check this input again for syncs */
+
+ /* append all other inputs of the sync to our sync */
+ arity2 = get_irn_arity(in);
+ for(i2 = 1; i2 < arity2; ++i2) {
+ ir_node *in_in = get_irn_n(in, i2);
+ add_irn_n(n, in_in);
+ /* increase arity so we also check the new inputs for syncs */
+ arity++;
+ }
+ }
+
+ /* rehash the sync node */
+ add_identities(current_ir_graph->value_table, n);
+
+ return n;
+}
+
/**
* Tries several [inplace] [optimizing] transformations and returns an
* equivalent node. The difference to equivalent_node() is that these
CASE(End);
CASE(Mux);
CASE(Psi);
+ CASE(Sync);
default:
/* leave NULL */;
}
ir_node *oldn = n;
ir_opcode iro = get_irn_opcode(n);
- if (!get_opt_optimize() && (get_irn_op(n) != op_Phi)) return n;
+ if (!get_opt_optimize() && !is_Phi(n)) return n;
/* constant expression evaluation / constant folding */
if (get_opt_constant_folding()) {
projects / libfirm / blobdiff