DBG_OPT_CSTEVAL(n, value);
} else {
- ir_node *a = get_Div_left(n);
- ir_node *b = get_Div_right(n);
+ ir_node *a = get_Mod_left(n);
+ ir_node *b = get_Mod_right(n);
ir_node *dummy;
- ir_mode *mode = get_irn_mode(n);
+ ir_mode *mode = get_Mod_resmode(n);
if (a == b && value_not_zero(a, &dummy)) {
/* BEWARE: we can optimize a%a to 0 only if this cannot cause a exception */
* OR c2 ===> OR
* AND c1
* OR
+ *
+ *
+ * value c2 value c1
+ * AND c1 ===> OR if (c1 | c2) == 0x111..11
+ * OR
*/
static ir_node *transform_node_Or_bf_store(ir_node *or) {
ir_node *and, *c1;
tarval *tv1, *tv2, *tv3, *tv4, *tv, *n_tv4, *n_tv2;
- get_comm_Binop_Ops(or, &and, &c1);
- if ((get_irn_op(c1) != op_Const) || (get_irn_op(and) != op_And))
- return or;
+ while (1) {
+ get_comm_Binop_Ops(or, &and, &c1);
+ if (!is_Const(c1) || !is_And(and))
+ return or;
- get_comm_Binop_Ops(and, &or_l, &c2);
- if ((get_irn_op(c2) != op_Const) || (get_irn_op(or_l) != op_Or))
- return or;
+ get_comm_Binop_Ops(and, &or_l, &c2);
+ if (!is_Const(c2))
+ return or;
- get_comm_Binop_Ops(or_l, &and_l, &c3);
- if ((get_irn_op(c3) != op_Const) || (get_irn_op(and_l) != op_And))
- return or;
+ tv1 = get_Const_tarval(c1);
+ tv2 = get_Const_tarval(c2);
- get_comm_Binop_Ops(and_l, &value, &c4);
- if (get_irn_op(c4) != op_Const)
- return or;
+ tv = tarval_or(tv1, tv2);
+ if (classify_tarval(tv) == TV_CLASSIFY_ALL_ONE) {
+ /* the AND does NOT clear a bit with isn't set be the OR */
+ set_Or_left(or, or_l);
+ set_Or_right(or, c1);
- /* ok, found the pattern, check for conditions */
- assert(mode == get_irn_mode(and));
- assert(mode == get_irn_mode(or_l));
- assert(mode == get_irn_mode(and_l));
+ /* check for more */
+ continue;
+ }
- tv1 = get_Const_tarval(c1);
- tv2 = get_Const_tarval(c2);
- tv3 = get_Const_tarval(c3);
- tv4 = get_Const_tarval(c4);
+ if (!is_Or(or_l))
+ return or;
- tv = tarval_or(tv4, tv2);
- if (classify_tarval(tv) != TV_CLASSIFY_ALL_ONE) {
- /* have at least one 0 at the same bit position */
- return or;
- }
+ get_comm_Binop_Ops(or_l, &and_l, &c3);
+ if (!is_Const(c3) || !is_And(and_l))
+ return or;
- n_tv4 = tarval_not(tv4);
- if (tv3 != tarval_and(tv3, n_tv4)) {
- /* bit in the or_mask is outside the and_mask */
- return or;
- }
+ get_comm_Binop_Ops(and_l, &value, &c4);
+ if (!is_Const(c4))
+ return or;
- n_tv2 = tarval_not(tv2);
- if (tv1 != tarval_and(tv1, n_tv2)) {
- /* bit in the or_mask is outside the and_mask */
- return or;
- }
+ /* ok, found the pattern, check for conditions */
+ assert(mode == get_irn_mode(and));
+ assert(mode == get_irn_mode(or_l));
+ assert(mode == get_irn_mode(and_l));
- /* ok, all conditions met */
- block = get_irn_n(or, -1);
+ tv3 = get_Const_tarval(c3);
+ tv4 = get_Const_tarval(c4);
- new_and = new_r_And(current_ir_graph, block,
- value, new_r_Const(current_ir_graph, block, mode, tarval_and(tv4, tv2)), mode);
+ tv = tarval_or(tv4, tv2);
+ if (classify_tarval(tv) != TV_CLASSIFY_ALL_ONE) {
+ /* have at least one 0 at the same bit position */
+ return or;
+ }
- new_const = new_r_Const(current_ir_graph, block, mode, tarval_or(tv3, tv1));
+ n_tv4 = tarval_not(tv4);
+ if (tv3 != tarval_and(tv3, n_tv4)) {
+ /* bit in the or_mask is outside the and_mask */
+ return or;
+ }
- set_Or_left(or, new_and);
- set_Or_right(or, new_const);
+ n_tv2 = tarval_not(tv2);
+ if (tv1 != tarval_and(tv1, n_tv2)) {
+ /* bit in the or_mask is outside the and_mask */
+ return or;
+ }
- /* check for more */
- return transform_node_Or_bf_store(or);
+ /* ok, all conditions met */
+ block = get_irn_n(or, -1);
+
+ new_and = new_r_And(current_ir_graph, block,
+ value, new_r_Const(current_ir_graph, block, mode, tarval_and(tv4, tv2)), mode);
+
+ new_const = new_r_Const(current_ir_graph, block, mode, tarval_or(tv3, tv1));
+
+ set_Or_left(or, new_and);
+ set_Or_right(or, new_const);
+
+ /* check for more */
+ }
} /* transform_node_Or_bf_store */
/**
get_Load_volatility(b) == volatility_is_volatile)
/* NEVER do CSE on volatile Loads */
return 1;
+ /* do not CSE Loads with different alignment. Be conservative. */
+ if (get_Load_align(a) != get_Load_align(b))
+ return 1;
return get_Load_mode(a) != get_Load_mode(b);
} /* node_cmp_attr_Load */
/** Compares the attributes of two Store nodes. */
static int node_cmp_attr_Store(ir_node *a, ir_node *b) {
+ /* do not CSE Stores with different alignment. Be conservative. */
+ if (get_Store_align(a) != get_Store_align(b))
+ return 1;
+
/* NEVER do CSE on volatile Stores */
return (get_Store_volatility(a) == volatility_is_volatile ||
get_Store_volatility(b) == volatility_is_volatile);
projects / libfirm / blobdiff