#include "irnode_t.h"
#include "irgraph_t.h"
#include "irmode_t.h"
-#include "typegmod.h"
#include "irbackedge_t.h"
#include "irdump.h"
#include "irop_t.h"
* returns the pnc name from an pnc constant
*/
const char *get_pnc_string(int pnc) {
+ assert(pnc >= 0 && pnc < sizeof(pnc_name_arr)/sizeof(pnc_name_arr[0]));
return pnc_name_arr[pnc];
}
int i;
assert(irg && op && mode);
- p = obstack_alloc (irg->obst, node_size);
+ p = obstack_alloc(irg->obst, node_size);
memset(p, 0, node_size);
- res = (ir_node *) (p + firm_add_node_size);
+ res = (ir_node *)(p + firm_add_node_size);
res->kind = k_ir_node;
res->op = op;
res->deps = NULL;
if (arity < 0) {
- res->in = NEW_ARR_F (ir_node *, 1); /* 1: space for block */
+ res->in = NEW_ARR_F(ir_node *, 1); /* 1: space for block */
} else {
- res->in = NEW_ARR_D (ir_node *, irg->obst, (arity+1));
- memcpy (&res->in[1], in, sizeof (ir_node *) * arity);
+ res->in = NEW_ARR_D(ir_node *, irg->obst, (arity+1));
+ memcpy(&res->in[1], in, sizeof(ir_node *) * arity);
}
res->in[0] = block;
res->node_nr = get_irp_new_node_nr();
#endif
- for(i = 0; i < EDGE_KIND_LAST; ++i)
+ for (i = 0; i < EDGE_KIND_LAST; ++i)
INIT_LIST_HEAD(&res->edge_info[i].outs_head);
- // don't put this into the for loop, arity is -1 for some nodes!
+ /* don't put this into the for loop, arity is -1 for some nodes! */
edges_notify_edge(res, -1, res->in[0], NULL, irg);
for (i = 1; i <= arity; ++i)
edges_notify_edge(res, i - 1, res->in[i], NULL, irg);
return res;
}
-void add_irn_deps(ir_node *tgt, ir_node *src)
-{
+void add_irn_deps(ir_node *tgt, ir_node *src) {
int i, n;
- for(i = 0, n = get_irn_deps(src); i < n; ++i)
+ for (i = 0, n = get_irn_deps(src); i < n; ++i)
add_irn_dep(tgt, get_irn_dep(src, i));
}
const char *
get_irn_opname(const ir_node *node) {
assert(node);
- if ((get_irn_op((ir_node *)node) == op_Phi) &&
- (get_irg_phase_state(get_irn_irg((ir_node *)node)) == phase_building) &&
- (get_irn_arity((ir_node *)node) == 0)) return "Phi0";
+ if (is_Phi0(node)) return "Phi0";
return get_id_str(node->op->name);
}
}
int
-get_irn_phi_attr(ir_node *node) {
- assert(node->op == op_Phi);
- return node->attr.phi0_pos;
+get_irn_phi0_attr(ir_node *node) {
+ assert(is_Phi0(node));
+ return node->attr.phi0.pos;
}
block_attr
return _get_irn_generic_attr(node);
}
-void *(get_irn_generic_attr_const)(ir_node *node) {
+const void *(get_irn_generic_attr_const)(const ir_node *node) {
assert(is_ir_node(node));
return _get_irn_generic_attr_const(node);
}
int
get_Block_matured(ir_node *node) {
assert(node->op == op_Block);
- return (int)node->attr.block.matured;
+ return (int)node->attr.block.is_matured;
}
void
set_Block_matured(ir_node *node, int matured) {
assert(node->op == op_Block);
- node->attr.block.matured = matured;
+ node->attr.block.is_matured = matured;
}
unsigned long
node->attr.block.graph_arr[pos+1] = value;
}
-void set_Block_cg_cfgpred_arr(ir_node * node, int arity, ir_node ** in) {
+void set_Block_cg_cfgpred_arr(ir_node *node, int arity, ir_node *in[]) {
assert(node->op == op_Block);
if (node->attr.block.in_cg == NULL || arity != ARR_LEN(node->attr.block.in_cg) - 1) {
node->attr.block.in_cg = NEW_ARR_D(ir_node *, current_ir_graph->obst, arity + 1);
memcpy(node->attr.block.in_cg + 1, in, sizeof(ir_node *) * arity);
}
-void set_Block_cg_cfgpred(ir_node * node, int pos, ir_node * pred) {
+void set_Block_cg_cfgpred(ir_node *node, int pos, ir_node *pred) {
assert(node->op == op_Block &&
node->attr.block.in_cg &&
0 <= pos && pos < ARR_LEN(node->attr.block.in_cg) - 1);
node->attr.block.in_cg[pos + 1] = pred;
}
-ir_node **get_Block_cg_cfgpred_arr(ir_node * node) {
+ir_node **get_Block_cg_cfgpred_arr(ir_node *node) {
assert(node->op == op_Block);
return node->attr.block.in_cg == NULL ? NULL : node->attr.block.in_cg + 1;
}
-int get_Block_cg_n_cfgpreds(ir_node * node) {
+int get_Block_cg_n_cfgpreds(ir_node *node) {
assert(node->op == op_Block);
return node->attr.block.in_cg == NULL ? 0 : ARR_LEN(node->attr.block.in_cg) - 1;
}
-ir_node *get_Block_cg_cfgpred(ir_node * node, int pos) {
+ir_node *get_Block_cg_cfgpred(ir_node *node, int pos) {
assert(node->op == op_Block && node->attr.block.in_cg);
return node->attr.block.in_cg[pos + 1];
}
-void remove_Block_cg_cfgpred_arr(ir_node * node) {
+void remove_Block_cg_cfgpred_arr(ir_node *node) {
assert(node->op == op_Block);
node->attr.block.in_cg = NULL;
}
block->attr.block.extblk = extblk;
}
+ir_node *get_Block_MacroBlock(const ir_node *block) {
+ assert(is_Block(block));
+ return get_irn_n(block, -1);
+}
+
int
get_End_n_keepalives(ir_node *end) {
assert(end->op == op_End);
}
void
-add_End_keepalive (ir_node *end, ir_node *ka) {
+add_End_keepalive(ir_node *end, ir_node *ka) {
assert(end->op == op_End);
+ assert((is_Phi(ka) || is_Proj(ka) || is_Block(ka) || is_irn_keep(ka)) && "Only Phi, Block or Keep nodes can be kept alive!");
add_irn_n(end, ka);
}
set_irn_n(node, pos + RETURN_RESULT_OFFSET, res);
}
-tarval *(get_Const_tarval)(ir_node *node) {
+tarval *(get_Const_tarval)(const ir_node *node) {
return _get_Const_tarval(node);
}
set_irn_n(node, 0, mem); \
}
+#define DIVOP(OP) \
+BINOP_MEM(OP) \
+ \
+ir_mode *get_##OP##_resmode(const ir_node *node) { \
+ assert(node->op == op_##OP); \
+ return node->attr.divmod.res_mode; \
+} \
+ \
+void set_##OP##_resmode(ir_node *node, ir_mode *mode) { \
+ assert(node->op == op_##OP); \
+ node->attr.divmod.res_mode = mode; \
+}
+
+
BINOP(Add)
BINOP(Sub)
UNOP(Minus)
BINOP(Mul)
-BINOP_MEM(Quot)
-BINOP_MEM(DivMod)
-BINOP_MEM(Div)
-BINOP_MEM(Mod)
+DIVOP(Quot)
+DIVOP(DivMod)
+DIVOP(Div)
+DIVOP(Mod)
UNOP(Abs)
BINOP(And)
BINOP(Or)
}
int
-get_Phi_n_preds(ir_node *node) {
+get_Phi_n_preds(const ir_node *node) {
assert(is_Phi(node) || is_Phi0(node));
return (get_irn_arity(node));
}
*/
ir_node *
-get_Phi_pred(ir_node *node, int pos) {
+get_Phi_pred(const ir_node *node, int pos) {
assert(is_Phi(node) || is_Phi0(node));
return get_irn_n(node, pos);
}
set_irn_n(pin, 0, node);
}
+/* Return the assembler text of an ASM pseudo node. */
+ident *get_ASM_text(const ir_node *node) {
+ assert(node->op == op_ASM);
+ return node->attr.assem.asm_text;
+}
+
+/* Return the number of input constraints for an ASM node. */
+int get_ASM_n_input_constraints(const ir_node *node) {
+ assert(node->op == op_ASM);
+ return ARR_LEN(node->attr.assem.inputs);
+}
+
+/* Return the input constraints for an ASM node. This is a flexible array. */
+const ir_asm_constraint *get_ASM_input_constraints(const ir_node *node) {
+ assert(node->op == op_ASM);
+ return node->attr.assem.inputs;
+}
+
+/* Return the number of output constraints for an ASM node. */
+int get_ASM_n_output_constraints(const ir_node *node) {
+ assert(node->op == op_ASM);
+ return ARR_LEN(node->attr.assem.outputs);
+}
+
+/* Return the output constraints for an ASM node. */
+const ir_asm_constraint *get_ASM_output_constraints(const ir_node *node) {
+ assert(node->op == op_ASM);
+ return node->attr.assem.outputs;
+}
+
+/* Return the number of clobbered registers for an ASM node. */
+int get_ASM_n_clobbers(const ir_node *node) {
+ assert(node->op == op_ASM);
+ return ARR_LEN(node->attr.assem.clobber);
+}
+
+/* Return the list of clobbered registers for an ASM node. */
+ident **get_ASM_clobbers(const ir_node *node) {
+ assert(node->op == op_ASM);
+ return node->attr.assem.clobber;
+}
/* returns the graph of a node */
ir_graph *
return _is_NoMem(node);
}
+int
+(is_Minus)(const ir_node *node) {
+ return _is_Minus(node);
+}
+
int
(is_Mod)(const ir_node *node) {
return _is_Mod(node);
return _is_Raise(node);
}
+/* returns true if a node is an ASM node. */
+int
+(is_ASM)(const ir_node *node) {
+ return _is_ASM(node);
+}
+
int
is_Proj(const ir_node *node) {
assert(node);
ir_node *get_fragile_op_mem(ir_node *node) {
assert(node && is_fragile_op(node));
- switch (get_irn_opcode (node)) {
+ switch (get_irn_opcode(node)) {
case iro_Call :
case iro_Quot :
case iro_DivMod:
}
}
+/* Returns the result mode of a Div operation. */
+ir_mode *get_divop_resmod(const ir_node *node) {
+ switch (get_irn_opcode(node)) {
+ case iro_Quot : return get_Quot_resmode(node);
+ case iro_DivMod: return get_DivMod_resmode(node);
+ case iro_Div : return get_Div_resmode(node);
+ case iro_Mod : return get_Mod_resmode(node);
+ default: ;
+ assert(0 && "should not be reached");
+ return NULL;
+ }
+}
+
/* Returns true if the operation is a forking control flow operation. */
int (is_irn_forking)(const ir_node *node) {
return _is_irn_forking(node);
}
/* Returns the conditional jump prediction of a Cond node. */
-cond_jmp_predicate (get_Cond_jmp_pred)(ir_node *cond) {
+cond_jmp_predicate (get_Cond_jmp_pred)(const ir_node *cond) {
return _get_Cond_jmp_pred(cond);
}
projects / libfirm / blobdiff