-/**
- * @file irarch.c
- * @date 28.9.2004
- * @author Sebastian Hack
- * @brief Machine dependent firm optimizations.
+/*
+ * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
*
- * $Id$
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
+/**
+ * @file
+ * @brief Machine dependent Firm optimizations.
+ * @date 28.9.2004
+ * @author Sebastian Hack, Michael Beck
+ * @version $Id$
*/
#ifdef HAVE_CONFIG_H
# include "config.h"
rflct_signature_set_arg(sig, 1, 1, "Op 0", RFLCT_MC(Int), 0, 0);
rflct_signature_set_arg(sig, 1, 2, "Op 1", RFLCT_MC(Int), 0, 0);
- rflct_new_opcode(mulh_opc, "Mulh", false);
+ rflct_new_opcode(mulh_opc, "Mulh", 0);
rflct_opcode_add_signature(mulh_opc, sig);
}
}
opts = the_opts;
}
-/* check, whether a mode allows a Mulh instruction */
+/** check, whether a mode allows a Mulh instruction. */
static int allow_Mulh(ir_mode *mode)
{
if (get_mode_size_bits(mode) > params->max_bits_for_mulh)
return (mode_is_signed(mode) && params->allow_mulhs) || (!mode_is_signed(mode) && params->allow_mulhu);
}
+/* Replace Muls with Shifts and Add/Subs. */
ir_node *arch_dep_replace_mul_with_shifts(ir_node *irn)
{
ir_node *res = irn;
}
#endif
- // Go over all recorded one groups.
+ /* Go over all recorded one groups. */
curr_bit = compr[0];
for(i = 1; i < compr_len; i = end_of_group + 2) {
ones_in_group = compr[i];
zeros_in_group = 0;
- // Scan for singular 0s in a sequence
+ /* Scan for singular 0s in a sequence. */
for(j = i + 1; j < compr_len && compr[j] == 1; j += 2) {
zeros_in_group += 1;
ones_in_group += (j + 1 < compr_len ? compr[j + 1] : 0);
fprintf(stderr, " j:%d, ones:%d\n", j, curr_ones);
#endif
- // If this ones group is a singleton group (it has no
- // singleton zeros inside
+ /* If this ones group is a singleton group (it has no
+ singleton zeros inside. */
if(singleton)
shift_with_sub[shift_with_sub_pos++] = biased_curr_bit;
else if(j == i)
*/
static int tv_ld2(tarval *tv, int bits)
{
- int i, k, num;
+ int i, k = 0, num;
for (num = i = 0; i < bits; ++i) {
unsigned char v = get_tarval_sub_bits(tv, i);
#define ONE(m) get_mode_one(m)
#define ZERO(m) get_mode_null(m)
+/** The result of a the magic() function. */
struct ms {
tarval *M; /**< magic number */
int s; /**< shift amount */
return mag;
}
+/** The result of the magicu() function. */
struct mu {
tarval *M; /**< magic add constant */
int s; /**< shift amount */
}
/**
- * build the Mulh replacement code for n / tv
+ * Build the Mulh replacement code for n / tv.
*
* Note that 'div' might be a mod or DivMod operation as well
*/
return q;
}
+/* Replace Divs with Shifts and Add/Subs and Mulh. */
ir_node *arch_dep_replace_div_by_const(ir_node *irn)
{
ir_node *res = irn;
if (get_irn_op(c) != op_Const)
return irn;
+ tv = get_Const_tarval(c);
+
+ /* check for division by zero */
+ if (classify_tarval(tv) == TV_CLASSIFY_NULL)
+ return irn;
+
left = get_Div_left(irn);
mode = get_irn_mode(left);
block = get_irn_n(irn, -1);
dbg = get_irn_dbg_info(irn);
- tv = get_Const_tarval(c);
bits = get_mode_size_bits(mode);
n = (bits + 7) / 8;
return res;
}
+/* Replace Mods with Shifts and Add/Subs and Mulh. */
ir_node *arch_dep_replace_mod_by_const(ir_node *irn)
{
ir_node *res = irn;
if (get_irn_op(c) != op_Const)
return irn;
+ tv = get_Const_tarval(c);
+
+ /* check for division by zero */
+ if (classify_tarval(tv) == TV_CLASSIFY_NULL)
+ return irn;
+
left = get_Mod_left(irn);
mode = get_irn_mode(left);
block = get_irn_n(irn, -1);
dbg = get_irn_dbg_info(irn);
- tv = get_Const_tarval(c);
-
bits = get_mode_size_bits(mode);
n = (bits + 7) / 8;
return res;
}
+/* Replace DivMods with Shifts and Add/Subs and Mulh. */
void arch_dep_replace_divmod_by_const(ir_node **div, ir_node **mod, ir_node *irn)
{
*div = *mod = NULL;
if (get_irn_op(c) != op_Const)
return;
+ tv = get_Const_tarval(c);
+
+ /* check for division by zero */
+ if (classify_tarval(tv) == TV_CLASSIFY_NULL)
+ return;
+
left = get_DivMod_left(irn);
mode = get_irn_mode(left);
block = get_irn_n(irn, -1);
dbg = get_irn_dbg_info(irn);
- tv = get_Const_tarval(c);
bits = get_mode_size_bits(mode);
n = (bits + 7) / 8;
32 /* Mulh allowed up to 32 bit */
};
+/* A default parameter factory for testing purposes. */
const arch_dep_params_t *arch_dep_default_factory(void) {
return &default_params;
}