#include "dbginfo_t.h"
#include "iropt_dbg.h"
#include "irflag_t.h"
-#include "firmstat.h"
+#include "irhooks.h"
#include "ircons.h"
#include "irarch.h"
-#include "firmstat.h"
#undef DEB
opts = the_opts;
}
+/* check, wheater a mode allows a Mulh instruction */
+static int allow_Mulh(ir_mode *mode)
+{
+ if (get_mode_size_bits(mode) > params->max_bits_for_mulh)
+ return 0;
+ return (mode_is_signed(mode) && params->allow_mulhs) || (!mode_is_signed(mode) && params->allow_mulhu);
+}
+
ir_node *arch_dep_replace_mul_with_shifts(ir_node *irn)
{
ir_node *res = irn;
}
if (res != irn)
- stat_arch_dep_replace_mul_with_shifts(irn);
+ hook_arch_dep_replace_mul_with_shifts(irn);
return res;
}
int bits = get_mode_size_bits(u_mode);
int p;
tarval *ad, *anc, *delta, *q1, *r1, *q2, *r2, *t; /* unsigned */
- pnc_number d_cmp, M_cmp;
+ pn_Cmp d_cmp, M_cmp;
+
+ tarval *bits_minus_1, *two_bits_1;
struct ms mag;
+ tarval_int_overflow_mode_t rem = tarval_get_integer_overflow_mode();
+
+ /* we need overflow mode to work correctly */
+ tarval_set_integer_overflow_mode(TV_OVERFLOW_WRAP);
+
/* 2^(bits-1) */
- tarval *bits_minus_1 = new_tarval_from_long(bits - 1, u_mode);
- tarval *two_bits_1 = SHL(get_mode_one(u_mode), bits_minus_1);
+ bits_minus_1 = new_tarval_from_long(bits - 1, u_mode);
+ two_bits_1 = SHL(get_mode_one(u_mode), bits_minus_1);
ad = CNV(ABS(d), u_mode);
t = ADD(two_bits_1, SHR(CNV(d, u_mode), bits_minus_1));
q1 = ADD(q1, q1); /* Update q1 = 2^p/|nc| */
r1 = ADD(r1, r1); /* Update r1 = rem(2^p, |nc|) */
- if (CMP(r1, anc) & Ge) {
+ if (CMP(r1, anc) & pn_Cmp_Ge) {
q1 = ADD(q1, ONE(u_mode));
r1 = SUB(r1, anc);
}
q2 = ADD(q2, q2); /* Update q2 = 2^p/|d| */
r2 = ADD(r2, r2); /* Update r2 = rem(2^p, |d|) */
- if (CMP(r2, ad) & Ge) {
+ if (CMP(r2, ad) & pn_Cmp_Ge) {
q2 = ADD(q2, ONE(u_mode));
r2 = SUB(r2, ad);
}
delta = SUB(ad, r2);
- } while (CMP(q1, delta) & Lt || (CMP(q1, delta) & Eq && CMP(r1, ZERO(u_mode)) & Eq));
+ } while (CMP(q1, delta) & pn_Cmp_Lt || (CMP(q1, delta) & pn_Cmp_Eq && CMP(r1, ZERO(u_mode)) & pn_Cmp_Eq));
d_cmp = CMP(d, ZERO(mode));
- if (d_cmp & Ge)
+ if (d_cmp & pn_Cmp_Ge)
mag.M = ADD(CNV(q2, mode), ONE(mode));
else
mag.M = SUB(ZERO(mode), ADD(CNV(q2, mode), ONE(mode)));
mag.s = p - bits;
/* need an add if d > 0 && M < 0 */
- mag.need_add = d_cmp & Gt && M_cmp & Lt;
+ mag.need_add = d_cmp & pn_Cmp_Gt && M_cmp & pn_Cmp_Lt;
/* need a sub if d < 0 && M > 0 */
- mag.need_sub = d_cmp & Lt && M_cmp & Gt;
+ mag.need_sub = d_cmp & pn_Cmp_Lt && M_cmp & pn_Cmp_Gt;
+
+ tarval_set_integer_overflow_mode(rem);
return mag;
}
int bits = get_mode_size_bits(mode);
int p;
tarval *nc, *delta, *q1, *r1, *q2, *r2;
+ tarval *bits_minus_1, *two_bits_1, *seven_ff;
struct mu magu;
- tarval *bits_minus_1 = new_tarval_from_long(bits - 1, mode);
- tarval *two_bits_1 = SHL(get_mode_one(mode), bits_minus_1);
- tarval *seven_ff = SUB(two_bits_1, ONE(mode));
+ tarval_int_overflow_mode_t rem = tarval_get_integer_overflow_mode();
+
+ /* we need overflow mode to work correctly */
+ tarval_set_integer_overflow_mode(TV_OVERFLOW_WRAP);
+
+ bits_minus_1 = new_tarval_from_long(bits - 1, mode);
+ two_bits_1 = SHL(get_mode_one(mode), bits_minus_1);
+ seven_ff = SUB(two_bits_1, ONE(mode));
magu.need_add = 0; /* initialize the add indicator */
nc = SUB(NEG(ONE(mode)), MOD(NEG(d), d));
do {
++p;
- if (CMP(r1, SUB(nc, r1)) & Ge) {
+ if (CMP(r1, SUB(nc, r1)) & pn_Cmp_Ge) {
q1 = ADD(ADD(q1, q1), ONE(mode));
r1 = SUB(ADD(r1, r1), nc);
}
r1 = ADD(r1, r1);
}
- if (CMP(ADD(r2, ONE(mode)), SUB(d, r2)) & Ge) {
- if (CMP(q2, seven_ff) & Ge)
+ if (CMP(ADD(r2, ONE(mode)), SUB(d, r2)) & pn_Cmp_Ge) {
+ if (CMP(q2, seven_ff) & pn_Cmp_Ge)
magu.need_add = 1;
q2 = ADD(ADD(q2, q2), ONE(mode));
r2 = SUB(ADD(ADD(r2, r2), ONE(mode)), d);
}
else {
- if (CMP(q2, two_bits_1) & Ge)
+ if (CMP(q2, two_bits_1) & pn_Cmp_Ge)
magu.need_add = 1;
q2 = ADD(q2, q2);
}
delta = SUB(SUB(d, ONE(mode)), r2);
} while (p < 2*bits &&
- (CMP(q1, delta) & Lt || (CMP(q1, delta) & Eq && CMP(r1, ZERO(mode)) & Eq)));
+ (CMP(q1, delta) & pn_Cmp_Lt || (CMP(q1, delta) & pn_Cmp_Eq && CMP(r1, ZERO(mode)) & pn_Cmp_Eq)));
magu.M = ADD(q2, ONE(mode)); /* Magic number */
magu.s = p - bits; /* and shift amount */
+ tarval_set_integer_overflow_mode(rem);
+
return magu;
}
}
else {
/* other constant */
- if ((mode_is_signed(mode) && params->allow_mulhs) ||
- (!mode_is_signed(mode) && params->allow_mulhu))
+ if (allow_Mulh(mode))
res = replace_div_by_mulh(irn, tv);
}
}
if (res != irn)
- stat_arch_dep_replace_div_by_const(irn);
+ hook_arch_dep_replace_div_by_const(irn);
return res;
}
}
else {
/* other constant */
- if ((mode_is_signed(mode) && params->allow_mulhs) ||
- (!mode_is_signed(mode) && params->allow_mulhu)) {
+ if (allow_Mulh(mode)) {
res = replace_div_by_mulh(irn, tv);
res = new_rd_Mul(dbg, current_ir_graph, block, res, c, mode);
}
if (res != irn)
- stat_arch_dep_replace_mod_by_const(irn);
+ hook_arch_dep_replace_mod_by_const(irn);
return res;
}
}
else {
/* other constant */
- if ((mode_is_signed(mode) && params->allow_mulhs) ||
- (!mode_is_signed(mode) && params->allow_mulhu)) {
+ if (allow_Mulh(mode)) {
ir_node *t;
*div = replace_div_by_mulh(irn, tv);
}
if (*div)
- stat_arch_dep_replace_DivMod_by_const(irn);
+ hook_arch_dep_replace_DivMod_by_const(irn);
}