/**
* @file
* @brief code selection (transform FIRM into SPARC FIRM)
+ * @author Hannes Rapp, Matthias Braun
* @version $Id$
*/
#include "config.h"
+#include <stdint.h>
+#include <stdbool.h>
+
#include "irnode_t.h"
#include "irgraph_t.h"
#include "irmode_t.h"
#include "iredges.h"
#include "ircons.h"
#include "irprintf.h"
+#include "iroptimize.h"
#include "dbginfo.h"
#include "iropt_t.h"
#include "debug.h"
#include "error.h"
+#include "util.h"
#include "../benode.h"
#include "../beirg.h"
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
-static sparc_code_gen_t *env_cg;
static beabi_helper_env_t *abihelper;
-static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
-static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
+static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
+static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
static calling_convention_t *cconv = NULL;
static ir_mode *mode_gp;
static ir_mode *mode_fp;
//static ir_mode *mode_fp4;
static pmap *node_to_stack;
-static ir_node *gen_SymConst(ir_node *node);
-
-
-static inline int mode_needs_gp_reg(ir_mode *mode)
+static inline bool mode_needs_gp_reg(ir_mode *mode)
{
- return mode_is_int(mode) || mode_is_reference(mode);
+ if (mode_is_int(mode) || mode_is_reference(mode)) {
+ /* we should only see 32bit code */
+ assert(get_mode_size_bits(mode) <= 32);
+ return true;
+ }
+ return false;
}
/**
int src_bits)
{
if (src_bits == 8) {
- return new_bd_sparc_And_imm(dbgi, block, op, 0xFF);
+ return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
} else if (src_bits == 16) {
- ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, 16);
- ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, 16);
+ ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
+ ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
return rshift;
} else {
panic("zero extension only supported for 8 and 16 bits");
int src_bits)
{
int shift_width = 32 - src_bits;
- ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, shift_width);
- ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, shift_width);
+ ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
+ ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
return rshift_node;
}
}
}
-/**
- * Creates a possible DAG for a constant.
- */
-static ir_node *create_const_graph_value(dbg_info *dbgi, ir_node *block,
- long value)
-{
- ir_node *result;
-
- /* we need to load hi & lo separately */
- if (value < -4096 || value > 4095) {
- ir_node *hi = new_bd_sparc_HiImm(dbgi, block, (int) value);
- result = new_bd_sparc_LoImm(dbgi, block, hi, value);
- be_dep_on_frame(hi);
- } else {
- result = new_bd_sparc_Mov_imm(dbgi, block, (int) value);
- be_dep_on_frame(result);
- }
+typedef enum {
+ MATCH_NONE = 0,
+ MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
+ MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
+ influence the significant lower bit at
+ all (for cases where mode < 32bit) */
+} match_flags_t;
+ENUM_BITSET(match_flags_t)
- return result;
-}
+typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
+typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
+typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
+typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
/**
- * Create a DAG constructing a given Const.
- *
- * @param irn a Firm const
+ * checks if a node's value can be encoded as a immediate
*/
-static ir_node *create_const_graph(ir_node *irn, ir_node *block)
+static bool is_imm_encodeable(const ir_node *node)
{
- tarval *tv = get_Const_tarval(irn);
- ir_mode *mode = get_tarval_mode(tv);
- dbg_info *dbgi = get_irn_dbg_info(irn);
long value;
+ if (!is_Const(node))
+ return false;
-
- if (mode_is_reference(mode)) {
- /* SPARC V8 is 32bit, so we can safely convert a reference tarval into Iu */
- assert(get_mode_size_bits(mode) == get_mode_size_bits(mode_gp));
- tv = tarval_convert_to(tv, mode_gp);
- }
-
- value = get_tarval_long(tv);
- return create_const_graph_value(dbgi, block, value);
+ value = get_tarval_long(get_Const_tarval(node));
+ return sparc_is_value_imm_encodeable(value);
}
-typedef enum {
- MATCH_NONE = 0,
- MATCH_COMMUTATIVE = 1 << 0, /**< commutative operation. */
-} match_flags_t;
-
-typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
-typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
-typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, int simm13);
+static bool needs_extension(ir_mode *mode)
+{
+ return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
+}
/**
- * checks if a node's value can be encoded as a immediate
+ * Check, if a given node is a Down-Conv, ie. a integer Conv
+ * from a mode with a mode with more bits to a mode with lesser bits.
+ * Moreover, we return only true if the node has not more than 1 user.
*
+ * @param node the node
+ * @return non-zero if node is a Down-Conv
*/
-static bool is_imm_encodeable(const ir_node *node)
+static bool is_downconv(const ir_node *node)
{
- long val;
+ ir_mode *src_mode;
+ ir_mode *dest_mode;
- if (!is_Const(node))
+ if (!is_Conv(node))
return false;
- val = get_tarval_long(get_Const_tarval(node));
+ src_mode = get_irn_mode(get_Conv_op(node));
+ dest_mode = get_irn_mode(node);
+ return
+ mode_needs_gp_reg(src_mode) &&
+ mode_needs_gp_reg(dest_mode) &&
+ get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
+}
- return -4096 <= val && val <= 4095;
+static ir_node *sparc_skip_downconv(ir_node *node)
+{
+ while (is_downconv(node)) {
+ node = get_Conv_op(node);
+ }
+ return node;
}
/**
* @param new_reg register generation function ptr
* @param new_imm immediate generation function ptr
*/
-static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
- new_binop_reg_func new_reg, new_binop_imm_func new_imm)
+static ir_node *gen_helper_binop_args(ir_node *node,
+ ir_node *op1, ir_node *op2,
+ match_flags_t flags,
+ new_binop_reg_func new_reg,
+ new_binop_imm_func new_imm)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *op1 = get_binop_left(node);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *new_op1;
- ir_node *op2 = get_binop_right(node);
ir_node *new_op2;
- dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_mode *mode1;
+ ir_mode *mode2;
- if (is_imm_encodeable(op2)) {
- ir_node *new_op1 = be_transform_node(op1);
- return new_imm(dbgi, block, new_op1, get_tarval_long(get_Const_tarval(op2)));
+ if (flags & MATCH_MODE_NEUTRAL) {
+ op1 = sparc_skip_downconv(op1);
+ op2 = sparc_skip_downconv(op2);
}
+ mode1 = get_irn_mode(op1);
+ mode2 = get_irn_mode(op2);
+ /* we shouldn't see 64bit code */
+ assert(get_mode_size_bits(mode1) <= 32);
+ assert(get_mode_size_bits(mode2) <= 32);
+ if (is_imm_encodeable(op2)) {
+ ir_node *new_op1 = be_transform_node(op1);
+ int32_t immediate = get_tarval_long(get_Const_tarval(op2));
+ if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
+ new_op1 = gen_extension(dbgi, block, new_op1, mode1);
+ }
+ return new_imm(dbgi, block, new_op1, NULL, immediate);
+ }
new_op2 = be_transform_node(op2);
+ if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
+ new_op2 = gen_extension(dbgi, block, new_op2, mode2);
+ }
if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
- return new_imm(dbgi, block, new_op2, get_tarval_long(get_Const_tarval(op1)) );
+ int32_t immediate = get_tarval_long(get_Const_tarval(op1));
+ return new_imm(dbgi, block, new_op2, NULL, immediate);
}
new_op1 = be_transform_node(op1);
-
+ if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
+ new_op1 = gen_extension(dbgi, block, new_op1, mode1);
+ }
return new_reg(dbgi, block, new_op1, new_op2);
}
+static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
+ new_binop_reg_func new_reg,
+ new_binop_imm_func new_imm)
+{
+ ir_node *op1 = get_binop_left(node);
+ ir_node *op2 = get_binop_right(node);
+ return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
+}
+
/**
* helper function for FP binop operations
*/
panic("unsupported mode %+F for float op", mode);
}
+static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
+ new_unop_fp_func new_func_single,
+ new_unop_fp_func new_func_double,
+ new_unop_fp_func new_func_quad)
+{
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ ir_node *op1 = get_binop_left(node);
+ ir_node *new_op1 = be_transform_node(op1);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ unsigned bits = get_mode_size_bits(mode);
+
+ switch (bits) {
+ case 32:
+ return new_func_single(dbgi, block, new_op1, mode);
+ case 64:
+ return new_func_double(dbgi, block, new_op1, mode);
+ case 128:
+ return new_func_quad(dbgi, block, new_op1, mode);
+ default:
+ break;
+ }
+ panic("unsupported mode %+F for float op", mode);
+}
+
+static ir_node *get_g0(void)
+{
+ return be_prolog_get_reg_value(abihelper, &sparc_registers[REG_G0]);
+}
+
+typedef struct address_t {
+ ir_node *ptr;
+ ir_node *ptr2;
+ ir_entity *entity;
+ int32_t offset;
+} address_t;
+
+/**
+ * Match a load/store address
+ */
+static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
+{
+ ir_node *base = ptr;
+ ir_node *ptr2 = NULL;
+ int32_t offset = 0;
+ ir_entity *entity = NULL;
+
+ if (is_Add(base)) {
+ ir_node *add_right = get_Add_right(base);
+ if (is_Const(add_right)) {
+ base = get_Add_left(base);
+ offset += get_tarval_long(get_Const_tarval(add_right));
+ }
+ }
+ /* Note that we don't match sub(x, Const) or chains of adds/subs
+ * because this should all be normalized by now */
+
+ /* we only use the symconst if we're the only user otherwise we probably
+ * won't save anything but produce multiple sethi+or combinations with
+ * just different offsets */
+ if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
+ dbg_info *dbgi = get_irn_dbg_info(ptr);
+ ir_node *block = get_nodes_block(ptr);
+ ir_node *new_block = be_transform_node(block);
+ entity = get_SymConst_entity(base);
+ base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
+ } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
+ ptr2 = be_transform_node(get_Add_right(base));
+ base = be_transform_node(get_Add_left(base));
+ } else {
+ if (sparc_is_value_imm_encodeable(offset)) {
+ base = be_transform_node(base);
+ } else {
+ base = be_transform_node(ptr);
+ offset = 0;
+ }
+ }
+
+ address->ptr = base;
+ address->ptr2 = ptr2;
+ address->entity = entity;
+ address->offset = offset;
+}
+
/**
* Creates an sparc Add.
*
static ir_node *gen_Add(ir_node *node)
{
ir_mode *mode = get_irn_mode(node);
+ ir_node *right;
if (mode_is_float(mode)) {
return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
}
- return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
+ /* special case: + 0x1000 can be represented as - 0x1000 */
+ right = get_Add_right(node);
+ if (is_Const(right)) {
+ ir_node *left = get_Add_left(node);
+ ir_tarval *tv;
+ uint32_t val;
+ /* is this simple address arithmetic? then we can let the linker do
+ * the calculation. */
+ if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ address_t address;
+
+ /* the value of use_ptr2 shouldn't matter here */
+ match_address(node, &address, false);
+ assert(is_sparc_SetHi(address.ptr));
+ return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
+ address.entity, address.offset);
+ }
+
+ tv = get_Const_tarval(right);
+ val = get_tarval_long(tv);
+ if (val == 0x1000) {
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ ir_node *op = get_Add_left(node);
+ ir_node *new_op = be_transform_node(op);
+ return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
+ }
+ }
+
+ return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
+ new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
}
/**
return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
}
+static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
+ ir_node *mem, ir_mode *mode, ir_entity *entity,
+ long offset, bool is_frame_entity)
+{
+ unsigned bits = get_mode_size_bits(mode);
+ assert(mode_is_float(mode));
+ if (bits == 32) {
+ return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
+ offset, is_frame_entity);
+ } else if (bits == 64) {
+ return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
+ offset, is_frame_entity);
+ } else {
+ assert(bits == 128);
+ return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
+ offset, is_frame_entity);
+ }
+}
+
+static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
+ ir_node *ptr, ir_node *mem, ir_mode *mode,
+ ir_entity *entity, long offset,
+ bool is_frame_entity)
+{
+ unsigned bits = get_mode_size_bits(mode);
+ assert(mode_is_float(mode));
+ if (bits == 32) {
+ return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
+ offset, is_frame_entity);
+ } else if (bits == 64) {
+ return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
+ offset, is_frame_entity);
+ } else {
+ assert(bits == 128);
+ return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
+ offset, is_frame_entity);
+ }
+}
+
/**
* Transforms a Load.
*
*/
static ir_node *gen_Load(ir_node *node)
{
+ dbg_info *dbgi = get_irn_dbg_info(node);
ir_mode *mode = get_Load_mode(node);
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *ptr = get_Load_ptr(node);
- ir_node *new_ptr = be_transform_node(ptr);
ir_node *mem = get_Load_mem(node);
ir_node *new_mem = be_transform_node(mem);
- dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *new_load = NULL;
+ address_t address;
+
+ if (get_Load_unaligned(node) == align_non_aligned) {
+ panic("sparc: transformation of unaligned Loads not implemented yet");
+ }
if (mode_is_float(mode)) {
- new_load = new_bd_sparc_Ldf(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false);
+ match_address(ptr, &address, false);
+ new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
+ address.entity, address.offset, false);
} else {
- new_load = new_bd_sparc_Ld(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false);
+ match_address(ptr, &address, true);
+ if (address.ptr2 != NULL) {
+ assert(address.entity == NULL && address.offset == 0);
+ new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
+ address.ptr2, new_mem, mode);
+ } else {
+ new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
+ mode, address.entity, address.offset,
+ false);
+ }
}
set_irn_pinned(new_load, get_irn_pinned(node));
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *ptr = get_Store_ptr(node);
- ir_node *new_ptr = be_transform_node(ptr);
ir_node *mem = get_Store_mem(node);
ir_node *new_mem = be_transform_node(mem);
ir_node *val = get_Store_value(node);
ir_node *new_val = be_transform_node(val);
ir_mode *mode = get_irn_mode(val);
dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *new_store = NULL;
+ ir_node *new_store = NULL;
+ address_t address;
+
+ if (get_Store_unaligned(node) == align_non_aligned) {
+ panic("sparc: transformation of unaligned Stores not implemented yet");
+ }
if (mode_is_float(mode)) {
- new_store = new_bd_sparc_Stf(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false);
+ /* TODO: variants with reg+reg address mode */
+ match_address(ptr, &address, false);
+ new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
+ mode, address.entity, address.offset, false);
} else {
- new_store = new_bd_sparc_St(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false);
+ assert(get_mode_size_bits(mode) <= 32);
+ match_address(ptr, &address, true);
+ if (address.ptr2 != NULL) {
+ assert(address.entity == NULL && address.offset == 0);
+ new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
+ address.ptr2, new_mem, mode);
+ } else {
+ new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
+ new_mem, mode, address.entity,
+ address.offset, false);
+ }
}
set_irn_pinned(new_store, get_irn_pinned(node));
new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
}
- assert(mode_is_data(mode));
- return gen_helper_binop(node, MATCH_COMMUTATIVE,
+ return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
}
{
ir_mode *mode = get_irn_mode(node);
ir_node *mul;
- ir_node *proj_res_hi;
if (mode_is_float(mode))
panic("FP not supported yet");
-
- assert(mode_is_data(mode));
mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
- //arch_irn_add_flags(mul, arch_irn_flags_modify_flags);
- proj_res_hi = new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
- return proj_res_hi;
+ return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
+}
+
+static ir_node *gen_sign_extension_value(ir_node *node)
+{
+ ir_node *block = get_nodes_block(node);
+ ir_node *new_block = be_transform_node(block);
+ ir_node *new_node = be_transform_node(node);
+ /* TODO: we could do some shortcuts for some value types probably.
+ * (For constants or other cases where we know the sign bit in
+ * advance) */
+ return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
}
/**
*/
static ir_node *gen_Div(ir_node *node)
{
- ir_mode *mode = get_Div_resmode(node);
- ir_node *res;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = get_nodes_block(node);
+ ir_node *new_block = be_transform_node(block);
+ ir_mode *mode = get_Div_resmode(node);
+ ir_node *left = get_Div_left(node);
+ ir_node *left_low = be_transform_node(left);
+ ir_node *right = get_Div_right(node);
+ ir_node *res;
+
+ if (mode_is_float(mode)) {
+ return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
+ new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
+ }
- assert(!mode_is_float(mode));
if (mode_is_signed(mode)) {
- res = gen_helper_binop(node, 0, new_bd_sparc_SDiv_reg,
- new_bd_sparc_SDiv_imm);
+ ir_node *left_high = gen_sign_extension_value(left);
+
+ if (is_imm_encodeable(right)) {
+ int32_t immediate = get_tarval_long(get_Const_tarval(right));
+ res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
+ NULL, immediate);
+ } else {
+ ir_node *new_right = be_transform_node(right);
+ res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
+ new_right);
+ }
} else {
- res = gen_helper_binop(node, 0, new_bd_sparc_UDiv_reg,
- new_bd_sparc_UDiv_imm);
+ ir_node *left_high = get_g0();
+ if (is_imm_encodeable(right)) {
+ int32_t immediate = get_tarval_long(get_Const_tarval(right));
+ res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
+ NULL, immediate);
+ } else {
+ ir_node *new_right = be_transform_node(right);
+ res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
+ new_right);
+ }
}
+
return res;
}
-static ir_node *gen_Quot(ir_node *node)
+#if 0
+static ir_node *gen_Abs(ir_node *node)
{
- ir_mode *mode = get_Quot_resmode(node);
- assert(mode_is_float(mode));
- return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
- new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
-}
-
-/**
- * transform abs node:
- * mov a, b
- * sra b, 31, b
- * xor a, b
- * sub a, b
- *
- * @return
- */
-static ir_node *gen_Abs(ir_node *node) {
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_mode *mode = get_irn_mode(node);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *op = get_Abs_op(node);
-
- ir_node *mov, *sra, *xor, *sub, *new_op;
+ ir_mode *const mode = get_irn_mode(node);
if (mode_is_float(mode)) {
- return gen_helper_binfpop(node, mode, new_bd_sparc_fabs_s,
- new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
+ return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
+ new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
+ } else {
+ ir_node *const block = be_transform_node(get_nodes_block(node));
+ dbg_info *const dbgi = get_irn_dbg_info(node);
+ ir_node *const op = get_Abs_op(node);
+ ir_node *const new_op = be_transform_node(op);
+ ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
+ ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
+ ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
+ return sub;
}
-
- new_op = be_transform_node(op);
-
- mov = new_bd_sparc_Mov_reg(dbgi, block, new_op);
- sra = new_bd_sparc_Sra_imm(dbgi, block, mov, 31);
- xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
- sub = new_bd_sparc_Sub_reg(dbgi, block, sra, xor);
-
- return sub;
}
+#endif
/**
* Transforms a Not node.
*/
static ir_node *gen_Not(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *op = get_Not_op(node);
- ir_node *new_op = be_transform_node(op);
- dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *op = get_Not_op(node);
+ ir_node *zero = get_g0();
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ ir_node *new_op = be_transform_node(op);
+
+ /* Note: Not(Eor()) is normalize in firm localopts already so
+ * we don't match it for xnor here */
- return new_bd_sparc_Not(dbgi, block, new_op);
+ /* Not can be represented with xnor 0, n */
+ return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
+}
+
+static ir_node *gen_helper_bitop(ir_node *node,
+ new_binop_reg_func new_reg,
+ new_binop_imm_func new_imm,
+ new_binop_reg_func new_not_reg,
+ new_binop_imm_func new_not_imm)
+{
+ ir_node *op1 = get_binop_left(node);
+ ir_node *op2 = get_binop_right(node);
+ if (is_Not(op1)) {
+ return gen_helper_binop_args(node, op2, get_Not_op(op1),
+ MATCH_MODE_NEUTRAL,
+ new_not_reg, new_not_imm);
+ }
+ if (is_Not(op2)) {
+ return gen_helper_binop_args(node, op1, get_Not_op(op2),
+ MATCH_MODE_NEUTRAL,
+ new_not_reg, new_not_imm);
+ }
+ return gen_helper_binop_args(node, op1, op2,
+ MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
+ new_reg, new_imm);
}
static ir_node *gen_And(ir_node *node)
{
- return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_And_reg, new_bd_sparc_And_imm);
+ return gen_helper_bitop(node,
+ new_bd_sparc_And_reg,
+ new_bd_sparc_And_imm,
+ new_bd_sparc_AndN_reg,
+ new_bd_sparc_AndN_imm);
}
static ir_node *gen_Or(ir_node *node)
{
- return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Or_reg, new_bd_sparc_Or_imm);
+ return gen_helper_bitop(node,
+ new_bd_sparc_Or_reg,
+ new_bd_sparc_Or_imm,
+ new_bd_sparc_OrN_reg,
+ new_bd_sparc_OrN_imm);
}
static ir_node *gen_Eor(ir_node *node)
{
- return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Xor_reg, new_bd_sparc_Xor_imm);
+ return gen_helper_bitop(node,
+ new_bd_sparc_Xor_reg,
+ new_bd_sparc_Xor_imm,
+ new_bd_sparc_XNor_reg,
+ new_bd_sparc_XNor_imm);
}
static ir_node *gen_Shl(ir_node *node)
static ir_node *gen_Shr(ir_node *node)
{
- return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
+ return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
}
static ir_node *gen_Shrs(ir_node *node)
*/
static ir_node *gen_Minus(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *op = get_Minus_op(node);
- ir_node *new_op = be_transform_node(op);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_mode *mode = get_irn_mode(node);
+ ir_mode *mode = get_irn_mode(node);
+ ir_node *op;
+ ir_node *block;
+ ir_node *new_op;
+ ir_node *zero;
+ dbg_info *dbgi;
if (mode_is_float(mode)) {
- return new_bd_sparc_fneg(dbgi, block, new_op, mode);
+ return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
+ new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
}
-
- return new_bd_sparc_Minus(dbgi, block, new_op);
-}
-
-static ir_node *make_addr(dbg_info *dbgi, ir_entity *entity)
-{
- ir_node *block = get_irg_start_block(current_ir_graph);
- ir_node *node = new_bd_sparc_SymConst(dbgi, block, entity);
- be_dep_on_frame(node);
- return node;
+ block = be_transform_node(get_nodes_block(node));
+ dbgi = get_irn_dbg_info(node);
+ op = get_Minus_op(node);
+ new_op = be_transform_node(op);
+ zero = get_g0();
+ return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
}
/**
* Create an entity for a given (floating point) tarval
*/
-static ir_entity *create_float_const_entity(tarval *tv)
+static ir_entity *create_float_const_entity(ir_tarval *tv)
{
- ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
+ const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
+ sparc_isa_t *isa = (sparc_isa_t*) arch_env;
+ ir_entity *entity = (ir_entity*) pmap_get(isa->constants, tv);
ir_initializer_t *initializer;
ir_mode *mode;
ir_type *type;
initializer = create_initializer_tarval(tv);
set_entity_initializer(entity, initializer);
- pmap_insert(env_cg->constants, tv, entity);
+ pmap_insert(isa->constants, tv, entity);
return entity;
}
-/**
- * Transforms a Const node.
- *
- * @param node the ir Const node
- * @return The transformed sparc node.
- */
-static ir_node *gen_Const(ir_node *node)
+static ir_node *gen_float_const(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_mode *mode = get_irn_mode(node);
+ ir_entity *entity = create_float_const_entity(tv);
+ ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
+ ir_node *mem = get_irg_no_mem(current_ir_graph);
+ ir_mode *mode = get_tarval_mode(tv);
+ ir_node *new_op
+ = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
+ ir_node *proj = new_r_Proj(new_op, mode, pn_sparc_Ldf_res);
- if (mode_is_float(mode)) {
- dbg_info *dbgi = get_irn_dbg_info(node);
- tarval *tv = get_Const_tarval(node);
- ir_entity *entity = create_float_const_entity(tv);
- ir_node *addr = make_addr(dbgi, entity);
- ir_node *mem = new_NoMem();
- ir_node *new_op
- = new_bd_sparc_Ldf(dbgi, block, addr, mem, mode, NULL, 0, 0, false);
-
- ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
- return proj;
- }
-
- return create_const_graph(node, block);
+ set_irn_pinned(new_op, op_pin_state_floats);
+ return proj;
}
-/**
- * AddSP
- * @param node the ir AddSP node
- * @return transformed sparc SAVE node
- */
-static ir_node *gen_be_AddSP(ir_node *node)
+static ir_node *gen_Const(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *sz = get_irn_n(node, be_pos_AddSP_size);
- ir_node *new_sz = be_transform_node(sz);
- ir_node *sp = get_irn_n(node, be_pos_AddSP_old_sp);
- ir_node *new_sp = be_transform_node(sp);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *nomem = new_NoMem();
- ir_node *new_op;
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ ir_mode *mode = get_irn_mode(node);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_tarval *tv = get_Const_tarval(node);
+ long value;
- /* SPARC stack grows in reverse direction */
- new_op = new_bd_sparc_SubSP(dbgi, block, new_sp, new_sz, nomem);
+ if (mode_is_float(mode)) {
+ return gen_float_const(dbgi, block, tv);
+ }
- return new_op;
+ value = get_tarval_long(tv);
+ if (value == 0) {
+ return get_g0();
+ } else if (sparc_is_value_imm_encodeable(value)) {
+ return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
+ } else {
+ ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
+ if ((value & 0x3ff) != 0) {
+ return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
+ } else {
+ return hi;
+ }
+ }
}
-/**
- * SubSP
- * @param node the ir SubSP node
- * @return transformed sparc SAVE node
- */
-static ir_node *gen_be_SubSP(ir_node *node)
+static ir_mode *get_cmp_mode(ir_node *b_value)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *sz = get_irn_n(node, be_pos_SubSP_size);
- ir_node *new_sz = be_transform_node(sz);
- ir_node *sp = get_irn_n(node, be_pos_SubSP_old_sp);
- ir_node *new_sp = be_transform_node(sp);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *nomem = new_NoMem();
- ir_node *new_op;
-
- /* SPARC stack grows in reverse direction */
- new_op = new_bd_sparc_AddSP(dbgi, block, new_sp, new_sz, nomem);
- return new_op;
-}
+ ir_node *op;
-/**
- * transform FrameAddr
- */
-static ir_node *gen_be_FrameAddr(ir_node *node)
-{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_entity *ent = be_get_frame_entity(node);
- ir_node *fp = be_get_FrameAddr_frame(node);
- ir_node *new_fp = be_transform_node(fp);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *new_node;
- new_node = new_bd_sparc_FrameAddr(dbgi, block, new_fp, ent);
- return new_node;
+ if (!is_Cmp(b_value))
+ panic("can't determine cond signednes (no cmp)");
+ op = get_Cmp_left(b_value);
+ return get_irn_mode(op);
}
-/**
- * Transform a be_Copy.
- */
-static ir_node *gen_be_Copy(ir_node *node)
+static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
+ int32_t offset)
{
- ir_node *result = be_duplicate_node(node);
- ir_mode *mode = get_irn_mode(result);
-
- if (mode_needs_gp_reg(mode)) {
- set_irn_mode(node, mode_gp);
- }
-
- return result;
-}
+ ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
+ ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
-/**
- * Transform a Call
- */
-static ir_node *gen_be_Call(ir_node *node)
-{
- ir_node *res = be_duplicate_node(node);
- arch_irn_add_flags(res, arch_irn_flags_modify_flags);
- return res;
+ if (get_entity_owner(entity) == get_tls_type())
+ panic("thread local storage not supported yet in sparc backend");
+ return low;
}
-/**
- * Transforms a Switch.
- *
- */
static ir_node *gen_SwitchJmp(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *selector = get_Cond_selector(node);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *new_op = be_transform_node(selector);
- ir_node *const_graph;
- ir_node *sub;
-
- ir_node *proj;
- const ir_edge_t *edge;
- int min = INT_MAX;
- int max = INT_MIN;
- int translation;
- int pn;
- int n_projs;
-
- foreach_out_edge(node, edge) {
- proj = get_edge_src_irn(edge);
- assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
-
- pn = get_Proj_proj(proj);
-
- min = pn<min ? pn : min;
- max = pn>max ? pn : max;
- }
-
- translation = min;
- n_projs = max - translation + 1;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ ir_node *selector = get_Cond_selector(node);
+ ir_node *new_selector = be_transform_node(selector);
+ long default_pn = get_Cond_default_proj(node);
+ ir_entity *entity;
+ ir_node *table_address;
+ ir_node *index;
+ ir_node *load;
+ ir_node *address;
+
+ /* switch with smaller mode not implemented yet */
+ assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
+
+ entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
+ set_entity_visibility(entity, ir_visibility_private);
+ add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
- foreach_out_edge(node, edge) {
- proj = get_edge_src_irn(edge);
- assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
+ /* TODO: this code does not construct code to check for access
+ * out-of bounds of the jumptable yet. I think we should put this stuff
+ * into the switch_lowering phase to get some additional optimisations
+ * done. */
- pn = get_Proj_proj(proj) - translation;
- set_Proj_proj(proj, pn);
- }
+ /* construct base address */
+ table_address = make_address(dbgi, block, entity, 0);
+ /* scale index */
+ index = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
+ /* load from jumptable */
+ load = new_bd_sparc_Ld_reg(dbgi, block, table_address, index,
+ get_irg_no_mem(current_ir_graph),
+ mode_gp);
+ address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
- const_graph = create_const_graph_value(dbgi, block, translation);
- sub = new_bd_sparc_Sub_reg(dbgi, block, new_op, const_graph);
- return new_bd_sparc_SwitchJmp(dbgi, block, sub, n_projs, get_Cond_default_proj(node) - translation);
+ return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
}
-static ir_mode *get_cmp_mode(ir_node *b_value)
-{
- ir_node *pred;
- ir_node *op;
-
- if (!is_Proj(b_value))
- panic("can't determine cond signednes");
- pred = get_Proj_pred(b_value);
- if (!is_Cmp(pred))
- panic("can't determine cond signednes (no cmp)");
- op = get_Cmp_left(pred);
- return get_irn_mode(op);
-}
-
-/**
- * Transform Cond nodes
- */
static ir_node *gen_Cond(ir_node *node)
{
- ir_node *selector = get_Cond_selector(node);
- ir_mode *mode = get_irn_mode(selector);
- ir_mode *cmp_mode;
- ir_node *block;
- ir_node *flag_node;
- bool is_unsigned;
- pn_Cmp pnc;
- dbg_info *dbgi;
+ ir_node *selector = get_Cond_selector(node);
+ ir_mode *mode = get_irn_mode(selector);
+ ir_mode *cmp_mode;
+ ir_node *block;
+ ir_node *flag_node;
+ bool is_unsigned;
+ ir_relation relation;
+ dbg_info *dbgi;
// switch/case jumps
if (mode != mode_b) {
}
// regular if/else jumps
- assert(is_Proj(selector));
- assert(is_Cmp(get_Proj_pred(selector)));
+ assert(is_Cmp(selector));
cmp_mode = get_cmp_mode(selector);
block = be_transform_node(get_nodes_block(node));
dbgi = get_irn_dbg_info(node);
- flag_node = be_transform_node(get_Proj_pred(selector));
- pnc = get_Proj_proj(selector);
+ flag_node = be_transform_node(selector);
+ relation = get_Cmp_relation(selector);
is_unsigned = !mode_is_signed(cmp_mode);
if (mode_is_float(cmp_mode)) {
assert(!is_unsigned);
- return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
+ return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
} else {
- return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
+ return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
}
}
*/
static ir_node *gen_Cmp(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *op1 = get_Cmp_left(node);
- ir_node *op2 = get_Cmp_right(node);
- ir_mode *cmp_mode = get_irn_mode(op1);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *new_op1 = be_transform_node(op1);
- ir_node *new_op2 = be_transform_node(op2);
+ ir_node *op1 = get_Cmp_left(node);
+ ir_node *op2 = get_Cmp_right(node);
+ ir_mode *cmp_mode = get_irn_mode(op1);
assert(get_irn_mode(op2) == cmp_mode);
if (mode_is_float(cmp_mode)) {
- return new_bd_sparc_fcmp(dbgi, block, new_op1, new_op2, cmp_mode);
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *new_op1 = be_transform_node(op1);
+ ir_node *new_op2 = be_transform_node(op2);
+ unsigned bits = get_mode_size_bits(cmp_mode);
+ if (bits == 32) {
+ return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
+ } else if (bits == 64) {
+ return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
+ } else {
+ assert(bits == 128);
+ return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
+ }
+ }
+
+ /* when we compare a bitop like and,or,... with 0 then we can directly use
+ * the bitopcc variant.
+ * Currently we only do this when we're the only user of the node...
+ */
+ if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
+ if (is_And(op1)) {
+ return gen_helper_bitop(op1,
+ new_bd_sparc_AndCCZero_reg,
+ new_bd_sparc_AndCCZero_imm,
+ new_bd_sparc_AndNCCZero_reg,
+ new_bd_sparc_AndNCCZero_imm);
+ } else if (is_Or(op1)) {
+ return gen_helper_bitop(op1,
+ new_bd_sparc_OrCCZero_reg,
+ new_bd_sparc_OrCCZero_imm,
+ new_bd_sparc_OrNCCZero_reg,
+ new_bd_sparc_OrNCCZero_imm);
+ } else if (is_Eor(op1)) {
+ return gen_helper_bitop(op1,
+ new_bd_sparc_XorCCZero_reg,
+ new_bd_sparc_XorCCZero_imm,
+ new_bd_sparc_XNorCCZero_reg,
+ new_bd_sparc_XNorCCZero_imm);
+ }
}
/* integer compare */
- new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode);
- new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode);
- return new_bd_sparc_Cmp_reg(dbgi, block, new_op1, new_op2);
+ return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
+ new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
}
/**
*/
static ir_node *gen_SymConst(ir_node *node)
{
- ir_entity *entity = get_SymConst_entity(node);
- dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_entity *entity = get_SymConst_entity(node);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = get_nodes_block(node);
+ ir_node *new_block = be_transform_node(block);
+ return make_address(dbgi, new_block, entity, 0);
+}
+
+static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
+ ir_mode *src_mode, ir_mode *dst_mode)
+{
+ unsigned src_bits = get_mode_size_bits(src_mode);
+ unsigned dst_bits = get_mode_size_bits(dst_mode);
+ if (src_bits == 32) {
+ if (dst_bits == 64) {
+ return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
+ } else {
+ assert(dst_bits == 128);
+ return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
+ }
+ } else if (src_bits == 64) {
+ if (dst_bits == 32) {
+ return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
+ } else {
+ assert(dst_bits == 128);
+ return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
+ }
+ } else {
+ assert(src_bits == 128);
+ if (dst_bits == 32) {
+ return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
+ } else {
+ assert(dst_bits == 64);
+ return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
+ }
+ }
+}
+
+static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
+ ir_mode *src_mode)
+{
+ ir_node *ftoi;
+ unsigned bits = get_mode_size_bits(src_mode);
+ if (bits == 32) {
+ ftoi = new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
+ } else if (bits == 64) {
+ ftoi = new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
+ } else {
+ assert(bits == 128);
+ ftoi = new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
+ }
- return make_addr(dbgi, entity);
+ {
+ ir_graph *irg = get_irn_irg(block);
+ ir_node *sp = get_irg_frame(irg);
+ ir_node *nomem = get_irg_no_mem(irg);
+ ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, src_mode,
+ NULL, 0, true);
+ ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
+ NULL, 0, true);
+ ir_node *res = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
+ set_irn_pinned(stf, op_pin_state_floats);
+ set_irn_pinned(ld, op_pin_state_floats);
+ return res;
+ }
+}
+
+static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
+ ir_mode *dst_mode)
+{
+ ir_graph *irg = get_irn_irg(block);
+ ir_node *sp = get_irg_frame(irg);
+ ir_node *nomem = get_irg_no_mem(irg);
+ ir_node *st = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
+ mode_gp, NULL, 0, true);
+ ir_node *ldf = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
+ NULL, 0, true);
+ ir_node *res = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
+ unsigned bits = get_mode_size_bits(dst_mode);
+ set_irn_pinned(st, op_pin_state_floats);
+ set_irn_pinned(ldf, op_pin_state_floats);
+
+ if (bits == 32) {
+ return new_bd_sparc_fitof_s(dbgi, block, res, dst_mode);
+ } else if (bits == 64) {
+ return new_bd_sparc_fitof_d(dbgi, block, res, dst_mode);
+ } else {
+ assert(bits == 128);
+ return new_bd_sparc_fitof_q(dbgi, block, res, dst_mode);
+ }
}
-/**
- * Transforms a Conv node.
- *
- */
static ir_node *gen_Conv(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *op = get_Conv_op(node);
- ir_node *new_op = be_transform_node(op);
ir_mode *src_mode = get_irn_mode(op);
ir_mode *dst_mode = get_irn_mode(node);
dbg_info *dbg = get_irn_dbg_info(node);
+ ir_node *new_op;
int src_bits = get_mode_size_bits(src_mode);
int dst_bits = get_mode_size_bits(dst_mode);
+ if (src_mode == mode_b)
+ panic("ConvB not lowered %+F", node);
+
+ new_op = be_transform_node(op);
if (src_mode == dst_mode)
return new_op;
if (mode_is_float(src_mode)) {
if (mode_is_float(dst_mode)) {
/* float -> float conv */
- return new_bd_sparc_fftof(dbg, block, new_op, src_mode, dst_mode);
+ return create_fftof(dbg, block, new_op, src_mode, dst_mode);
} else {
/* float -> int conv */
if (!mode_is_signed(dst_mode))
panic("float to unsigned not implemented yet");
- return new_bd_sparc_fftoi(dbg, block, new_op, src_mode);
+ return create_ftoi(dbg, block, new_op, src_mode);
}
} else {
/* int -> float conv */
- if (!mode_is_signed(src_mode))
- panic("unsigned to float not implemented yet");
- return new_bd_sparc_fitof(dbg, block, new_op, dst_mode);
+ if (src_bits < 32) {
+ new_op = gen_extension(dbg, block, new_op, src_mode);
+ } else if (src_bits == 32 && !mode_is_signed(src_mode)) {
+ panic("unsigned to float not lowered!");
+ }
+ return create_itof(dbg, block, new_op, dst_mode);
}
+ } else if (src_mode == mode_b) {
+ panic("ConvB not lowered %+F", node);
} else { /* complete in gp registers */
int min_bits;
ir_mode *min_mode;
static ir_node *gen_Unknown(ir_node *node)
{
- ir_node *block = get_nodes_block(node);
- ir_node *new_block = be_transform_node(block);
- dbg_info *dbgi = get_irn_dbg_info(node);
-
/* just produce a 0 */
ir_mode *mode = get_irn_mode(node);
if (mode_is_float(mode)) {
- panic("FP not implemented");
- be_dep_on_frame(node);
- return node;
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ return gen_float_const(NULL, block, get_mode_null(mode));
} else if (mode_needs_gp_reg(mode)) {
- return create_const_graph_value(dbgi, new_block, 0);
+ return get_g0();
}
panic("Unexpected Unknown mode");
*/
static ir_type *sparc_get_between_type(void)
{
- static ir_type *between_type = NULL;
+ static ir_type *between_type = NULL;
+ static ir_type *between_type0 = NULL;
+
+ if (cconv->omit_fp) {
+ if (between_type0 == NULL) {
+ between_type0
+ = new_type_class(new_id_from_str("sparc_between_type"));
+ set_type_size_bytes(between_type0, 0);
+ }
+ return between_type0;
+ }
if (between_type == NULL) {
between_type = new_type_class(new_id_from_str("sparc_between_type"));
layout->arg_type = arg_type;
layout->initial_offset = 0;
layout->initial_bias = 0;
- layout->stack_dir = -1;
- layout->sp_relative = false;
+ layout->sp_relative = cconv->omit_fp;
assert(N_FRAME_TYPES == 3);
layout->order[0] = layout->frame_type;
}
/**
- * transform the start node to the prolog code + initial barrier
+ * transform the start node to the prolog code
*/
static ir_node *gen_Start(ir_node *node)
{
ir_node *block = get_nodes_block(node);
ir_node *new_block = be_transform_node(block);
dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *mem;
ir_node *start;
- ir_node *sp;
- ir_node *fp;
- ir_node *barrier;
- ir_node *save;
- int i;
+ size_t i;
/* stackpointer is important at function prolog */
be_prolog_add_reg(abihelper, sp_reg,
arch_register_req_type_produces_sp | arch_register_req_type_ignore);
+ be_prolog_add_reg(abihelper, &sparc_registers[REG_G0],
+ arch_register_req_type_ignore);
/* function parameters in registers */
for (i = 0; i < get_method_n_params(function_type); ++i) {
const reg_or_stackslot_t *param = &cconv->parameters[i];
- if (param->reg0 != NULL)
- be_prolog_add_reg(abihelper, param->reg0, 0);
- if (param->reg1 != NULL)
- be_prolog_add_reg(abihelper, param->reg1, 0);
+ if (param->reg0 != NULL) {
+ be_prolog_add_reg(abihelper, param->reg0,
+ arch_register_req_type_none);
+ }
+ if (param->reg1 != NULL) {
+ be_prolog_add_reg(abihelper, param->reg1,
+ arch_register_req_type_none);
+ }
+ }
+ /* we need the values of the callee saves (Note: non omit-fp mode has no
+ * callee saves) */
+ if (cconv->omit_fp) {
+ size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
+ size_t c;
+ for (c = 0; c < n_callee_saves; ++c) {
+ be_prolog_add_reg(abihelper, omit_fp_callee_saves[c],
+ arch_register_req_type_none);
+ }
+ } else {
+ be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
}
start = be_prolog_create_start(abihelper, dbgi, new_block);
-
- mem = be_prolog_get_memory(abihelper);
- sp = be_prolog_get_reg_value(abihelper, sp_reg);
- save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
- fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
- sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
- mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
- arch_set_irn_register(fp, fp_reg);
- arch_set_irn_register(sp, sp_reg);
-
- be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
- be_prolog_set_reg_value(abihelper, fp_reg, fp);
-
- sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
- be_prolog_set_reg_value(abihelper, sp_reg, sp);
- be_prolog_set_memory(abihelper, mem);
-
- barrier = be_prolog_create_barrier(abihelper, new_block);
-
- return barrier;
+ return start;
}
static ir_node *get_stack_pointer_for(ir_node *node)
}
stack_pred_transformed = be_transform_node(stack_pred);
- stack = pmap_get(node_to_stack, stack_pred);
+ stack = (ir_node*)pmap_get(node_to_stack, stack_pred);
if (stack == NULL) {
return get_stack_pointer_for(stack_pred);
}
*/
static ir_node *gen_Return(ir_node *node)
{
- ir_node *block = get_nodes_block(node);
- ir_node *new_block = be_transform_node(block);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *mem = get_Return_mem(node);
- ir_node *new_mem = be_transform_node(mem);
- ir_node *sp_proj = get_stack_pointer_for(node);
- int n_res = get_Return_n_ress(node);
+ ir_node *block = get_nodes_block(node);
+ ir_node *new_block = be_transform_node(block);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *mem = get_Return_mem(node);
+ ir_node *new_mem = be_transform_node(mem);
+ ir_node *sp = get_stack_pointer_for(node);
+ size_t n_res = get_Return_n_ress(node);
ir_node *bereturn;
- ir_node *incsp;
- int i;
+ size_t i;
be_epilog_begin(abihelper);
be_epilog_set_memory(abihelper, new_mem);
will later serialize all stack pointer adjusting nodes */
be_epilog_add_reg(abihelper, sp_reg,
arch_register_req_type_produces_sp | arch_register_req_type_ignore,
- sp_proj);
+ sp);
/* result values */
for (i = 0; i < n_res; ++i) {
const reg_or_stackslot_t *slot = &cconv->results[i];
const arch_register_t *reg = slot->reg0;
assert(slot->reg1 == NULL);
- be_epilog_add_reg(abihelper, reg, 0, new_res_value);
+ be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
+ new_res_value);
+ }
+ /* callee saves */
+ if (cconv->omit_fp) {
+ size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
+ size_t i;
+ for (i = 0; i < n_callee_saves; ++i) {
+ const arch_register_t *reg = omit_fp_callee_saves[i];
+ ir_node *value
+ = be_prolog_get_reg_value(abihelper, reg);
+ be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
+ value);
+ }
}
-
- /* create the barrier before the epilog code */
- be_epilog_create_barrier(abihelper, new_block);
-
- /* epilog code: an incsp */
- sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
- incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
- BE_STACK_FRAME_SIZE_SHRINK, 0);
- be_epilog_set_reg_value(abihelper, sp_reg, incsp);
bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
-
return bereturn;
}
{
ir_graph *irg = current_ir_graph;
ir_node *sp = get_irg_frame(irg);
- ir_node *nomem = new_NoMem();
- ir_node *st = new_bd_sparc_St(dbgi, block, sp, value0, nomem, mode_gp,
- NULL, 0, 0, true);
+ ir_node *nomem = get_irg_no_mem(irg);
+ ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
+ mode_gp, NULL, 0, true);
ir_mode *mode;
ir_node *ldf;
ir_node *mem;
set_irn_pinned(st, op_pin_state_floats);
if (value1 != NULL) {
- ir_node *st1 = new_bd_sparc_St(dbgi, block, sp, value1, nomem, mode_gp,
- NULL, 0, 4, true);
+ ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
+ mode_gp, NULL, 4, true);
ir_node *in[2] = { st, st1 };
ir_node *sync = new_r_Sync(block, 2, in);
set_irn_pinned(st1, op_pin_state_floats);
mode = mode_fp;
}
- ldf = new_bd_sparc_Ldf(dbgi, block, sp, mem, mode, NULL, 0, 0, true);
+ ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
set_irn_pinned(ldf, op_pin_state_floats);
- return new_Proj(ldf, mode, pn_sparc_Ldf_res);
+ return new_r_Proj(ldf, mode, pn_sparc_Ldf_res);
}
static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
{
ir_graph *irg = current_ir_graph;
ir_node *stack = get_irg_frame(irg);
- ir_node *nomem = new_NoMem();
- ir_node *stf = new_bd_sparc_Stf(dbgi, block, stack, node, nomem,
- float_mode, NULL, 0, 0, true);
+ ir_node *nomem = get_irg_no_mem(irg);
+ ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
+ NULL, 0, true);
int bits = get_mode_size_bits(float_mode);
ir_node *ld;
set_irn_pinned(stf, op_pin_state_floats);
- ld = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp, NULL, 0, 0, true);
+ ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
set_irn_pinned(ld, op_pin_state_floats);
- result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
+ result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
if (bits == 64) {
- ir_node *ld2 = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp,
- NULL, 0, 4, true);
+ ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
+ NULL, 4, true);
set_irn_pinned(ld, op_pin_state_floats);
- result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
+ result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
- arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
- arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
+ arch_irn_add_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
+ arch_irn_add_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
} else {
assert(bits == 32);
result[1] = NULL;
ir_node *new_mem = be_transform_node(mem);
dbg_info *dbgi = get_irn_dbg_info(node);
ir_type *type = get_Call_type(node);
- int n_params = get_Call_n_params(node);
- int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
+ size_t n_params = get_Call_n_params(node);
+ size_t n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
/* max inputs: memory, callee, register arguments */
int max_inputs = 2 + n_param_regs;
ir_node **in = ALLOCAN(ir_node*, max_inputs);
- ir_node **sync_ins = ALLOCAN(ir_node*, max_inputs);
+ ir_node **sync_ins = ALLOCAN(ir_node*, n_params);
struct obstack *obst = be_get_be_obst(irg);
const arch_register_req_t **in_req
= OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
calling_convention_t *cconv
- = sparc_decide_calling_convention(type, true);
+ = sparc_decide_calling_convention(type, NULL);
int in_arity = 0;
int sync_arity = 0;
int n_caller_saves
ir_node *incsp;
int mem_pos;
ir_node *res;
- int p;
+ size_t p;
int i;
int o;
int out_arity;
/* create a parameter frame if necessary */
if (mode_is_float(mode)) {
- str = new_bd_sparc_Stf(dbgi, new_block, incsp, new_value, new_mem,
- mode, NULL, 0, param->offset, true);
+ str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
+ mode, NULL, param->offset, true);
} else {
- str = new_bd_sparc_St(dbgi, new_block, incsp, new_value, new_mem,
- mode, NULL, 0, param->offset, true);
+ str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
+ new_mem, mode, NULL, param->offset, true);
}
+ set_irn_pinned(str, op_pin_state_floats);
sync_ins[sync_arity++] = str;
}
assert(in_arity <= max_inputs);
} else {
res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
}
- set_sparc_in_req_all(res, in_req);
+ arch_set_in_register_reqs(res, in_req);
/* create output register reqs */
o = 0;
assert(get_entity_owner(entity) !=
get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
- return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity);
+ return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
+}
+
+static const arch_register_req_t float1_req = {
+ arch_register_req_type_normal,
+ &sparc_reg_classes[CLASS_sparc_fp],
+ NULL,
+ 0,
+ 0,
+ 1
+};
+static const arch_register_req_t float2_req = {
+ arch_register_req_type_normal | arch_register_req_type_aligned,
+ &sparc_reg_classes[CLASS_sparc_fp],
+ NULL,
+ 0,
+ 0,
+ 2
+};
+static const arch_register_req_t float4_req = {
+ arch_register_req_type_normal | arch_register_req_type_aligned,
+ &sparc_reg_classes[CLASS_sparc_fp],
+ NULL,
+ 0,
+ 0,
+ 4
+};
+
+
+static const arch_register_req_t *get_float_req(ir_mode *mode)
+{
+ unsigned bits = get_mode_size_bits(mode);
+
+ assert(mode_is_float(mode));
+ if (bits == 32) {
+ return &float1_req;
+ } else if (bits == 64) {
+ return &float2_req;
+ } else {
+ assert(bits == 128);
+ return &float4_req;
+ }
}
/**
/* all integer operations are on 32bit registers now */
mode = mode_gp;
req = sparc_reg_classes[CLASS_sparc_gp].class_req;
+ } else if (mode_is_float(mode)) {
+ mode = mode;
+ req = get_float_req(mode);
} else {
req = arch_no_register_req;
}
ir_node *new_pred = be_transform_node(pred);
long pn = get_Proj_proj(node);
- assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
- assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
- assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
+ assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred)
+ || is_sparc_fdiv(new_pred));
+ assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
+ assert((int)pn_sparc_SDiv_M == (int)pn_sparc_UDiv_M);
+ assert((int)pn_sparc_SDiv_res == (int)pn_sparc_fdiv_res);
+ assert((int)pn_sparc_SDiv_M == (int)pn_sparc_fdiv_M);
switch (pn) {
case pn_Div_res:
return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
panic("Unsupported Proj from Div");
}
-static ir_node *gen_Proj_Quot(ir_node *node)
+static ir_node *get_frame_base(void)
{
- ir_node *pred = get_Proj_pred(node);
- ir_node *new_pred = be_transform_node(pred);
- long pn = get_Proj_proj(node);
-
- assert(is_sparc_fdiv(new_pred));
- switch (pn) {
- case pn_Quot_res:
- return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
- case pn_Quot_M:
- return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
- default:
- break;
- }
- panic("Unsupported Proj from Quot");
+ const arch_register_t *reg = cconv->omit_fp ? sp_reg : fp_reg;
+ return be_prolog_get_reg_value(abihelper, reg);
}
static ir_node *gen_Proj_Start(ir_node *node)
{
ir_node *block = get_nodes_block(node);
ir_node *new_block = be_transform_node(block);
- ir_node *barrier = be_transform_node(get_Proj_pred(node));
long pn = get_Proj_proj(node);
+ /* make sure prolog is constructed */
+ be_transform_node(get_Proj_pred(node));
switch ((pn_Start) pn) {
case pn_Start_X_initial_exec:
/* exchange ProjX with a jump */
return new_bd_sparc_Ba(NULL, new_block);
case pn_Start_M:
- return new_r_Proj(barrier, mode_M, 0);
+ return be_prolog_get_memory(abihelper);
case pn_Start_T_args:
- return barrier;
+ break;
case pn_Start_P_frame_base:
- return be_prolog_get_reg_value(abihelper, fp_reg);
- case pn_Start_P_tls:
- return new_Bad();
+ return get_frame_base();
case pn_Start_max:
break;
}
} else if (param->entity != NULL) {
ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
ir_node *mem = be_prolog_get_memory(abihelper);
- ir_node *ld = new_bd_sparc_Ld(NULL, new_block, fp, mem,
- mode_gp, param->entity,
- 0, 0, true);
- value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
+ ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
+ mode_gp, param->entity,
+ 0, true);
+ value1 = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
}
/* convert integer value to float */
return value;
} else {
/* argument transmitted on stack */
- ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
ir_node *mem = be_prolog_get_memory(abihelper);
ir_mode *mode = get_type_mode(param->type);
+ ir_node *base = get_frame_base();
ir_node *load;
ir_node *value;
if (mode_is_float(mode)) {
- load = new_bd_sparc_Ldf(NULL, new_block, fp, mem, mode,
- param->entity, 0, 0, true);
+ load = create_ldf(NULL, new_block, base, mem, mode,
+ param->entity, 0, true);
value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
} else {
- load = new_bd_sparc_Ld(NULL, new_block, fp, mem, mode,
- param->entity, 0, 0, true);
+ load = new_bd_sparc_Ld_imm(NULL, new_block, base, mem, mode,
+ param->entity, 0, true);
value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
}
set_irn_pinned(load, op_pin_state_floats);
case pn_Call_X_regular:
case pn_Call_X_except:
case pn_Call_T_result:
- case pn_Call_P_value_res_base:
case pn_Call_max:
break;
}
ir_node *new_call = be_transform_node(call);
ir_type *function_type = get_Call_type(call);
calling_convention_t *cconv
- = sparc_decide_calling_convention(function_type, true);
+ = sparc_decide_calling_convention(function_type, NULL);
const reg_or_stackslot_t *res = &cconv->results[pn];
const arch_register_t *reg = res->reg0;
ir_mode *mode;
return be_duplicate_node(node);
case iro_Div:
return gen_Proj_Div(node);
- case iro_Quot:
- return gen_Proj_Quot(node);
case iro_Start:
return gen_Proj_Start(node);
case iro_Proj: {
/**
* configure transformation callbacks
*/
-void sparc_register_transformers(void)
+static void sparc_register_transformers(void)
{
be_start_transform_setup();
- be_set_transform_function(op_Abs, gen_Abs);
be_set_transform_function(op_Add, gen_Add);
be_set_transform_function(op_And, gen_And);
- be_set_transform_function(op_be_AddSP, gen_be_AddSP);
- be_set_transform_function(op_be_Call, gen_be_Call);
- be_set_transform_function(op_be_Copy, gen_be_Copy);
- be_set_transform_function(op_be_FrameAddr, gen_be_FrameAddr);
- be_set_transform_function(op_be_SubSP, gen_be_SubSP);
be_set_transform_function(op_Call, gen_Call);
be_set_transform_function(op_Cmp, gen_Cmp);
be_set_transform_function(op_Cond, gen_Cond);
be_set_transform_function(op_Or, gen_Or);
be_set_transform_function(op_Phi, gen_Phi);
be_set_transform_function(op_Proj, gen_Proj);
- be_set_transform_function(op_Quot, gen_Quot);
be_set_transform_function(op_Return, gen_Return);
be_set_transform_function(op_Sel, gen_Sel);
be_set_transform_function(op_Shl, gen_Shl);
be_set_transform_function(op_sparc_Save, be_duplicate_node);
}
-/* hack to avoid unused fp proj at start barrier */
-static void assure_fp_keep(void)
-{
- unsigned n_users = 0;
- const ir_edge_t *edge;
- ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
-
- foreach_out_edge(fp_proj, edge) {
- ir_node *succ = get_edge_src_irn(edge);
- if (is_End(succ) || is_Anchor(succ))
- continue;
- ++n_users;
- }
-
- if (n_users == 0) {
- ir_node *block = get_nodes_block(fp_proj);
- ir_node *in[1] = { fp_proj };
- be_new_Keep(block, 1, in);
- }
-}
-
/**
* Transform a Firm graph into a SPARC graph.
*/
-void sparc_transform_graph(sparc_code_gen_t *cg)
+void sparc_transform_graph(ir_graph *irg)
{
- ir_graph *irg = cg->irg;
ir_entity *entity = get_irg_entity(irg);
ir_type *frame_type;
sparc_register_transformers();
- env_cg = cg;
node_to_stack = pmap_create();
abihelper = be_abihelper_prepare(irg);
be_collect_stacknodes(abihelper);
- cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
+ cconv = sparc_decide_calling_convention(get_entity_type(entity), irg);
create_stacklayout(irg);
- be_transform_graph(cg->irg, NULL);
- assure_fp_keep();
+ be_transform_graph(irg, NULL);
be_abihelper_finish(abihelper);
sparc_free_calling_convention(cconv);
node_to_stack = NULL;
be_add_missing_keeps(irg);
+
+ /* do code placement, to optimize the position of constants */
+ place_code(irg);
}
void sparc_init_transform(void)
projects / libfirm / blobdiff