* are 0 for unsigned and a copy of the last significant bit for signed
* numbers.
*/
-static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
+static bool upper_bits_clean(ir_node *node, ir_mode *mode)
{
- (void) transformed_node;
- (void) mode;
- /* TODO */
+ switch ((ir_opcode)get_irn_opcode(node)) {
+ case iro_And:
+ if (!mode_is_signed(mode)) {
+ return upper_bits_clean(get_And_left(node), mode)
+ || upper_bits_clean(get_And_right(node), mode);
+ }
+ /* FALLTHROUGH */
+ case iro_Or:
+ case iro_Eor:
+ return upper_bits_clean(get_binop_left(node), mode)
+ && upper_bits_clean(get_binop_right(node), mode);
+
+ case iro_Shr:
+ if (mode_is_signed(mode)) {
+ return false; /* TODO */
+ } else {
+ ir_node *right = get_Shr_right(node);
+ if (is_Const(right)) {
+ ir_tarval *tv = get_Const_tarval(right);
+ long val = get_tarval_long(tv);
+ if (val >= 32 - (long)get_mode_size_bits(mode))
+ return true;
+ }
+ return upper_bits_clean(get_Shr_left(node), mode);
+ }
+
+ case iro_Shrs:
+ return upper_bits_clean(get_Shrs_left(node), mode);
+
+ case iro_Const: {
+ ir_tarval *tv = get_Const_tarval(node);
+ long val = get_tarval_long(tv);
+ if (mode_is_signed(mode)) {
+ long shifted = val >> (get_mode_size_bits(mode)-1);
+ return shifted == 0 || shifted == -1;
+ } else {
+ unsigned long shifted = (unsigned long)val;
+ shifted >>= get_mode_size_bits(mode)-1;
+ shifted >>= 1;
+ return shifted == 0;
+ }
+ }
+
+ case iro_Conv: {
+ ir_mode *dest_mode = get_irn_mode(node);
+ ir_node *op = get_Conv_op(node);
+ ir_mode *src_mode = get_irn_mode(op);
+ unsigned src_bits = get_mode_size_bits(src_mode);
+ unsigned dest_bits = get_mode_size_bits(dest_mode);
+ /* downconvs are a nop */
+ if (src_bits <= dest_bits)
+ return upper_bits_clean(op, mode);
+ if (dest_bits <= get_mode_size_bits(mode)
+ && mode_is_signed(dest_mode) == mode_is_signed(mode))
+ return true;
+ return false;
+ }
+
+ case iro_Proj: {
+ ir_node *pred = get_Proj_pred(node);
+ switch (get_irn_opcode(pred)) {
+ case iro_Load: {
+ ir_mode *load_mode = get_Load_mode(pred);
+ unsigned load_bits = get_mode_size_bits(load_mode);
+ unsigned bits = get_mode_size_bits(mode);
+ if (load_bits > bits)
+ return false;
+ if (mode_is_signed(mode) != mode_is_signed(load_mode))
+ return false;
+ return true;
+ }
+ default:
+ break;
+ }
+ }
+ default:
+ break;
+ }
return false;
}
ir_mode *orig_mode)
{
int bits = get_mode_size_bits(orig_mode);
- if (bits == 32)
- return op;
+ assert(bits < 32);
if (mode_is_signed(orig_mode)) {
return gen_sign_extension(dbgi, block, op, bits);
return sparc_is_value_imm_encodeable(value);
}
-static bool needs_extension(ir_mode *mode)
+static bool needs_extension(ir_node *op)
{
- return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
+ ir_mode *mode = get_irn_mode(op);
+ if (get_mode_size_bits(mode) >= get_mode_size_bits(mode_gp))
+ return false;
+ return !upper_bits_clean(op, mode);
}
/**
get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
}
-static ir_node *sparc_skip_downconv(ir_node *node)
+static ir_node *skip_downconv(ir_node *node)
{
while (is_downconv(node)) {
node = get_Conv_op(node);
ir_mode *mode2;
if (flags & MATCH_MODE_NEUTRAL) {
- op1 = sparc_skip_downconv(op1);
- op2 = sparc_skip_downconv(op2);
+ op1 = skip_downconv(op1);
+ op2 = skip_downconv(op2);
}
mode1 = get_irn_mode(op1);
mode2 = get_irn_mode(op2);
if (is_imm_encodeable(op2)) {
int32_t immediate = get_tarval_long(get_Const_tarval(op2));
new_op1 = be_transform_node(op1);
- if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
+ if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op1)) {
new_op1 = gen_extension(dbgi, block, new_op1, mode1);
}
return new_imm(dbgi, block, new_op1, NULL, immediate);
}
new_op2 = be_transform_node(op2);
- if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
+ if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op2)) {
new_op2 = gen_extension(dbgi, block, new_op2, mode2);
}
}
new_op1 = be_transform_node(op1);
- if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
+ if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op1)) {
new_op1 = gen_extension(dbgi, block, new_op1, mode1);
}
return new_reg(dbgi, block, new_op1, new_op2);
ir_node *mem = get_Store_mem(node);
ir_node *new_mem = be_transform_node(mem);
ir_node *val = get_Store_value(node);
- ir_node *new_val = be_transform_node(val);
ir_mode *mode = get_irn_mode(val);
dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *new_store = NULL;
}
if (mode_is_float(mode)) {
+ ir_node *new_val = be_transform_node(val);
/* TODO: variants with reg+reg address mode */
match_address(ptr, &address, false);
new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
mode, address.entity, address.offset, false);
} else {
- assert(get_mode_size_bits(mode) <= 32);
+ ir_node *new_val;
+ unsigned dest_bits = get_mode_size_bits(mode);
+ while (is_downconv(node)
+ && get_mode_size_bits(get_irn_mode(node)) >= dest_bits) {
+ val = get_Conv_op(val);
+ }
+ new_val = be_transform_node(val);
+
+ assert(dest_bits <= 32);
match_address(ptr, &address, true);
if (address.ptr2 != NULL) {
assert(address.entity == NULL && address.offset == 0);
}
}
-static ir_mode *get_cmp_mode(ir_node *b_value)
-{
- ir_node *op;
-
- if (!is_Cmp(b_value))
- panic("can't determine cond signednes (no cmp)");
- op = get_Cmp_left(b_value);
- return get_irn_mode(op);
-}
-
static ir_node *gen_SwitchJmp(ir_node *node)
{
dbg_info *dbgi = get_irn_dbg_info(node);
{
ir_node *selector = get_Cond_selector(node);
ir_mode *mode = get_irn_mode(selector);
+ ir_node *cmp_left;
+ ir_mode *cmp_mode;
ir_node *block;
ir_node *flag_node;
- bool is_unsigned;
ir_relation relation;
dbg_info *dbgi;
return gen_SwitchJmp(node);
}
- block = be_transform_node(get_nodes_block(node));
- dbgi = get_irn_dbg_info(node);
-
- /* regular if/else jumps */
- if (is_Cmp(selector)) {
- ir_mode *cmp_mode;
-
- cmp_mode = get_cmp_mode(selector);
- flag_node = be_transform_node(selector);
- relation = get_Cmp_relation(selector);
- is_unsigned = !mode_is_signed(cmp_mode);
- if (mode_is_float(cmp_mode)) {
- assert(!is_unsigned);
- return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
- } else {
- return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
- }
+ /* note: after lower_mode_b we are guaranteed to have a Cmp input */
+ block = be_transform_node(get_nodes_block(node));
+ dbgi = get_irn_dbg_info(node);
+ cmp_left = get_Cmp_left(selector);
+ cmp_mode = get_irn_mode(cmp_left);
+ flag_node = be_transform_node(selector);
+ relation = get_Cmp_relation(selector);
+ if (mode_is_float(cmp_mode)) {
+ return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
} else {
- /* in this case, the selector must already deliver a mode_b value.
- * this happens, for example, when the Cond is connected to a Conv
- * which converts its argument to mode_b. */
- ir_node *new_op;
- ir_graph *irg;
- assert(mode == mode_b);
-
- block = be_transform_node(get_nodes_block(node));
- irg = get_irn_irg(block);
- dbgi = get_irn_dbg_info(node);
- new_op = be_transform_node(selector);
- /* follow the SPARC architecture manual and use orcc for tst */
- flag_node = new_bd_sparc_OrCCZero_reg(dbgi, block, new_op, get_g0(irg));
- return new_bd_sparc_Bicc(dbgi, block, flag_node, ir_relation_less_greater, true);
+ bool is_unsigned = !mode_is_signed(cmp_mode);
+ return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
}
}
if (src_mode == mode_b)
panic("ConvB not lowered %+F", node);
- new_op = be_transform_node(op);
if (src_mode == dst_mode)
- return new_op;
+ return be_transform_node(op);
if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
+ new_op = be_transform_node(op);
if (mode_is_float(src_mode)) {
if (mode_is_float(dst_mode)) {
/* float -> float conv */
}
return create_itof(dbgi, block, new_op, dst_mode);
}
- } else if (src_mode == mode_b) {
- panic("ConvB not lowered %+F", node);
} else { /* complete in gp registers */
int min_bits;
ir_mode *min_mode;
- if (src_bits == dst_bits) {
+ if (src_bits == dst_bits || dst_mode == mode_b) {
/* kill unnecessary conv */
- return new_op;
- }
-
- if (dst_mode == mode_b) {
- /* mode_b lowering already took care that we only have 0/1 values */
- return new_op;
+ return be_transform_node(op);
}
if (src_bits < dst_bits) {
min_mode = dst_mode;
}
- if (upper_bits_clean(new_op, min_mode)) {
- return new_op;
+ if (upper_bits_clean(op, min_mode)) {
+ return be_transform_node(op);
}
+ new_op = be_transform_node(op);
if (mode_is_signed(min_mode)) {
return gen_sign_extension(dbgi, block, new_op, min_bits);
ir_entity *entity = NULL;
ir_node *new_frame = get_stack_pointer_for(node);
bool aggregate_return
- = type->attr.ma.has_compound_ret_parameter;
+ = get_method_calling_convention(type) & cc_compound_ret;
ir_node *incsp;
int mem_pos;
ir_node *res;
/* do code placement, to optimize the position of constants */
place_code(irg);
+ /* backend expects outedges to be always on */
+ edges_assure(irg);
}
void sparc_init_transform(void)
projects / libfirm / blobdiff