remove $Id$, it doesn't work with git anyway
[libfirm] / ir / be / sparc / sparc_transform.c
index 7a1d450..74d0876 100644 (file)
@@ -21,7 +21,6 @@
  * @file
  * @brief   code selection (transform FIRM into SPARC FIRM)
  * @author  Hannes Rapp, Matthias Braun
- * @version $Id$
  */
 #include "config.h"
 
 #include "error.h"
 #include "util.h"
 
-#include "../benode.h"
-#include "../beirg.h"
-#include "../beutil.h"
-#include "../betranshlp.h"
-#include "../beabihelper.h"
+#include "benode.h"
+#include "beirg.h"
+#include "beutil.h"
+#include "betranshlp.h"
+#include "beabihelper.h"
 #include "bearch_sparc_t.h"
 
 #include "sparc_nodes_attr.h"
@@ -157,11 +156,86 @@ static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
  * are 0 for unsigned and a copy of the last significant bit for signed
  * numbers.
  */
-static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
+static bool upper_bits_clean(ir_node *node, ir_mode *mode)
 {
-       (void) transformed_node;
-       (void) mode;
-       /* TODO */
+       switch ((ir_opcode)get_irn_opcode(node)) {
+       case iro_And:
+               if (!mode_is_signed(mode)) {
+                       return upper_bits_clean(get_And_left(node), mode)
+                           || upper_bits_clean(get_And_right(node), mode);
+               }
+               /* FALLTHROUGH */
+       case iro_Or:
+       case iro_Eor:
+               return upper_bits_clean(get_binop_left(node), mode)
+                   && upper_bits_clean(get_binop_right(node), mode);
+
+       case iro_Shr:
+               if (mode_is_signed(mode)) {
+                       return false; /* TODO */
+               } else {
+                       ir_node *right = get_Shr_right(node);
+                       if (is_Const(right)) {
+                               ir_tarval *tv  = get_Const_tarval(right);
+                               long       val = get_tarval_long(tv);
+                               if (val >= 32 - (long)get_mode_size_bits(mode))
+                                       return true;
+                       }
+                       return upper_bits_clean(get_Shr_left(node), mode);
+               }
+
+       case iro_Shrs:
+               return upper_bits_clean(get_Shrs_left(node), mode);
+
+       case iro_Const: {
+               ir_tarval *tv  = get_Const_tarval(node);
+               long       val = get_tarval_long(tv);
+               if (mode_is_signed(mode)) {
+                       long    shifted = val >> (get_mode_size_bits(mode)-1);
+                       return shifted == 0 || shifted == -1;
+               } else {
+                       unsigned long shifted = (unsigned long)val;
+                       shifted >>= get_mode_size_bits(mode)-1;
+                       shifted >>= 1;
+                       return shifted == 0;
+               }
+       }
+
+       case iro_Conv: {
+               ir_mode *dest_mode = get_irn_mode(node);
+               ir_node *op        = get_Conv_op(node);
+               ir_mode *src_mode  = get_irn_mode(op);
+               unsigned src_bits  = get_mode_size_bits(src_mode);
+               unsigned dest_bits = get_mode_size_bits(dest_mode);
+               /* downconvs are a nop */
+               if (src_bits <= dest_bits)
+                       return upper_bits_clean(op, mode);
+               if (dest_bits <= get_mode_size_bits(mode)
+                   && mode_is_signed(dest_mode) == mode_is_signed(mode))
+                       return true;
+               return false;
+       }
+
+       case iro_Proj: {
+               ir_node *pred = get_Proj_pred(node);
+               switch (get_irn_opcode(pred)) {
+               case iro_Load: {
+                       ir_mode *load_mode = get_Load_mode(pred);
+                       unsigned load_bits = get_mode_size_bits(load_mode);
+                       unsigned bits      = get_mode_size_bits(mode);
+                       if (load_bits > bits)
+                               return false;
+                       if (mode_is_signed(mode) != mode_is_signed(load_mode))
+                               return false;
+                       return true;
+               }
+               default:
+                       break;
+               }
+       }
+       default:
+               break;
+       }
        return false;
 }
 
@@ -177,8 +251,7 @@ static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
                               ir_mode *orig_mode)
 {
        int bits = get_mode_size_bits(orig_mode);
-       if (bits == 32)
-               return op;
+       assert(bits < 32);
 
        if (mode_is_signed(orig_mode)) {
                return gen_sign_extension(dbgi, block, op, bits);
@@ -214,9 +287,12 @@ static bool is_imm_encodeable(const ir_node *node)
        return sparc_is_value_imm_encodeable(value);
 }
 
-static bool needs_extension(ir_mode *mode)
+static bool needs_extension(ir_node *op)
 {
-       return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
+       ir_mode *mode = get_irn_mode(op);
+       if (get_mode_size_bits(mode) >= get_mode_size_bits(mode_gp))
+               return false;
+       return !upper_bits_clean(op, mode);
 }
 
 /**
@@ -283,13 +359,13 @@ static ir_node *gen_helper_binop_args(ir_node *node,
        if (is_imm_encodeable(op2)) {
                int32_t  immediate = get_tarval_long(get_Const_tarval(op2));
                new_op1 = be_transform_node(op1);
-               if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
+               if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op1)) {
                        new_op1 = gen_extension(dbgi, block, new_op1, mode1);
                }
                return new_imm(dbgi, block, new_op1, NULL, immediate);
        }
        new_op2 = be_transform_node(op2);
-       if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
+       if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op2)) {
                new_op2 = gen_extension(dbgi, block, new_op2, mode2);
        }
 
@@ -299,7 +375,7 @@ static ir_node *gen_helper_binop_args(ir_node *node,
        }
 
        new_op1 = be_transform_node(op1);
-       if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
+       if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op1)) {
                new_op1 = gen_extension(dbgi, block, new_op1, mode1);
        }
        return new_reg(dbgi, block, new_op1, new_op2);
@@ -921,6 +997,24 @@ static ir_node *gen_helper_bitop(ir_node *node,
                                             flags,
                                             new_not_reg, new_not_imm);
        }
+       if (is_Const(op2) && get_irn_n_edges(op2) == 1) {
+               ir_tarval *tv    = get_Const_tarval(op2);
+               long       value = get_tarval_long(tv);
+               if (!sparc_is_value_imm_encodeable(value)) {
+                       long notvalue = ~value;
+                       if ((notvalue & 0x3ff) == 0) {
+                               ir_node  *block     = get_nodes_block(node);
+                               ir_node  *new_block = be_transform_node(block);
+                               dbg_info *dbgi      = get_irn_dbg_info(node);
+                               ir_node  *new_op2
+                                       = new_bd_sparc_SetHi(NULL, new_block, NULL, notvalue);
+                               ir_node  *new_op1   = be_transform_node(op1);
+                               ir_node  *result
+                                       = new_not_reg(dbgi, new_block, new_op1, new_op2);
+                               return result;
+                       }
+               }
+       }
        return gen_helper_binop_args(node, op1, op2,
                                                                 flags | MATCH_COMMUTATIVE,
                                                                 new_reg, new_imm);
@@ -1076,28 +1170,23 @@ static ir_node *gen_Const(ir_node *node)
        }
 }
 
-static ir_mode *get_cmp_mode(ir_node *b_value)
+static ir_node *gen_Switch(ir_node *node)
 {
-       ir_node *op;
-
-       if (!is_Cmp(b_value))
-               panic("can't determine cond signednes (no cmp)");
-       op = get_Cmp_left(b_value);
-       return get_irn_mode(op);
-}
+       dbg_info              *dbgi         = get_irn_dbg_info(node);
+       ir_node               *block        = get_nodes_block(node);
+       ir_node               *new_block    = be_transform_node(block);
+       ir_graph              *irg          = get_irn_irg(block);
+       ir_node               *selector     = get_Switch_selector(node);
+       ir_node               *new_selector = be_transform_node(selector);
+       const ir_switch_table *table        = get_Switch_table(node);
+       unsigned               n_outs       = get_Switch_n_outs(node);
+       ir_entity             *entity;
+       ir_node               *table_address;
+       ir_node               *idx;
+       ir_node               *load;
+       ir_node               *address;
 
-static ir_node *gen_SwitchJmp(ir_node *node)
-{
-       dbg_info        *dbgi         = get_irn_dbg_info(node);
-       ir_node         *block        = be_transform_node(get_nodes_block(node));
-       ir_node         *selector     = get_Cond_selector(node);
-       ir_node         *new_selector = be_transform_node(selector);
-       long             default_pn   = get_Cond_default_proj(node);
-       ir_entity       *entity;
-       ir_node         *table_address;
-       ir_node         *idx;
-       ir_node         *load;
-       ir_node         *address;
+       table = ir_switch_table_duplicate(irg, table);
 
        /* switch with smaller mode not implemented yet */
        assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
@@ -1107,65 +1196,40 @@ static ir_node *gen_SwitchJmp(ir_node *node)
        add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
 
        /* construct base address */
-       table_address = make_address(dbgi, block, entity, 0);
+       table_address = make_address(dbgi, new_block, entity, 0);
        /* scale index */
-       idx = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
+       idx = new_bd_sparc_Sll_imm(dbgi, new_block, new_selector, NULL, 2);
        /* load from jumptable */
-       load = new_bd_sparc_Ld_reg(dbgi, block, table_address, idx,
+       load = new_bd_sparc_Ld_reg(dbgi, new_block, table_address, idx,
                                   get_irg_no_mem(current_ir_graph),
                                   mode_gp);
        address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
 
-       return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
+       return new_bd_sparc_SwitchJmp(dbgi, new_block, address, n_outs, table, entity);
 }
 
 static ir_node *gen_Cond(ir_node *node)
 {
        ir_node    *selector = get_Cond_selector(node);
-       ir_mode    *mode     = get_irn_mode(selector);
+       ir_node    *cmp_left;
+       ir_mode    *cmp_mode;
        ir_node    *block;
        ir_node    *flag_node;
-       bool        is_unsigned;
        ir_relation relation;
        dbg_info   *dbgi;
 
-       /* switch/case jumps */
-       if (mode != mode_b) {
-               return gen_SwitchJmp(node);
-       }
-
-       block = be_transform_node(get_nodes_block(node));
-       dbgi  = get_irn_dbg_info(node);
-
-       /* regular if/else jumps */
-       if (is_Cmp(selector)) {
-               ir_mode *cmp_mode;
-
-               cmp_mode    = get_cmp_mode(selector);
-               flag_node   = be_transform_node(selector);
-               relation    = get_Cmp_relation(selector);
-               is_unsigned = !mode_is_signed(cmp_mode);
-               if (mode_is_float(cmp_mode)) {
-                       assert(!is_unsigned);
-                       return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
-               } else {
-                       return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
-               }
+       /* note: after lower_mode_b we are guaranteed to have a Cmp input */
+       block       = be_transform_node(get_nodes_block(node));
+       dbgi        = get_irn_dbg_info(node);
+       cmp_left    = get_Cmp_left(selector);
+       cmp_mode    = get_irn_mode(cmp_left);
+       flag_node   = be_transform_node(selector);
+       relation    = get_Cmp_relation(selector);
+       if (mode_is_float(cmp_mode)) {
+               return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
        } else {
-               /* in this case, the selector must already deliver a mode_b value.
-                * this happens, for example, when the Cond is connected to a Conv
-                * which converts its argument to mode_b. */
-               ir_node  *new_op;
-               ir_graph *irg;
-               assert(mode == mode_b);
-
-               block     = be_transform_node(get_nodes_block(node));
-               irg       = get_irn_irg(block);
-               dbgi      = get_irn_dbg_info(node);
-               new_op    = be_transform_node(selector);
-               /* follow the SPARC architecture manual and use orcc for tst */
-               flag_node = new_bd_sparc_OrCCZero_reg(dbgi, block, new_op, get_g0(irg));
-               return new_bd_sparc_Bicc(dbgi, block, flag_node, ir_relation_less_greater, true);
+               bool is_unsigned = !mode_is_signed(cmp_mode);
+               return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
        }
 }
 
@@ -1221,6 +1285,18 @@ static ir_node *gen_Cmp(ir_node *node)
                                                new_bd_sparc_XNorCCZero_reg,
                                                new_bd_sparc_XNorCCZero_imm,
                                                MATCH_NONE);
+               } else if (is_Add(op1)) {
+                       return gen_helper_binop(op1, MATCH_COMMUTATIVE,
+                                               new_bd_sparc_AddCCZero_reg,
+                                               new_bd_sparc_AddCCZero_imm);
+               } else if (is_Sub(op1)) {
+                       return gen_helper_binop(op1, MATCH_NONE,
+                                               new_bd_sparc_SubCCZero_reg,
+                                               new_bd_sparc_SubCCZero_imm);
+               } else if (is_Mul(op1)) {
+                       return gen_helper_binop(op1, MATCH_COMMUTATIVE,
+                                               new_bd_sparc_MulCCZero_reg,
+                                               new_bd_sparc_MulCCZero_imm);
                }
        }
 
@@ -1340,13 +1416,13 @@ static ir_node *gen_Conv(ir_node *node)
        if (src_mode == mode_b)
                panic("ConvB not lowered %+F", node);
 
-       new_op = be_transform_node(op);
        if (src_mode == dst_mode)
-               return new_op;
+               return be_transform_node(op);
 
        if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
                assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
 
+               new_op = be_transform_node(op);
                if (mode_is_float(src_mode)) {
                        if (mode_is_float(dst_mode)) {
                                /* float -> float conv */
@@ -1366,20 +1442,13 @@ static ir_node *gen_Conv(ir_node *node)
                        }
                        return create_itof(dbgi, block, new_op, dst_mode);
                }
-       } else if (src_mode == mode_b) {
-               panic("ConvB not lowered %+F", node);
        } else { /* complete in gp registers */
                int min_bits;
                ir_mode *min_mode;
 
-               if (src_bits == dst_bits) {
+               if (src_bits == dst_bits || dst_mode == mode_b) {
                        /* kill unnecessary conv */
-                       return new_op;
-               }
-
-               if (dst_mode == mode_b) {
-                       /* mode_b lowering already took care that we only have 0/1 values */
-                       return new_op;
+                       return be_transform_node(op);
                }
 
                if (src_bits < dst_bits) {
@@ -1390,9 +1459,10 @@ static ir_node *gen_Conv(ir_node *node)
                        min_mode = dst_mode;
                }
 
-               if (upper_bits_clean(new_op, min_mode)) {
-                       return new_op;
+               if (upper_bits_clean(op, min_mode)) {
+                       return be_transform_node(op);
                }
+               new_op = be_transform_node(op);
 
                if (mode_is_signed(min_mode)) {
                        return gen_sign_extension(dbgi, block, new_op, min_bits);
@@ -2354,6 +2424,7 @@ static ir_node *gen_Proj(ir_node *node)
                return gen_Proj_Call(node);
        case iro_Cmp:
                return gen_Proj_Cmp(node);
+       case iro_Switch:
        case iro_Cond:
                return be_duplicate_node(node);
        case iro_Div:
@@ -2426,6 +2497,7 @@ static void sparc_register_transformers(void)
        be_set_transform_function(op_Start,        gen_Start);
        be_set_transform_function(op_Store,        gen_Store);
        be_set_transform_function(op_Sub,          gen_Sub);
+       be_set_transform_function(op_Switch,       gen_Switch);
        be_set_transform_function(op_SymConst,     gen_SymConst);
        be_set_transform_function(op_Unknown,      gen_Unknown);
 
@@ -2448,11 +2520,12 @@ void sparc_transform_graph(ir_graph *irg)
 
        node_to_stack = pmap_create();
 
-       mode_gp    = mode_Iu;
-       mode_fp    = mode_F;
+       mode_gp    = sparc_reg_classes[CLASS_sparc_gp].mode;
+       mode_fp    = sparc_reg_classes[CLASS_sparc_fp].mode;
        mode_fp2   = mode_D;
-       mode_flags = mode_Bu;
        //mode_fp4 = ?
+       mode_flags = sparc_reg_classes[CLASS_sparc_flags_class].mode;
+       assert(sparc_reg_classes[CLASS_sparc_fpflags_class].mode == mode_flags);
 
        start_mem  = NULL;
        start_g0   = NULL;
@@ -2488,6 +2561,8 @@ void sparc_transform_graph(ir_graph *irg)
 
        /* do code placement, to optimize the position of constants */
        place_code(irg);
+       /* backend expects outedges to be always on */
+       edges_assure(irg);
 }
 
 void sparc_init_transform(void)