* @file
* @brief code selection (transform FIRM into SPARC FIRM)
* @author Hannes Rapp, Matthias Braun
- * @version $Id$
*/
#include "config.h"
case pn_sparc_AddCC_t_flags:
return new_r_Proj(new_pred, mode_flags, pn_sparc_AddCC_flags);
default:
- panic("Invalid AddCC_t proj found");
+ panic("Invalid proj found");
}
}
case pn_sparc_SubCC_t_flags:
return new_r_Proj(new_pred, mode_flags, pn_sparc_SubCC_flags);
default:
- panic("Invalid SubCC_t proj found");
+ panic("Invalid proj found");
}
}
address_t address;
if (get_Load_unaligned(node) == align_non_aligned) {
- panic("sparc: transformation of unaligned Loads not implemented yet");
+ panic("transformation of unaligned Loads not implemented yet");
}
if (mode_is_float(mode)) {
address_t address;
if (get_Store_unaligned(node) == align_non_aligned) {
- panic("sparc: transformation of unaligned Stores not implemented yet");
+ panic("transformation of unaligned Stores not implemented yet");
}
if (mode_is_float(mode)) {
flags,
new_not_reg, new_not_imm);
}
+ if (is_Const(op2) && get_irn_n_edges(op2) == 1) {
+ ir_tarval *tv = get_Const_tarval(op2);
+ long value = get_tarval_long(tv);
+ if (!sparc_is_value_imm_encodeable(value)) {
+ long notvalue = ~value;
+ if ((notvalue & 0x3ff) == 0) {
+ ir_node *block = get_nodes_block(node);
+ ir_node *new_block = be_transform_node(block);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *new_op2
+ = new_bd_sparc_SetHi(NULL, new_block, NULL, notvalue);
+ ir_node *new_op1 = be_transform_node(op1);
+ ir_node *result
+ = new_not_reg(dbgi, new_block, new_op1, new_op2);
+ return result;
+ }
+ }
+ }
return gen_helper_binop_args(node, op1, op2,
flags | MATCH_COMMUTATIVE,
new_reg, new_imm);
{
ir_mode *mode = get_irn_mode(node);
if (get_mode_modulo_shift(mode) != 32)
- panic("modulo_shift!=32 not supported by sparc backend");
+ panic("modulo_shift!=32 not supported");
return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
}
{
ir_mode *mode = get_irn_mode(node);
if (get_mode_modulo_shift(mode) != 32)
- panic("modulo_shift!=32 not supported by sparc backend");
+ panic("modulo_shift!=32 not supported");
return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
}
{
ir_mode *mode = get_irn_mode(node);
if (get_mode_modulo_shift(mode) != 32)
- panic("modulo_shift!=32 not supported by sparc backend");
+ panic("modulo_shift!=32 not supported");
return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
}
{
const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
sparc_isa_t *isa = (sparc_isa_t*) arch_env;
- ir_entity *entity = (ir_entity*) pmap_get(isa->constants, tv);
+ ir_entity *entity = pmap_get(ir_entity, isa->constants, tv);
ir_initializer_t *initializer;
ir_mode *mode;
ir_type *type;
return proj;
}
+static ir_node *create_int_const(ir_node *block, int32_t value)
+{
+ if (value == 0) {
+ ir_graph *irg = get_irn_irg(block);
+ return get_g0(irg);
+ } else if (sparc_is_value_imm_encodeable(value)) {
+ ir_graph *irg = get_irn_irg(block);
+ return new_bd_sparc_Or_imm(NULL, block, get_g0(irg), NULL, value);
+ } else {
+ ir_node *hi = new_bd_sparc_SetHi(NULL, block, NULL, value);
+ if ((value & 0x3ff) != 0) {
+ return new_bd_sparc_Or_imm(NULL, block, hi, NULL, value & 0x3ff);
+ } else {
+ return hi;
+ }
+ }
+}
+
static ir_node *gen_Const(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_mode *mode = get_irn_mode(node);
dbg_info *dbgi = get_irn_dbg_info(node);
ir_tarval *tv = get_Const_tarval(node);
- long value;
+ int32_t val;
if (mode_is_float(mode)) {
return gen_float_const(dbgi, block, tv);
}
- value = get_tarval_long(tv);
- if (value == 0) {
- return get_g0(get_irn_irg(node));
- } else if (sparc_is_value_imm_encodeable(value)) {
- ir_graph *irg = get_irn_irg(node);
- return new_bd_sparc_Or_imm(dbgi, block, get_g0(irg), NULL, value);
- } else {
- ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
- if ((value & 0x3ff) != 0) {
- return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
- } else {
- return hi;
- }
- }
+ assert(get_mode_size_bits(get_tarval_mode(tv)) <= 32);
+ val = (int32_t)get_tarval_long(tv);
+ return create_int_const(block, val);
}
-static ir_node *gen_SwitchJmp(ir_node *node)
+static ir_node *gen_Switch(ir_node *node)
{
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *selector = get_Cond_selector(node);
- ir_node *new_selector = be_transform_node(selector);
- long default_pn = get_Cond_default_proj(node);
- ir_entity *entity;
- ir_node *table_address;
- ir_node *idx;
- ir_node *load;
- ir_node *address;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = get_nodes_block(node);
+ ir_node *new_block = be_transform_node(block);
+ ir_graph *irg = get_irn_irg(block);
+ ir_node *selector = get_Switch_selector(node);
+ ir_node *new_selector = be_transform_node(selector);
+ const ir_switch_table *table = get_Switch_table(node);
+ unsigned n_outs = get_Switch_n_outs(node);
+ ir_entity *entity;
+ ir_node *table_address;
+ ir_node *idx;
+ ir_node *load;
+ ir_node *address;
+
+ table = ir_switch_table_duplicate(irg, table);
/* switch with smaller mode not implemented yet */
assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
/* construct base address */
- table_address = make_address(dbgi, block, entity, 0);
+ table_address = make_address(dbgi, new_block, entity, 0);
/* scale index */
- idx = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
+ idx = new_bd_sparc_Sll_imm(dbgi, new_block, new_selector, NULL, 2);
/* load from jumptable */
- load = new_bd_sparc_Ld_reg(dbgi, block, table_address, idx,
+ load = new_bd_sparc_Ld_reg(dbgi, new_block, table_address, idx,
get_irg_no_mem(current_ir_graph),
mode_gp);
address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
- return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
+ return new_bd_sparc_SwitchJmp(dbgi, new_block, address, n_outs, table, entity);
}
static ir_node *gen_Cond(ir_node *node)
{
ir_node *selector = get_Cond_selector(node);
- ir_mode *mode = get_irn_mode(selector);
ir_node *cmp_left;
ir_mode *cmp_mode;
ir_node *block;
ir_relation relation;
dbg_info *dbgi;
- /* switch/case jumps */
- if (mode != mode_b) {
- return gen_SwitchJmp(node);
- }
-
/* note: after lower_mode_b we are guaranteed to have a Cmp input */
block = be_transform_node(get_nodes_block(node));
dbgi = get_irn_dbg_info(node);
new_bd_sparc_XNorCCZero_reg,
new_bd_sparc_XNorCCZero_imm,
MATCH_NONE);
+ } else if (is_Add(op1)) {
+ return gen_helper_binop(op1, MATCH_COMMUTATIVE,
+ new_bd_sparc_AddCCZero_reg,
+ new_bd_sparc_AddCCZero_imm);
+ } else if (is_Sub(op1)) {
+ return gen_helper_binop(op1, MATCH_NONE,
+ new_bd_sparc_SubCCZero_reg,
+ new_bd_sparc_SubCCZero_imm);
+ } else if (is_Mul(op1)) {
+ return gen_helper_binop(op1, MATCH_COMMUTATIVE,
+ new_bd_sparc_MulCCZero_reg,
+ new_bd_sparc_MulCCZero_imm);
}
}
ir_graph *irg = get_irn_irg(block);
ir_node *sp = get_irg_frame(irg);
ir_node *nomem = get_irg_no_mem(irg);
- ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, src_mode,
+ ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, mode_fp,
NULL, 0, true);
ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
NULL, 0, true);
} else {
/* float -> int conv */
if (!mode_is_signed(dst_mode))
- panic("float to unsigned not implemented yet");
+ panic("float to unsigned not lowered");
return create_ftoi(dbgi, block, new_op, src_mode);
}
} else {
}
be_transform_node(stack_pred);
- stack = (ir_node*)pmap_get(node_to_stack, stack_pred);
+ stack = pmap_get(ir_node, node_to_stack, stack_pred);
if (stack == NULL) {
return get_stack_pointer_for(stack_pred);
}
}
static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
- ir_node *node, ir_mode *float_mode,
+ ir_node *value, ir_mode *float_mode,
ir_node **result)
{
- ir_graph *irg = current_ir_graph;
- ir_node *stack = get_irg_frame(irg);
- ir_node *nomem = get_irg_no_mem(irg);
- ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
- NULL, 0, true);
- int bits = get_mode_size_bits(float_mode);
- ir_node *ld;
- set_irn_pinned(stf, op_pin_state_floats);
-
- ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
- set_irn_pinned(ld, op_pin_state_floats);
- result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
-
- if (bits == 64) {
- ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
- NULL, 4, true);
+ int bits = get_mode_size_bits(float_mode);
+ if (is_Const(value)) {
+ ir_tarval *tv = get_Const_tarval(value);
+ int32_t val = get_tarval_sub_bits(tv, 0) |
+ (get_tarval_sub_bits(tv, 1) << 8) |
+ (get_tarval_sub_bits(tv, 2) << 16) |
+ (get_tarval_sub_bits(tv, 3) << 24);
+ ir_node *valc = create_int_const(block, val);
+ if (bits == 64) {
+ int32_t val2 = get_tarval_sub_bits(tv, 4) |
+ (get_tarval_sub_bits(tv, 5) << 8) |
+ (get_tarval_sub_bits(tv, 6) << 16) |
+ (get_tarval_sub_bits(tv, 7) << 24);
+ ir_node *valc2 = create_int_const(block, val2);
+ result[0] = valc2;
+ result[1] = valc;
+ } else {
+ assert(bits == 32);
+ result[0] = valc;
+ result[1] = NULL;
+ }
+ } else {
+ ir_graph *irg = current_ir_graph;
+ ir_node *stack = get_irg_frame(irg);
+ ir_node *nomem = get_irg_no_mem(irg);
+ ir_node *new_value = be_transform_node(value);
+ ir_node *stf = create_stf(dbgi, block, new_value, stack, nomem,
+ float_mode, NULL, 0, true);
+ ir_node *ld;
+ set_irn_pinned(stf, op_pin_state_floats);
+
+ ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
set_irn_pinned(ld, op_pin_state_floats);
- result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
+ result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
- arch_add_irn_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
- arch_add_irn_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
- } else {
- assert(bits == 32);
- result[1] = NULL;
+ if (bits == 64) {
+ ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
+ NULL, 4, true);
+ set_irn_pinned(ld, op_pin_state_floats);
+ result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
+
+ arch_add_irn_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
+ arch_add_irn_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
+ } else {
+ assert(bits == 32);
+ result[1] = NULL;
+ }
}
}
/* parameters */
for (p = 0; p < n_params; ++p) {
ir_node *value = get_Call_param(node, p);
- ir_node *new_value = be_transform_node(value);
const reg_or_stackslot_t *param = &cconv->parameters[p];
ir_type *param_type = get_method_param_type(type, p);
ir_mode *mode = get_type_mode(param_type);
+ ir_node *partial_value;
ir_node *new_values[2];
ir_node *str;
int offset;
if (mode_is_float(mode) && param->reg0 != NULL) {
unsigned size_bits = get_mode_size_bits(mode);
assert(size_bits <= 64);
- bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
+ bitcast_float_to_int(dbgi, new_block, value, mode, new_values);
} else {
+ ir_node *new_value = be_transform_node(value);
new_values[0] = new_value;
new_values[1] = NULL;
}
/* we need a store if we're here */
if (new_values[1] != NULL) {
- new_value = new_values[1];
- mode = mode_gp;
+ partial_value = new_values[1];
+ mode = mode_gp;
+ } else {
+ partial_value = new_values[0];
}
/* we need to skip over our save area when constructing the call
offset = param->offset + SPARC_MIN_STACKSIZE;
if (mode_is_float(mode)) {
- str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
+ str = create_stf(dbgi, new_block, partial_value, incsp, new_mem,
mode, NULL, offset, true);
} else {
- str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
+ str = new_bd_sparc_St_imm(dbgi, new_block, partial_value, incsp,
new_mem, mode, NULL, offset, true);
}
set_irn_pinned(str, op_pin_state_floats);
ir_type *type = get_Alloc_type(node);
ir_node *size = get_Alloc_count(node);
ir_node *stack_pred = get_stack_pointer_for(node);
+ ir_node *mem = get_Alloc_mem(node);
+ ir_node *new_mem = be_transform_node(mem);
ir_node *subsp;
+
if (get_Alloc_where(node) != stack_alloc)
panic("only stack-alloc supported in sparc backend (at %+F)", node);
/* lowerer should have transformed all allocas to byte size */
- if (type != get_unknown_type() && get_type_size_bytes(type) != 1)
+ if (!is_unknown_type(type) && get_type_size_bytes(type) != 1)
panic("Found non-byte alloc in sparc backend (at %+F)", node);
if (is_Const(size)) {
ir_tarval *tv = get_Const_tarval(size);
long sizel = get_tarval_long(tv);
- subsp = be_new_IncSP(sp_reg, new_block, stack_pred, sizel, 0);
- set_irn_dbg_info(subsp, dbgi);
+
+ assert((sizel & (SPARC_STACK_ALIGNMENT - 1)) == 0 && "Found Alloc with misaligned constant");
+ subsp = new_bd_sparc_SubSP_imm(dbgi, new_block, stack_pred, new_mem, NULL, sizel);
} else {
ir_node *new_size = be_transform_node(size);
- subsp = new_bd_sparc_SubSP(dbgi, new_block, stack_pred, new_size);
- arch_set_irn_register(subsp, sp_reg);
+ subsp = new_bd_sparc_SubSP_reg(dbgi, new_block, stack_pred, new_size, new_mem);
}
- /* if we are the last IncSP producer in a block then we have to keep
- * the stack value.
- * Note: This here keeps all producers which is more than necessary */
- keep_alive(subsp);
+ ir_node *stack_proj = new_r_Proj(subsp, mode_gp, pn_sparc_SubSP_stack);
+ arch_set_irn_register(stack_proj, sp_reg);
+ /* If we are the last stack producer in a block, we have to keep the
+ * stack value. This keeps all producers, which is more than necessary. */
+ keep_alive(stack_proj);
- pmap_insert(node_to_stack, node, subsp);
- /* the "result" is the unmodified sp value */
- return stack_pred;
+ pmap_insert(node_to_stack, node, stack_proj);
+
+ return subsp;
}
static ir_node *gen_Proj_Alloc(ir_node *node)
{
- ir_node *alloc = get_Proj_pred(node);
- long pn = get_Proj_proj(node);
+ ir_node *alloc = get_Proj_pred(node);
+ ir_node *new_alloc = be_transform_node(alloc);
+ long pn = get_Proj_proj(node);
switch ((pn_Alloc)pn) {
- case pn_Alloc_M: {
- ir_node *alloc_mem = get_Alloc_mem(alloc);
- return be_transform_node(alloc_mem);
- }
+ case pn_Alloc_M:
+ return new_r_Proj(new_alloc, mode_M, pn_sparc_SubSP_M);
case pn_Alloc_res: {
- ir_node *new_alloc = be_transform_node(alloc);
- return new_alloc;
+ ir_node *addr_proj = new_r_Proj(new_alloc, mode_gp, pn_sparc_SubSP_addr);
+ arch_set_irn_register(addr_proj, arch_get_irn_register(node));
+ return addr_proj;
}
case pn_Alloc_X_regular:
case pn_Alloc_X_except:
- panic("sparc backend: exception output of alloc not supported (at %+F)",
+ panic("exception output of alloc not supported (at %+F)",
node);
}
- panic("sparc backend: invalid Proj->Alloc");
+ panic("invalid Proj->Alloc");
}
static ir_node *gen_Free(ir_node *node)
if (get_Alloc_where(node) != stack_alloc)
panic("only stack-alloc supported in sparc backend (at %+F)", node);
/* lowerer should have transformed all allocas to byte size */
- if (type != get_unknown_type() && get_type_size_bytes(type) != 1)
+ if (!is_unknown_type(type) && get_type_size_bytes(type) != 1)
panic("Found non-byte alloc in sparc backend (at %+F)", node);
if (is_Const(size)) {
static const arch_register_req_t *get_float_req(ir_mode *mode)
{
- unsigned bits = get_mode_size_bits(mode);
-
assert(mode_is_float(mode));
- if (bits == 32) {
- return &float1_req;
- } else if (bits == 64) {
- return &float2_req;
- } else {
- assert(bits == 128);
- return &float4_req;
+ switch (get_mode_size_bits(mode)) {
+ case 32: return &float1_req;
+ case 64: return &float2_req;
+ case 128: return &float4_req;
+ default: panic("invalid float mode");
}
}
mode = mode_gp;
req = sparc_reg_classes[CLASS_sparc_gp].class_req;
} else if (mode_is_float(mode)) {
- mode = mode;
req = get_float_req(mode);
} else {
req = arch_no_register_req;
} else if (is_sparc_fdiv(new_pred)) {
res_mode = get_Div_resmode(pred);
} else {
- panic("sparc backend: Div transformed to something unexpected: %+F",
+ panic("Div transformed to something unexpected: %+F",
new_pred);
}
assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
case pn_Div_res:
return new_r_Proj(new_pred, res_mode, pn_sparc_SDiv_res);
case pn_Div_M:
- return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
+ return new_r_Proj(new_pred, mode_M, pn_sparc_SDiv_M);
default:
break;
}
return gen_Proj_Call(node);
case iro_Cmp:
return gen_Proj_Cmp(node);
+ case iro_Switch:
case iro_Cond:
return be_duplicate_node(node);
case iro_Div:
be_set_transform_function(op_Start, gen_Start);
be_set_transform_function(op_Store, gen_Store);
be_set_transform_function(op_Sub, gen_Sub);
+ be_set_transform_function(op_Switch, gen_Switch);
be_set_transform_function(op_SymConst, gen_SymConst);
be_set_transform_function(op_Unknown, gen_Unknown);
node_to_stack = pmap_create();
- mode_gp = mode_Iu;
- mode_fp = mode_F;
+ mode_gp = sparc_reg_classes[CLASS_sparc_gp].mode;
+ mode_fp = sparc_reg_classes[CLASS_sparc_fp].mode;
mode_fp2 = mode_D;
- mode_flags = mode_Bu;
//mode_fp4 = ?
+ mode_flags = sparc_reg_classes[CLASS_sparc_flags_class].mode;
+ assert(sparc_reg_classes[CLASS_sparc_fpflags_class].mode == mode_flags);
start_mem = NULL;
start_g0 = NULL;
/* do code placement, to optimize the position of constants */
place_code(irg);
/* backend expects outedges to be always on */
- edges_assure(irg);
+ assure_edges(irg);
}
void sparc_init_transform(void)
projects / libfirm / blobdiff