# Creation: 2006/02/13
-# $Id$
$arch = "sparc";
$mode_fpflags = "mode_Bu";
$mode_fp = "mode_F";
$mode_fp2 = "mode_D";
-$mode_fp4 = "mode_E"; # not correct, we need to register a new mode
-
-$normal = 0; # no special type
-$caller_save = 1; # caller save (register must be saved by the caller of a function)
-$callee_save = 2; # callee save (register must be saved by the called function)
-$ignore = 4; # ignore (do not assign this register)
-$arbitrary = 8; # emitter can choose an arbitrary register of this class
-$virtual = 16; # the register is a virtual one
-$state = 32; # register represents a state
+$mode_fp4 = "mode_Q";
# available SPARC registers: 8 globals, 24 window regs (8 ins, 8 outs, 8 locals)
%reg_classes = (
gp => [
- { name => "g0", type => $ignore }, # hardwired 0, behaves like /dev/null
- { name => "g1", type => $caller_save }, # temp. value
- { name => "g2", type => $caller_save },
- { name => "g3", type => $caller_save },
- { name => "g4", type => $caller_save },
- { name => "g5", type => $ignore }, # reserved by SPARC ABI
- { name => "g6", type => $ignore }, # reserved by SPARC ABI
- { name => "g7", type => $ignore }, # reserved by SPARC ABI
-
- # window's out registers
- { name => "o0", type => $caller_save }, # param 1 / return value from callee
- { name => "o1", type => $caller_save }, # param 2
- { name => "o2", type => $caller_save }, # param 3
- { name => "o3", type => $caller_save }, # param 4
- { name => "o4", type => $caller_save }, # param 5
- { name => "o5", type => $caller_save }, # param 6
- { name => "sp", type => $ignore }, # our stackpointer
- { name => "o7", type => $ignore }, # temp. value / address of CALL instr.
-
- # window's local registers
- { name => "l0", type => 0 },
- { name => "l1", type => 0 },
- { name => "l2", type => 0 },
- { name => "l3", type => 0 },
- { name => "l4", type => 0 },
- { name => "l5", type => 0 },
- { name => "l6", type => 0 },
- { name => "l7", type => 0 },
-
- # window's in registers
- { name => "i0", type => 0 }, # incoming param1 / return value to caller
- { name => "i1", type => 0 }, # param 2
- { name => "i2", type => 0 }, # param 3
- { name => "i3", type => 0 }, # param 4
- { name => "i4", type => 0 }, # param 5
- { name => "i5", type => 0 }, # param 6
- { name => "frame_pointer", realname => "fp", type => $ignore }, # our framepointer
- { name => "i7", type => $ignore }, # return address - 8
+ { name => "g0" },
+ { name => "g1" },
+ { name => "g2" },
+ { name => "g3" },
+ { name => "g4" },
+ { name => "g5" },
+ { name => "g6" },
+ { name => "g7" },
+
+ { name => "o0" },
+ { name => "o1" },
+ { name => "o2" },
+ { name => "o3" },
+ { name => "o4" },
+ { name => "o5" },
+ { name => "sp" },
+ { name => "o7" },
+
+ { name => "l0" },
+ { name => "l1" },
+ { name => "l2" },
+ { name => "l3" },
+ { name => "l4" },
+ { name => "l5" },
+ { name => "l6" },
+ { name => "l7" },
+
+ { name => "i0" },
+ { name => "i1" },
+ { name => "i2" },
+ { name => "i3" },
+ { name => "i4" },
+ { name => "i5" },
+ { name => "frame_pointer", realname => "fp" },
+ { name => "i7" },
{ mode => $mode_gp }
],
fpflags_class => [
- { name => "fpflags", type => $ignore },
+ { name => "fpflags" },
{ mode => $mode_fpflags, flags => "manual_ra" }
],
flags_class => [
- { name => "flags", type => $ignore },
+ { name => "flags" },
{ mode => $mode_flags, flags => "manual_ra" }
],
mul_div_high_res => [
- { name => "y", type => $ignore },
+ { name => "y" },
{ mode => $mode_gp, flags => "manual_ra" }
],
# fp registers can be accessed any time
fp => [
- { name => "f0", type => $caller_save },
- { name => "f1", type => $caller_save },
- { name => "f2", type => $caller_save },
- { name => "f3", type => $caller_save },
- { name => "f4", type => $caller_save },
- { name => "f5", type => $caller_save },
- { name => "f6", type => $caller_save },
- { name => "f7", type => $caller_save },
- { name => "f8", type => $caller_save },
- { name => "f9", type => $caller_save },
- { name => "f10", type => $caller_save },
- { name => "f11", type => $caller_save },
- { name => "f12", type => $caller_save },
- { name => "f13", type => $caller_save },
- { name => "f14", type => $caller_save },
- { name => "f15", type => $caller_save },
- { name => "f16", type => $caller_save },
- { name => "f17", type => $caller_save },
- { name => "f18", type => $caller_save },
- { name => "f19", type => $caller_save },
- { name => "f20", type => $caller_save },
- { name => "f21", type => $caller_save },
- { name => "f22", type => $caller_save },
- { name => "f23", type => $caller_save },
- { name => "f24", type => $caller_save },
- { name => "f25", type => $caller_save },
- { name => "f26", type => $caller_save },
- { name => "f27", type => $caller_save },
- { name => "f28", type => $caller_save },
- { name => "f29", type => $caller_save },
- { name => "f30", type => $caller_save },
- { name => "f31", type => $caller_save },
+ { name => "f0" },
+ { name => "f1" },
+ { name => "f2" },
+ { name => "f3" },
+ { name => "f4" },
+ { name => "f5" },
+ { name => "f6" },
+ { name => "f7" },
+ { name => "f8" },
+ { name => "f9" },
+ { name => "f10" },
+ { name => "f11" },
+ { name => "f12" },
+ { name => "f13" },
+ { name => "f14" },
+ { name => "f15" },
+ { name => "f16" },
+ { name => "f17" },
+ { name => "f18" },
+ { name => "f19" },
+ { name => "f20" },
+ { name => "f21" },
+ { name => "f22" },
+ { name => "f23" },
+ { name => "f24" },
+ { name => "f25" },
+ { name => "f26" },
+ { name => "f27" },
+ { name => "f28" },
+ { name => "f29" },
+ { name => "f30" },
+ { name => "f31" },
{ mode => $mode_fp }
]
); # %reg_classes
# emit source reg or imm dep. on node's arity
RI => "${arch}_emit_reg_or_imm(node, -1);",
R1I => "${arch}_emit_reg_or_imm(node, 1);",
+ R2I => "${arch}_emit_reg_or_imm(node, 2);",
S0 => "${arch}_emit_source_register(node, 0);",
S1 => "${arch}_emit_source_register(node, 1);",
D0 => "${arch}_emit_dest_register(node, 0);",
+ D1 => "${arch}_emit_dest_register(node, 1);",
HIM => "${arch}_emit_high_immediate(node);",
LM => "${arch}_emit_load_mode(node);",
SM => "${arch}_emit_store_mode(node);",
FCONVD => "${arch}_emit_fp_conv_destination(node);",
O1 => "${arch}_emit_offset(node, 1);",
O2 => "${arch}_emit_offset(node, 2);",
+ S0O1 => "${arch}_emit_source_reg_and_offset(node, 0, 1);",
+ S1O2 => "${arch}_emit_source_reg_and_offset(node, 1, 2);",
);
+$indent_line_func = "sparc_emit_indent()";
$default_attr_type = "sparc_attr_t";
$default_copy_attr = "sparc_copy_attr";
-
%init_attr = (
- sparc_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);",
- sparc_load_store_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);",
- sparc_jmp_cond_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);",
- sparc_switch_jmp_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);\n".
- "\tinit_sparc_switch_jmp_attributes(res, default_pn, jump_table);\n",
- sparc_save_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);",
- sparc_fp_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);\n".
+ sparc_attr_t => "\tinit_sparc_attributes(res, irn_flags_, in_reqs, n_res);",
+ sparc_load_store_attr_t => "\tinit_sparc_attributes(res, irn_flags_, in_reqs, n_res);",
+ sparc_jmp_cond_attr_t => "\tinit_sparc_attributes(res, irn_flags_, in_reqs, n_res);",
+ sparc_switch_jmp_attr_t => "\tinit_sparc_attributes(res, irn_flags_, in_reqs, n_res);\n".
+ "\tinit_sparc_switch_jmp_attributes(res, table, jump_table);\n",
+ sparc_fp_attr_t => "\tinit_sparc_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_sparc_fp_attributes(res, fp_mode);\n",
- sparc_fp_conv_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);".
+ sparc_fp_conv_attr_t => "\tinit_sparc_attributes(res, irn_flags_, in_reqs, n_res);".
"\tinit_sparc_fp_conv_attributes(res, src_mode, dest_mode);\n",
);
%compare_attr = (
sparc_attr_t => "cmp_attr_sparc",
- sparc_load_store_attr_t => "cmp_attr_sparc_load_store",
- sparc_jmp_cond_attr_t => "cmp_attr_sparc_jmp_cond",
- sparc_switch_jmp_attr_t => "cmp_attr_sparc_switch_jmp",
- sparc_save_attr_t => "cmp_attr_sparc_save",
sparc_fp_attr_t => "cmp_attr_sparc_fp",
sparc_fp_conv_attr_t => "cmp_attr_sparc_fp_conv",
+ sparc_jmp_cond_attr_t => "cmp_attr_sparc_jmp_cond",
+ sparc_load_store_attr_t => "cmp_attr_sparc_load_store",
+ sparc_switch_jmp_attr_t => "cmp_attr_sparc",
);
%custom_irn_flags = (
- modifies_flags => "sparc_arch_irn_flag_modifies_flags",
- modifies_fp_flags => "sparc_arch_irn_flag_modifies_fp_flags",
+ modifies_flags => "(arch_irn_flags_t)sparc_arch_irn_flag_modifies_flags",
+ modifies_fp_flags => "(arch_irn_flags_t)sparc_arch_irn_flag_modifies_fp_flags",
+ has_delay_slot => "(arch_irn_flags_t)sparc_arch_irn_flag_has_delay_slot",
);
-# addressing modes: imm, reg, reg +/- imm, reg + reg
-# max. imm = 13 bits signed (-4096 ... 4096)
-
my %cmp_operand_constructors = (
imm => {
attr => "ir_entity *immediate_entity, int32_t immediate_value",
},
);
+my %binopcc_operand_constructors = (
+ imm => {
+ attr => "ir_entity *immediate_entity, int32_t immediate_value",
+ custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);",
+ reg_req => { in => [ "gp" ], out => [ "gp", "flags" ] },
+ ins => [ "left" ],
+ },
+ reg => {
+ reg_req => { in => [ "gp", "gp" ], out => [ "gp", "flags" ] },
+ ins => [ "left", "right" ],
+ },
+);
+
+my %binopx_operand_constructors = (
+ imm => {
+ attr => "ir_entity *immediate_entity, int32_t immediate_value",
+ custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);",
+ reg_req => { in => [ "gp", "flags" ], out => [ "gp" ] },
+ ins => [ "left", "carry" ],
+ },
+ reg => {
+ reg_req => { in => [ "gp", "gp", "flags" ], out => [ "gp" ] },
+ ins => [ "left", "right", "carry" ],
+ },
+);
+
+
my %binopcczero_operand_constructors = (
imm => {
attr => "ir_entity *immediate_entity, int32_t immediate_value",
constructors => \%binop_operand_constructors,
},
+AddCC => {
+ irn_flags => [ "rematerializable", "modifies_flags" ],
+ emit => '. addcc %S0, %R1I, %D0',
+ outs => [ "res", "flags" ],
+ constructors => \%binopcc_operand_constructors,
+},
+
+AddCCZero => {
+ irn_flags => [ "rematerializable", "modifies_flags" ],
+ emit => '. addcc %S0, %R1I, %%g0',
+ mode => $mode_flags,
+ constructors => \%binopcczero_operand_constructors,
+},
+
+AddX => {
+ # At the moment not rematerializable because of assert in beflags.c/
+ # (it claims that spiller can't rematerialize flag stuff correctly)
+ #irn_flags => [ "rematerializable" ],
+ emit => '. addx %S0, %R1I, %D0',
+ constructors => \%binopx_operand_constructors,
+ mode => $mode_gp,
+},
+
+AddCC_t => {
+ ins => [ "left", "right" ],
+ outs => [ "res", "flags" ],
+ attr_type => "",
+ dump_func => "NULL",
+},
+
+AddX_t => {
+ ins => [ "left", "right", "flags_input" ],
+ attr_type => "",
+ dump_func => "NULL",
+},
+
Sub => {
irn_flags => [ "rematerializable" ],
mode => $mode_gp,
constructors => \%binop_operand_constructors,
},
+SubCC => {
+ irn_flags => [ "rematerializable", "modifies_flags" ],
+ emit => '. subcc %S0, %R1I, %D0',
+ outs => [ "res", "flags" ],
+ constructors => \%binopcc_operand_constructors,
+},
+
+SubCCZero => {
+ irn_flags => [ "rematerializable", "modifies_flags" ],
+ emit => '. subcc %S0, %R1I, %%g0',
+ mode => $mode_flags,
+ constructors => \%binopcczero_operand_constructors,
+},
+
+SubX => {
+ # Not rematerializable (see AddX)
+ emit => '. subx %S0, %R1I, %D0',
+ constructors => \%binopx_operand_constructors,
+ mode => $mode_gp,
+},
+
+SubCC_t => {
+ ins => [ "left", "right" ],
+ outs => [ "res", "flags" ],
+ attr_type => "",
+ dump_func => "NULL",
+},
+
+SubX_t => {
+ ins => [ "left", "right", "flags_input" ],
+ attr_type => "",
+ dump_func => "NULL",
+},
# Load / Store
Ld => {
- op_flags => [ "labeled", "fragile" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
constructors => {
imm => {
ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
attr_type => "sparc_load_store_attr_t",
- emit => '. ld%LM [%S0%O1], %D0'
+ emit => '. ld%LM [%S0O1], %D0'
},
SetHi => {
},
St => {
- op_flags => [ "labeled", "fragile" ],
+ op_flags => [ "labeled" ],
mode => "mode_M",
state => "exc_pinned",
constructors => {
ins => [ "val", "ptr", "mem" ],
outs => [ "M" ],
attr_type => "sparc_load_store_attr_t",
- emit => '. st%SM %S0, [%S1%O2]'
+ emit => '. st%SM %S0, [%S1O2]'
},
Save => {
- reg_req => {
- in => [ "sp", "none"],
- out => [ "sp:I|S", "frame_pointer:I", "none" ]
+ emit => '. save %S0, %R1I, %D0',
+ outs => [ "stack" ],
+ ins => [ "stack" ],
+ constructors => {
+ imm => {
+ attr => "ir_entity *immediate_entity, int32_t immediate_value",
+ custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);",
+ reg_req => { in => [ "sp" ], out => [ "sp:I|S" ] },
+ ins => [ "stack" ],
+ },
+ reg => {
+ reg_req => { in => [ "sp", "gp" ], out => [ "sp:I|S" ] },
+ ins => [ "stack", "increment" ],
+ }
},
- ins => [ "stack", "mem" ],
- outs => [ "stack", "frame", "mem" ],
- attr => "int initial_stacksize",
- attr_type => "sparc_save_attr_t",
- init_attr => "\tinit_sparc_save_attributes(res, initial_stacksize);",
+ mode => $mode_gp,
+},
+
+Restore => {
+ outs => [ "stack", "res" ],
+ constructors => {
+ imm => {
+ attr => "ir_entity *immediate_entity, int32_t immediate_value",
+ custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);",
+ reg_req => { in => [ "frame_pointer", "gp" ], out => [ "sp:I|S", "gp" ] },
+ ins => [ "frame_pointer", "left" ],
+ },
+ reg => {
+ reg_req => { in => [ "frame_pointer", "gp", "gp" ], out => [ "sp:I|S", "gp" ] },
+ ins => [ "frame_pointer", "left", "right" ],
+ }
+ },
+},
+
+RestoreZero => {
+ reg_req => { in => [ "frame_pointer" ], out => [ "sp:I|S" ] },
+ ins => [ "frame_pointer" ],
+ outs => [ "stack" ],
+ emit => '. restore',
+ mode => $mode_gp,
},
SubSP => {
- reg_req => { in => [ "sp", "gp", "none" ], out => [ "sp:I|S", "gp", "none" ] },
- ins => [ "stack", "size", "mem" ],
- outs => [ "stack", "addr", "M" ],
- emit => ". sub %S0, %S1, %D0\n",
+ reg_req => { in => [ "sp", "gp" ], out => [ "sp:I|S" ] },
+ ins => [ "stack", "size" ],
+ outs => [ "stack" ],
+ emit => ". sub %S0, %S1, %D0\n",
+ mode => $mode_gp,
},
AddSP => {
- reg_req => { in => [ "sp", "gp", "none" ], out => [ "sp:I|S", "none" ] },
- ins => [ "stack", "size", "mem" ],
- outs => [ "stack", "M" ],
- emit => ". add %S0, %S1, %D0\n",
+ reg_req => { in => [ "sp", "gp" ], out => [ "sp:I|S" ] },
+ ins => [ "stack", "size" ],
+ outs => [ "stack" ],
+ emit => ". add %S0, %S1, %D0\n",
+ mode => $mode_gp,
},
FrameAddr => {
Bicc => {
op_flags => [ "labeled", "cfopcode", "forking" ],
+ irn_flags => [ "has_delay_slot" ],
state => "pinned",
mode => "mode_T",
attr_type => "sparc_jmp_cond_attr_t",
- attr => "pn_Cmp pnc, bool is_unsigned",
- init_attr => "\tinit_sparc_jmp_cond_attr(res, pnc, is_unsigned);",
+ attr => "ir_relation relation, bool is_unsigned",
+ init_attr => "\tinit_sparc_jmp_cond_attr(res, relation, is_unsigned);",
reg_req => { in => [ "flags" ], out => [ "none", "none" ] },
+ ins => [ "flags" ],
+ outs => [ "false", "true" ],
},
fbfcc => {
op_flags => [ "labeled", "cfopcode", "forking" ],
+ irn_flags => [ "has_delay_slot" ],
state => "pinned",
mode => "mode_T",
attr_type => "sparc_jmp_cond_attr_t",
- attr => "pn_Cmp pnc",
- init_attr => "\tinit_sparc_jmp_cond_attr(res, pnc, false);",
+ attr => "ir_relation relation",
+ init_attr => "\tinit_sparc_jmp_cond_attr(res, relation, false);",
reg_req => { in => [ "fpflags" ], out => [ "none", "none" ] },
+ ins => [ "flags" ],
+ outs => [ "false", "true" ],
},
Ba => {
+ # Note: has_delay_slot depends on wether it is a fallthrough or not, so we
+ # have special code for this in sparc_emitter
state => "pinned",
op_flags => [ "cfopcode" ],
irn_flags => [ "simple_jump" ],
mode => "mode_X",
},
-Call => {
- irn_flags => [ "modifies_flags", "modifies_fp_flags" ],
- state => "exc_pinned",
- arity => "variable",
+Start => {
+ state => "pinned",
out_arity => "variable",
+ ins => [],
+},
+
+# This is a Jump instruction, but with the addition that you can add custom
+# register constraints to model your calling conventions
+Return => {
+ state => "pinned",
+ op_flags => [ "cfopcode" ],
+ irn_flags => [ "has_delay_slot" ],
+ arity => "variable",
+ mode => "mode_X",
constructors => {
imm => {
attr => "ir_entity *entity, int32_t offset",
custominit => "\tsparc_set_attr_imm(res, entity, offset);",
arity => "variable",
- out_arity => "variable",
+ reg_req => { out => [ "none" ] },
},
reg => {
arity => "variable",
+ reg_req => { out => [ "none" ] },
+ }
+ },
+},
+
+# This is a JumpLink instruction, but with the addition that you can add custom
+# register constraints to model your calling conventions
+Call => {
+ irn_flags => [ "modifies_flags", "modifies_fp_flags", "has_delay_slot" ],
+ state => "exc_pinned",
+ arity => "variable",
+ out_arity => "variable",
+ constructors => {
+ imm => {
+ attr => "ir_entity *entity, int32_t offset, bool aggregate_return",
+ custominit => "\tsparc_set_attr_imm(res, entity, offset);".
+ "\tif (aggregate_return) arch_add_irn_flags(res, (arch_irn_flags_t)sparc_arch_irn_flag_aggregate_return);",
+ arity => "variable",
out_arity => "variable",
+ },
+ reg => {
+ attr => "bool aggregate_return",
+ arity => "variable",
+ out_arity => "variable",
+ custominit => "\tif (aggregate_return) arch_add_irn_flags(res, (arch_irn_flags_t)sparc_arch_irn_flag_aggregate_return);",
}
},
},
SwitchJmp => {
op_flags => [ "labeled", "cfopcode", "forking" ],
+ irn_flags => [ "has_delay_slot" ],
state => "pinned",
mode => "mode_T",
reg_req => { in => [ "gp" ], out => [ ] },
+ out_arity => "variable",
attr_type => "sparc_switch_jmp_attr_t",
- attr => "long default_pn, ir_entity *jump_table",
- init_attr => "info->out_infos = NULL;", # XXX ugly hack for out requirements
+ attr => "const ir_switch_table *table, ir_entity *jump_table",
},
Sll => {
constructors => \%binop_operand_constructors,
},
-Mulh => {
+MulCCZero => {
+ irn_flags => [ "rematerializable", "modifies_flags" ],
+ emit => '. smulcc %S0, %R1I, %%g0',
+ mode => $mode_flags,
+ constructors => \%binopcczero_operand_constructors,
+},
+
+SMulh => {
irn_flags => [ "rematerializable" ],
outs => [ "low", "high" ],
constructors => \%binop_operand_constructors,
},
-SDiv => {
+UMulh => {
irn_flags => [ "rematerializable" ],
+ outs => [ "low", "high" ],
+ constructors => \%binop_operand_constructors,
+},
+
+SDiv => {
+ irn_flags => [ "rematerializable", "has_delay_slot" ],
state => "exc_pinned",
ins => [ "dividend_high", "dividend_low", "divisor" ],
outs => [ "res", "M" ],
},
UDiv => {
- irn_flags => [ "rematerializable" ],
+ irn_flags => [ "rematerializable", "has_delay_slot" ],
state => "exc_pinned",
ins => [ "dividend_high", "dividend_low", "divisor" ],
outs => [ "res", "M" ],
irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fp" ], out => [ "fp" ] },
# note that we only need the first register even for wide-values
- emit => '. fneg %S0, %D0',
+ emit => '. fnegs %S0, %D0',
attr_type => "sparc_fp_attr_t",
attr => "ir_mode *fp_mode",
ins => [ "val" ],
},
Ldf => {
- op_flags => [ "labeled", "fragile" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
constructors => {
s => {
},
Stf => {
- op_flags => [ "labeled", "fragile" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
constructors => {
s => {
projects / libfirm / blobdiff