/**
* @file
* @brief The main sparc backend driver file.
+ * @author Hannes Rapp, Matthias Braun
* @version $Id$
*/
#include "config.h"
#include "irtools.h"
#include "irdump.h"
#include "lowering.h"
+#include "lower_dw.h"
#include "bitset.h"
#include "debug.h"
#include "array_t.h"
#include "error.h"
+#include "util.h"
#include "../bearch.h"
#include "../benode.h"
#include "../besched.h"
#include "be.h"
#include "../bemachine.h"
-#include "../beilpsched.h"
#include "../bemodule.h"
#include "../beirg.h"
#include "../bespillslots.h"
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
-static arch_irn_class_t sparc_classify(const ir_node *irn)
+static arch_irn_class_t sparc_classify(const ir_node *node)
{
- (void) irn;
- return 0;
+ (void) node;
+ return arch_irn_class_none;
}
-static ir_entity *sparc_get_frame_entity(const ir_node *irn)
+static ir_entity *sparc_get_frame_entity(const ir_node *node)
{
- if (is_sparc_FrameAddr(irn)) {
- const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
- return attr->entity;
+ if (is_sparc_FrameAddr(node)) {
+ const sparc_attr_t *attr = get_sparc_attr_const(node);
+ return attr->immediate_value_entity;
}
- if (sparc_has_load_store_attr(irn)) {
- const sparc_load_store_attr_t *load_store_attr = get_sparc_load_store_attr_const(irn);
+ if (sparc_has_load_store_attr(node)) {
+ const sparc_load_store_attr_t *load_store_attr
+ = get_sparc_load_store_attr_const(node);
if (load_store_attr->is_frame_entity) {
- return load_store_attr->entity;
+ return load_store_attr->base.immediate_value_entity;
}
}
* This function is called by the generic backend to correct offsets for
* nodes accessing the stack.
*/
-static void sparc_set_frame_offset(ir_node *irn, int offset)
+static void sparc_set_frame_offset(ir_node *node, int offset)
{
- if (is_sparc_FrameAddr(irn)) {
- sparc_symconst_attr_t *attr = get_irn_generic_attr(irn);
- attr->fp_offset += offset;
- } else {
- sparc_load_store_attr_t *attr = get_sparc_load_store_attr(irn);
- assert(sparc_has_load_store_attr(irn));
- attr->offset += offset;
- }
+ sparc_attr_t *attr = get_sparc_attr(node);
+ attr->immediate_value += offset;
+
+ /* must be a FrameAddr or a load/store node with frame_entity */
+ assert(is_sparc_FrameAddr(node) ||
+ get_sparc_load_store_attr_const(node)->is_frame_entity);
}
static int sparc_get_sp_bias(const ir_node *node)
{
if (is_sparc_Save(node)) {
- const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
- /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
+ const sparc_attr_t *attr = get_sparc_attr_const(node);
+ if (get_irn_arity(node) == 3)
+ panic("no support for _reg variant yet");
+
+ /* Note we do not report the change of the SPARC_MIN_STACKSIZE
* size, since we have additional magic in the emitter which
* calculates that! */
- assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
- return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
+ assert(attr->immediate_value <= -SPARC_MIN_STACKSIZE);
+ return attr->immediate_value + SPARC_MIN_STACKSIZE;
+ } else if (is_sparc_RestoreZero(node)) {
+ return SP_BIAS_RESET;
}
return 0;
}
/* fill register allocator interface */
-static const arch_irn_ops_t sparc_irn_ops = {
- get_sparc_in_req,
+const arch_irn_ops_t sparc_irn_ops = {
sparc_classify,
sparc_get_frame_entity,
sparc_set_frame_offset,
NULL, /* perform_memory_operand */
};
-
-
/**
* Transforms the standard firm graph into
* a SPARC firm graph
*/
-static void sparc_prepare_graph(void *self)
+static void sparc_prepare_graph(ir_graph *irg)
{
- sparc_code_gen_t *cg = self;
-
- /* transform FIRM into SPARC asm nodes */
- sparc_transform_graph(cg);
-
- if (cg->dump)
- dump_ir_graph(cg->irg, "transformed");
+ sparc_transform_graph(irg);
}
static bool sparc_modifies_flags(const ir_node *node)
return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
}
-static void sparc_before_ra(void *self)
+static void sparc_before_ra(ir_graph *irg)
{
- sparc_code_gen_t *cg = self;
/* fixup flags register */
- be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags_class],
+ be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
NULL, sparc_modifies_flags);
- be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
+ be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
NULL, sparc_modifies_fp_flags);
}
{
ir_node *block = get_nodes_block(node);
dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
- ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
+ ir_node *ptr = get_irn_n(node, n_be_Spill_frame);
+ ir_node *mem = get_irn_n(node, n_be_Reload_mem);
ir_mode *mode = get_irn_mode(node);
ir_entity *entity = be_get_frame_entity(node);
const arch_register_t *reg;
ir_node *sched_point = sched_prev(node);
- load = new_bd_sparc_Ld(dbgi, block, ptr, mem, mode, entity, false, 0, true);
+ load = new_bd_sparc_Ld_imm(dbgi, block, ptr, mem, mode, entity, 0, true);
sched_add_after(sched_point, load);
sched_remove(node);
{
ir_node *block = get_nodes_block(node);
dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
- ir_node *mem = new_NoMem();
- ir_node *val = get_irn_n(node, be_pos_Spill_val);
+ ir_node *ptr = get_irn_n(node, n_be_Spill_frame);
+ ir_graph *irg = get_irn_irg(node);
+ ir_node *mem = get_irg_no_mem(irg);
+ ir_node *val = get_irn_n(node, n_be_Spill_val);
ir_mode *mode = get_irn_mode(val);
ir_entity *entity = be_get_frame_entity(node);
ir_node *sched_point;
ir_node *store;
sched_point = sched_prev(node);
- store = new_bd_sparc_St(dbgi, block, ptr, val, mem, mode, entity, false, 0, true);
+ store = new_bd_sparc_St_imm(dbgi, block, val, ptr, mem, mode, entity, 0, true);
sched_remove(node);
sched_add_after(sched_point, store);
static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
{
- be_fec_env_t *env = data;
+ be_fec_env_t *env = (be_fec_env_t*)data;
const ir_mode *mode;
int align;
ir_entity *entity;
return;
attr = get_sparc_load_store_attr_const(node);
- entity = attr->entity;
+ entity = attr->base.immediate_value_entity;
mode = attr->load_store_mode;
if (entity != NULL)
return;
/* we only say be_node_needs_frame_entity on nodes with load_store
* attributes, so this should be fine */
sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
- attr->entity = entity;
+ assert(attr->is_frame_entity);
+ assert(attr->base.immediate_value_entity == NULL);
+ attr->base.immediate_value_entity = entity;
}
}
-
-static void sparc_after_ra(void *self)
+static void sparc_after_ra(ir_graph *irg)
{
- sparc_code_gen_t *cg = self;
- ir_graph *irg = cg->irg;
- be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
+ be_stack_layout_t *stack_layout = be_get_irg_stack_layout(irg);
+ bool at_begin = stack_layout->sp_relative ? true : false;
+ be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
- be_assign_entities(fec_env, sparc_set_frame_entity);
+ be_assign_entities(fec_env, sparc_set_frame_entity, at_begin);
be_free_frame_entity_coalescer(fec_env);
- irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
-}
-
-
+ irg_block_walk_graph(irg, NULL, sparc_after_ra_walker, NULL);
-/**
- * Emits the code, closes the output file and frees
- * the code generator interface.
- */
-static void sparc_emit_and_done(void *self)
-{
- sparc_code_gen_t *cg = self;
- ir_graph *irg = cg->irg;
-
- sparc_gen_routine(cg, irg);
-
- /* de-allocate code generator */
- free(cg);
+ sparc_introduce_prolog_epilog(irg);
}
-static void *sparc_cg_init(ir_graph *irg);
-
-static const arch_code_generator_if_t sparc_code_gen_if = {
- sparc_cg_init,
- NULL, /* get_pic_base hook */
- NULL, /* before abi introduce hook */
- sparc_prepare_graph,
- NULL, /* spill hook */
- sparc_before_ra, /* before register allocation hook */
- sparc_after_ra, /* after register allocation hook */
- NULL,
- sparc_emit_and_done
-};
-
-/**
- * Initializes the code generator.
- */
-static void *sparc_cg_init(ir_graph *irg)
+static void sparc_init_graph(ir_graph *irg)
{
- sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
- sparc_code_gen_t *cg = XMALLOCZ(sparc_code_gen_t);
-
- cg->impl = &sparc_code_gen_if;
- cg->irg = irg;
- cg->isa = isa;
- cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) != 0;
- cg->constants = pmap_create();
-
- /* enter the current code generator */
- isa->cg = cg;
-
- return (arch_code_generator_t*) cg;
+ (void) irg;
}
-const arch_isa_if_t sparc_isa_if;
+extern const arch_isa_if_t sparc_isa_if;
static sparc_isa_t sparc_isa_template = {
{
&sparc_isa_if, /* isa interface implementation */
- &sparc_gp_regs[REG_SP], /* stack pointer register */
- &sparc_gp_regs[REG_FRAME_POINTER], /* base pointer register */
+ N_SPARC_REGISTERS,
+ sparc_registers,
+ N_SPARC_CLASSES,
+ sparc_reg_classes,
+ &sparc_registers[REG_SP], /* stack pointer register */
+ &sparc_registers[REG_FRAME_POINTER],/* base pointer register */
&sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
- -1, /* stack direction */
3, /* power of two stack alignment
for calls */
NULL, /* main environment */
5, /* costs for a reload instruction */
true, /* custom abi handling */
},
- NULL /* current code generator */
+ NULL, /* constants */
};
+/**
+ * rewrite unsigned->float conversion.
+ * Sparc has no instruction for this so instead we do the following:
+ *
+ * int signed_x = unsigned_value_x;
+ * double res = signed_x;
+ * if (signed_x < 0)
+ * res += 4294967296. ;
+ * return (float) res;
+ */
+static void rewrite_unsigned_float_Conv(ir_node *node)
+{
+ ir_graph *irg = get_irn_irg(node);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *lower_block = get_nodes_block(node);
+
+ part_block(node);
+
+ {
+ ir_node *block = get_nodes_block(node);
+ ir_node *unsigned_x = get_Conv_op(node);
+ ir_mode *mode_u = get_irn_mode(unsigned_x);
+ ir_mode *mode_s = find_signed_mode(mode_u);
+ ir_mode *mode_d = mode_D;
+ ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
+ ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
+ ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
+ ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero,
+ ir_relation_less);
+ ir_node *cond = new_rd_Cond(dbgi, block, cmp);
+ ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
+ ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
+ ir_node *in_true[1] = { proj_true };
+ ir_node *in_false[1] = { proj_false };
+ ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
+ ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
+ ir_node *true_jmp = new_r_Jmp(true_block);
+ ir_node *false_jmp = new_r_Jmp(false_block);
+ ir_tarval *correction = new_tarval_from_double(4294967296., mode_d);
+ ir_node *c_const = new_r_Const(irg, correction);
+ ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
+ mode_d);
+
+ ir_node *lower_in[2] = { true_jmp, false_jmp };
+ ir_node *phi_in[2] = { fadd, res };
+ ir_mode *dest_mode = get_irn_mode(node);
+ ir_node *phi;
+ ir_node *res_conv;
+
+ set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
+ phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
+ assert(get_Block_phis(lower_block) == NULL);
+ set_Block_phis(lower_block, phi);
+ set_Phi_next(phi, NULL);
+
+ res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
+
+ exchange(node, res_conv);
+ }
+}
+
+static int sparc_rewrite_Conv(ir_node *node, void *ctx)
+{
+ ir_mode *to_mode = get_irn_mode(node);
+ ir_node *op = get_Conv_op(node);
+ ir_mode *from_mode = get_irn_mode(op);
+ (void) ctx;
+
+ if (mode_is_float(to_mode) && mode_is_int(from_mode)
+ && get_mode_size_bits(from_mode) == 32
+ && !mode_is_signed(from_mode)) {
+ rewrite_unsigned_float_Conv(node);
+ return 1;
+ }
+
+ return 0;
+}
static void sparc_handle_intrinsics(void)
{
ir_type *tp, *int_tp, *uint_tp;
i_record records[8];
- int n_records = 0;
+ size_t n_records = 0;
runtime_rt rt_iMod, rt_uMod;
int_tp = new_type_primitive(mode_Is);
uint_tp = new_type_primitive(mode_Iu);
+ /* we need to rewrite some forms of int->float conversions */
+ {
+ i_instr_record *map_Conv = &records[n_records++].i_instr;
+ map_Conv->kind = INTRINSIC_INSTR;
+ map_Conv->op = op_Conv;
+ map_Conv->i_mapper = sparc_rewrite_Conv;
+ }
/* SPARC has no signed mod instruction ... */
{
i_instr_record *map_Mod = &records[n_records++].i_instr;
rt_iMod.mem_proj_nr = pn_Mod_M;
rt_iMod.regular_proj_nr = pn_Mod_X_regular;
rt_iMod.exc_proj_nr = pn_Mod_X_except;
- rt_iMod.exc_mem_proj_nr = pn_Mod_M;
rt_iMod.res_proj_nr = pn_Mod_res;
set_entity_visibility(rt_iMod.ent, ir_visibility_external);
rt_uMod.mem_proj_nr = pn_Mod_M;
rt_uMod.regular_proj_nr = pn_Mod_X_regular;
rt_uMod.exc_proj_nr = pn_Mod_X_except;
- rt_uMod.exc_mem_proj_nr = pn_Mod_M;
rt_uMod.res_proj_nr = pn_Mod_res;
set_entity_visibility(rt_uMod.ent, ir_visibility_external);
map_Mod->ctx = &rt_uMod;
}
- if (n_records > 0)
- lower_intrinsics(records, n_records, /*part_block_used=*/0);
+ assert(n_records < ARRAY_SIZE(records));
+ lower_intrinsics(records, n_records, /*part_block_used=*/ true);
}
-
/**
* Initializes the backend ISA
*/
static arch_env_t *sparc_init(FILE *outfile)
{
- static int run_once = 0;
- sparc_isa_t *isa;
-
- if (run_once)
- return NULL;
- run_once = 1;
-
- isa = XMALLOC(sparc_isa_t);
- memcpy(isa, &sparc_isa_template, sizeof(*isa));
+ sparc_isa_t *isa = XMALLOC(sparc_isa_t);
+ *isa = sparc_isa_template;
+ isa->constants = pmap_create();
be_emit_init(outfile);
return &isa->base;
}
-
-
/**
* Closes the output file and frees the ISA structure.
*/
static void sparc_done(void *self)
{
- sparc_isa_t *isa = self;
+ sparc_isa_t *isa = (sparc_isa_t*)self;
/* emit now all global declarations */
be_gas_emit_decls(isa->base.main_env);
+ pmap_destroy(isa->constants);
be_emit_exit();
- free(self);
+ free(isa);
}
-static unsigned sparc_get_n_reg_class(void)
-{
- return N_CLASSES;
-}
-
-static const arch_register_class_t *sparc_get_reg_class(unsigned i)
-{
- assert(i < N_CLASSES);
- return &sparc_reg_classes[i];
-}
-
-
-
/**
* Get the register class which shall be used to store a value of a given mode.
* @param self The this pointer.
return &sparc_reg_classes[CLASS_sparc_gp];
}
-static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
-{
- (void) block_env;
-
- if (!is_sparc_irn(irn))
- return -1;
-
- return 1;
-}
-
/**
- * Initializes the code generator interface.
+ * Returns the necessary byte alignment for storing a register of given class.
*/
-static const arch_code_generator_if_t *sparc_get_code_generator_if(
- void *self)
+static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
{
- (void) self;
- return &sparc_code_gen_if;
+ ir_mode *mode = arch_register_class_mode(cls);
+ return get_mode_size_bytes(mode);
}
-list_sched_selector_t sparc_sched_selector;
-
-/**
- * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
- */
-static const list_sched_selector_t *sparc_get_list_sched_selector(
- const void *self, list_sched_selector_t *selector)
+static ir_node *sparc_create_set(ir_node *cond)
{
- (void) self;
- (void) selector;
-
- sparc_sched_selector = trivial_selector;
- sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
- return &sparc_sched_selector;
+ return ir_create_cond_set(cond, mode_Iu);
}
-static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
- const void *self)
+static void sparc_lower_for_target(void)
{
- (void) self;
- return NULL;
-}
+ size_t i, n_irgs = get_irp_n_irgs();
+ lower_mode_b_config_t lower_mode_b_config = {
+ mode_Iu,
+ sparc_create_set,
+ 0,
+ };
+ lower_params_t params = {
+ 4, /* def_ptr_alignment */
+ LF_COMPOUND_RETURN | LF_RETURN_HIDDEN, /* flags */
+ ADD_HIDDEN_ALWAYS_IN_FRONT, /* hidden_params */
+ NULL, /* find pointer type */
+ NULL, /* ret_compound_in_regs */
+ };
+ lower_calls_with_compounds(¶ms);
-/**
- * Returns the necessary byte alignment for storing a register of given class.
- */
-static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
-{
- ir_mode *mode = arch_register_class_mode(cls);
- return get_mode_size_bytes(mode);
+ sparc_lower_64bit();
+
+ for (i = 0; i < n_irgs; ++i) {
+ ir_graph *irg = get_irp_irg(i);
+ ir_lower_mode_b(irg, &lower_mode_b_config);
+ lower_switch(irg, 4, 256, false);
+ }
}
-static void sparc_lower_for_target(void)
+static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
+ ir_node *mux_true)
{
- /* TODO, doubleword lowering and others */
+ ir_graph *irg = get_irn_irg(sel);
+ ir_mode *mode = get_irn_mode(mux_true);
+
+ if (get_irg_phase_state(irg) == phase_low)
+ return false;
+
+ if (!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
+ return false;
+ if (is_Const(mux_true) && is_Const_one(mux_true) &&
+ is_Const(mux_false) && is_Const_null(mux_false))
+ return true;
+ return false;
}
/**
*/
static const backend_params *sparc_get_backend_params(void)
{
+ static const ir_settings_arch_dep_t arch_dep = {
+ 1, /* also_use_subs */
+ 1, /* maximum_shifts */
+ 31, /* highest_shift_amount */
+ NULL, /* evaluate_cost_func */
+ 1, /* allow mulhs */
+ 1, /* allow mulhu */
+ 32, /* max_bits_for_mulh */
+ };
static backend_params p = {
0, /* no inline assembly */
- sparc_lower_for_target, /* lowering callback */
- NULL, /* will be set later */
- NULL, /* parameter for if conversion */
+ 0, /* no support for RotL nodes */
+ 1, /* big endian */
+ &arch_dep, /* will be set later */
+ sparc_is_mux_allowed, /* parameter for if conversion */
+ 32, /* machine size */
NULL, /* float arithmetic mode */
+ 128, /* size of long double */
0, /* no trampoline support: size 0 */
0, /* no trampoline support: align 0 */
NULL, /* no trampoline support: no trampoline builder */
return &p;
}
-static const be_execution_unit_t ***sparc_get_allowed_execution_units(
- const ir_node *irn)
-{
- (void) irn;
- /* TODO */
- panic("sparc_get_allowed_execution_units not implemented yet");
-}
-
-static const be_machine_t *sparc_get_machine(const void *self)
-{
- (void) self;
- /* TODO */
- panic("sparc_get_machine not implemented yet");
-}
-
static ir_graph **sparc_get_backend_irg_list(const void *self,
ir_graph ***irgs)
{
const arch_isa_if_t sparc_isa_if = {
sparc_init,
+ sparc_lower_for_target,
sparc_done,
NULL, /* handle intrinsics */
- sparc_get_n_reg_class,
- sparc_get_reg_class,
sparc_get_reg_class_for_mode,
NULL,
- sparc_get_code_generator_if,
- sparc_get_list_sched_selector,
- sparc_get_ilp_sched_selector,
sparc_get_reg_class_alignment,
sparc_get_backend_params,
- sparc_get_allowed_execution_units,
- sparc_get_machine,
sparc_get_backend_irg_list,
NULL, /* mark remat */
sparc_parse_asm_constraint,
- sparc_is_valid_clobber
+ sparc_is_valid_clobber,
+
+ sparc_init_graph,
+ NULL, /* get_pic_base */
+ NULL, /* before_abi */
+ sparc_prepare_graph,
+ sparc_before_ra,
+ sparc_after_ra,
+ sparc_finish,
+ sparc_emit_routine,
+ NULL, /* register_saved_by */
};
-BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
+BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
void be_init_arch_sparc(void)
{
be_register_isa_if("sparc", &sparc_isa_if);
projects / libfirm / blobdiff