* @brief The main sparc backend driver file.
* @version $Id$
*/
-
#include "config.h"
#include "lc_opts.h"
#include "lc_opts_enum.h"
-#include "pseudo_irg.h"
#include "irgwalk.h"
#include "irprog.h"
#include "irprintf.h"
#include "debug.h"
#include "array_t.h"
#include "error.h"
+#include "util.h"
#include "../bearch.h"
#include "../benode.h"
#include "../belower.h"
#include "../besched.h"
#include "be.h"
-#include "../beabi.h"
#include "../bemachine.h"
-#include "../beilpsched.h"
#include "../bemodule.h"
#include "../beirg.h"
#include "../bespillslots.h"
#include "../beflags.h"
#include "bearch_sparc_t.h"
-#include "bearch_sparc.h"
#include "sparc_new_nodes.h"
#include "gen_sparc_regalloc_if.h"
#include "sparc_transform.h"
#include "sparc_emitter.h"
-#include "sparc_map_regs.h"
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
-static arch_irn_class_t sparc_classify(const ir_node *irn)
+static arch_irn_class_t sparc_classify(const ir_node *node)
{
- (void) irn;
+ (void) node;
return 0;
}
-static ir_entity *sparc_get_frame_entity(const ir_node *irn)
+static ir_entity *sparc_get_frame_entity(const ir_node *node)
{
- const sparc_attr_t *attr = get_sparc_attr_const(irn);
-
- if (is_sparc_FrameAddr(irn)) {
- const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
- return attr->entity;
+ if (is_sparc_FrameAddr(node)) {
+ const sparc_attr_t *attr = get_sparc_attr_const(node);
+ return attr->immediate_value_entity;
}
- if (attr->is_load_store) {
- const sparc_load_store_attr_t *load_store_attr = get_sparc_load_store_attr_const(irn);
+ if (sparc_has_load_store_attr(node)) {
+ const sparc_load_store_attr_t *load_store_attr
+ = get_sparc_load_store_attr_const(node);
if (load_store_attr->is_frame_entity) {
- return load_store_attr->entity;
+ return load_store_attr->base.immediate_value_entity;
}
}
return NULL;
}
-static void sparc_set_frame_entity(ir_node *node, ir_entity *ent)
-{
- (void) node;
- (void) ent;
- panic("sparc_set_frame_entity() called. This should not happen.");
- /* TODO: set the ir_entity assigned to the frame */
-}
-
/**
* This function is called by the generic backend to correct offsets for
* nodes accessing the stack.
*/
-static void sparc_set_frame_offset(ir_node *irn, int offset)
+static void sparc_set_frame_offset(ir_node *node, int offset)
{
- if (is_sparc_FrameAddr(irn)) {
- sparc_symconst_attr_t *attr = get_irn_generic_attr(irn);
- attr->fp_offset += offset;
- } else {
- sparc_load_store_attr_t *attr = get_sparc_load_store_attr(irn);
- assert(attr->base.is_load_store);
- attr->offset += offset;
- }
+ sparc_attr_t *attr = get_sparc_attr(node);
+ attr->immediate_value += offset;
+
+ /* must be a FrameAddr or a load/store node with frame_entity */
+ assert(is_sparc_FrameAddr(node) ||
+ get_sparc_load_store_attr_const(node)->is_frame_entity);
}
-static int sparc_get_sp_bias(const ir_node *irn)
+static int sparc_get_sp_bias(const ir_node *node)
{
- (void) irn;
- return SPARC_MIN_STACKSIZE;
+ if (is_sparc_Save(node)) {
+ const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
+ /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
+ * size, since we have additional magic in the emitter which
+ * calculates that! */
+ assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
+ return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
+ }
+ return 0;
}
/* fill register allocator interface */
static const arch_irn_ops_t sparc_irn_ops = {
- get_sparc_in_req,
sparc_classify,
sparc_get_frame_entity,
- sparc_set_frame_entity,
sparc_set_frame_offset,
sparc_get_sp_bias,
NULL, /* get_inverse */
NULL, /* perform_memory_operand */
};
-
-
/**
* Transforms the standard firm graph into
* a SPARC firm graph
*/
-static void sparc_prepare_graph(void *self)
+static void sparc_prepare_graph(ir_graph *irg)
{
- sparc_code_gen_t *cg = self;
-
- /* transform FIRM into SPARC asm nodes */
- sparc_transform_graph(cg);
-
- if (cg->dump)
- dump_ir_graph(cg->irg, "transformed");
+ sparc_transform_graph(irg);
}
-
-
-static ir_node *sparc_flags_remat(ir_node *node, ir_node *after)
+static bool sparc_modifies_flags(const ir_node *node)
{
- ir_node *block;
- ir_node *copy;
+ return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
+}
- if (is_Block(after)) {
- block = after;
- } else {
- block = get_nodes_block(after);
- }
- copy = exact_copy(node);
- set_nodes_block(copy, block);
- sched_add_after(after, copy);
- return copy;
+static bool sparc_modifies_fp_flags(const ir_node *node)
+{
+ return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
}
-static void sparc_before_ra(void *self)
+static void sparc_before_ra(ir_graph *irg)
{
- sparc_code_gen_t *cg = self;
/* fixup flags register */
- be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags], &sparc_flags_remat);
+ be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
+ NULL, sparc_modifies_flags);
+ be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
+ NULL, sparc_modifies_fp_flags);
}
/**
*/
static void transform_Reload(ir_node *node)
{
- ir_graph *irg = get_irn_irg(node);
ir_node *block = get_nodes_block(node);
dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *ptr = get_irg_frame(irg);
+ ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
ir_mode *mode = get_irn_mode(node);
ir_entity *entity = be_get_frame_entity(node);
ir_node *sched_point = sched_prev(node);
- load = new_bd_sparc_Load(dbgi, block, ptr, mem, mode, entity, false, 0, true);
+ load = new_bd_sparc_Ld_imm(dbgi, block, ptr, mem, mode, entity, 0, true);
sched_add_after(sched_point, load);
sched_remove(node);
- proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Load_res);
+ proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
reg = arch_get_irn_register(node);
arch_set_irn_register(proj, reg);
*/
static void transform_Spill(ir_node *node)
{
- ir_graph *irg = get_irn_irg(node);
ir_node *block = get_nodes_block(node);
dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *ptr = get_irg_frame(irg);
- ir_node *mem = new_NoMem();
+ ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
+ ir_graph *irg = get_irn_irg(node);
+ ir_node *mem = new_r_NoMem(irg);
ir_node *val = get_irn_n(node, be_pos_Spill_val);
ir_mode *mode = get_irn_mode(val);
ir_entity *entity = be_get_frame_entity(node);
ir_node *store;
sched_point = sched_prev(node);
- store = new_bd_sparc_Store(dbgi, block, ptr, val, mem, mode, entity, false, 0, true);
+ store = new_bd_sparc_St_imm(dbgi, block, val, ptr, mem, mode, entity, 0, true);
sched_remove(node);
sched_add_after(sched_point, store);
}
}
-
-static void sparc_after_ra(void *self)
+static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
{
- sparc_code_gen_t *cg = self;
- be_coalesce_spillslots(cg->irg);
+ be_fec_env_t *env = data;
+ const ir_mode *mode;
+ int align;
+ ir_entity *entity;
+ const sparc_load_store_attr_t *attr;
- irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
-}
+ if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
+ mode = get_irn_mode(node);
+ align = get_mode_size_bytes(mode);
+ be_node_needs_frame_entity(env, node, mode, align);
+ return;
+ }
+ if (!is_sparc_Ld(node) && !is_sparc_Ldf(node))
+ return;
+ attr = get_sparc_load_store_attr_const(node);
+ entity = attr->base.immediate_value_entity;
+ mode = attr->load_store_mode;
+ if (entity != NULL)
+ return;
+ if (!attr->is_frame_entity)
+ return;
+ if (arch_irn_get_flags(node) & sparc_arch_irn_flag_needs_64bit_spillslot)
+ mode = mode_Lu;
+ align = get_mode_size_bytes(mode);
+ be_node_needs_frame_entity(env, node, mode, align);
+}
-/**
- * Emits the code, closes the output file and frees
- * the code generator interface.
- */
-static void sparc_emit_and_done(void *self)
+static void sparc_set_frame_entity(ir_node *node, ir_entity *entity)
{
- sparc_code_gen_t *cg = self;
- ir_graph *irg = cg->irg;
+ if (is_be_node(node)) {
+ be_node_set_frame_entity(node, entity);
+ } else {
+ /* we only say be_node_needs_frame_entity on nodes with load_store
+ * attributes, so this should be fine */
+ sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
+ assert(attr->is_frame_entity);
+ assert(attr->base.immediate_value_entity == NULL);
+ attr->base.immediate_value_entity = entity;
+ }
+}
+
+static void sparc_after_ra(ir_graph *irg)
+{
+ be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
- sparc_gen_routine(cg, irg);
+ irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
+ be_assign_entities(fec_env, sparc_set_frame_entity);
+ be_free_frame_entity_coalescer(fec_env);
- /* de-allocate code generator */
- free(cg);
+ irg_block_walk_graph(irg, NULL, sparc_after_ra_walker, NULL);
}
-static void *sparc_cg_init(ir_graph *irg);
+static void sparc_init_graph(ir_graph *irg)
+{
+ (void) irg;
+}
-static const arch_code_generator_if_t sparc_code_gen_if = {
- sparc_cg_init,
- NULL, /* get_pic_base hook */
- NULL, /* before abi introduce hook */
- sparc_prepare_graph,
- NULL, /* spill hook */
- sparc_before_ra, /* before register allocation hook */
- sparc_after_ra, /* after register allocation hook */
- NULL,
- sparc_emit_and_done
+const arch_isa_if_t sparc_isa_if;
+static sparc_isa_t sparc_isa_template = {
+ {
+ &sparc_isa_if, /* isa interface implementation */
+ N_SPARC_REGISTERS,
+ sparc_registers,
+ &sparc_registers[REG_SP], /* stack pointer register */
+ &sparc_registers[REG_FRAME_POINTER],/* base pointer register */
+ &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
+ -1, /* stack direction */
+ 3, /* power of two stack alignment
+ for calls */
+ NULL, /* main environment */
+ 7, /* costs for a spill instruction */
+ 5, /* costs for a reload instruction */
+ true, /* custom abi handling */
+ },
+ NULL, /* constants */
};
/**
- * Initializes the code generator.
+ * rewrite unsigned->float conversion.
+ * Sparc has no instruction for this so instead we do the following:
+ *
+ * int signed_x = unsigned_value_x;
+ * double res = signed_x;
+ * if (signed_x < 0)
+ * res += 4294967296. ;
+ * return (float) res;
*/
-static void *sparc_cg_init(ir_graph *irg)
+static void rewrite_unsigned_float_Conv(ir_node *node)
{
- static ir_type *int_tp = NULL;
- sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
- sparc_code_gen_t *cg;
+ ir_graph *irg = get_irn_irg(node);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *lower_block = get_nodes_block(node);
- if (! int_tp) {
- /* create an integer type with machine size */
- int_tp = new_type_primitive(mode_Is);
- }
+ part_block(node);
- cg = XMALLOC(sparc_code_gen_t);
- cg->impl = &sparc_code_gen_if;
- cg->irg = irg;
- //cg->reg_set = new_set(arm_cmp_irn_reg_assoc, 1024);
- cg->isa = isa;
- //cg->int_tp = int_tp;
- //cg->have_fp_insn = 0;
- //cg->unknown_gp = NULL;
- //cg->unknown_fpa = NULL;
- cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) ? 1 : 0;
-
- /* enter the current code generator */
- isa->cg = cg;
-
- return (arch_code_generator_t *)cg;
+ {
+ ir_node *block = get_nodes_block(node);
+ ir_node *unsigned_x = get_Conv_op(node);
+ ir_mode *mode_u = get_irn_mode(unsigned_x);
+ ir_mode *mode_s = find_signed_mode(mode_u);
+ ir_mode *mode_d = mode_D;
+ ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
+ ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
+ ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
+ ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero);
+ ir_node *proj_lt = new_r_Proj(cmp, mode_b, pn_Cmp_Lt);
+ ir_node *cond = new_rd_Cond(dbgi, block, proj_lt);
+ ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
+ ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
+ ir_node *in_true[1] = { proj_true };
+ ir_node *in_false[1] = { proj_false };
+ ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
+ ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
+ ir_node *true_jmp = new_r_Jmp(true_block);
+ ir_node *false_jmp = new_r_Jmp(false_block);
+ tarval *correction = new_tarval_from_double(4294967296., mode_d);
+ ir_node *c_const = new_r_Const(irg, correction);
+ ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
+ mode_d);
+
+ ir_node *lower_in[2] = { true_jmp, false_jmp };
+ ir_node *phi_in[2] = { fadd, res };
+ ir_mode *dest_mode = get_irn_mode(node);
+ ir_node *phi;
+ ir_node *res_conv;
+
+ set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
+ phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
+ assert(get_Block_phis(lower_block) == NULL);
+ set_Block_phis(lower_block, phi);
+ set_Phi_next(phi, NULL);
+
+ res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
+
+ exchange(node, res_conv);
+ }
}
+static int sparc_rewrite_Conv(ir_node *node, void *ctx)
+{
+ ir_mode *to_mode = get_irn_mode(node);
+ ir_node *op = get_Conv_op(node);
+ ir_mode *from_mode = get_irn_mode(op);
+ (void) ctx;
+ if (mode_is_float(to_mode) && mode_is_int(from_mode)
+ && get_mode_size_bits(from_mode) == 32
+ && !mode_is_signed(from_mode)) {
+ rewrite_unsigned_float_Conv(node);
+ return 1;
+ }
-const arch_isa_if_t sparc_isa_if;
-static sparc_isa_t sparc_isa_template = {
- {
- &sparc_isa_if, /* isa interface implementation */
- &sparc_gp_regs[REG_SP], /* stack pointer register */
- &sparc_gp_regs[REG_FP], /* base pointer register */
- &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
- -1, /* stack direction */
- 1, /* power of two stack alignment for calls, 2^2 == 4 */
- NULL, /* main environment */
- 7, /* costs for a spill instruction */
- 5, /* costs for a reload instruction */
- },
- NULL /* current code generator */
-};
-
+ return 0;
+}
static void sparc_handle_intrinsics(void)
{
ir_type *tp, *int_tp, *uint_tp;
i_record records[8];
- int n_records = 0;
+ size_t n_records = 0;
runtime_rt rt_iMod, rt_uMod;
int_tp = new_type_primitive(mode_Is);
uint_tp = new_type_primitive(mode_Iu);
+ /* we need to rewrite some forms of int->float conversions */
+ {
+ i_instr_record *map_Conv = &records[n_records++].i_instr;
+ map_Conv->kind = INTRINSIC_INSTR;
+ map_Conv->op = op_Conv;
+ map_Conv->i_mapper = sparc_rewrite_Conv;
+ }
/* SPARC has no signed mod instruction ... */
{
i_instr_record *map_Mod = &records[n_records++].i_instr;
map_Mod->ctx = &rt_uMod;
}
- if (n_records > 0)
- lower_intrinsics(records, n_records, /*part_block_used=*/0);
+ assert(n_records < ARRAY_SIZE(records));
+ lower_intrinsics(records, n_records, /*part_block_used=*/ true);
}
-
/**
* Initializes the backend ISA
*/
isa = XMALLOC(sparc_isa_t);
memcpy(isa, &sparc_isa_template, sizeof(*isa));
+ isa->constants = pmap_create();
be_emit_init(outfile);
sparc_create_opcodes(&sparc_irn_ops);
sparc_handle_intrinsics();
- return &isa->arch_env;
+ return &isa->base;
}
-
-
/**
* Closes the output file and frees the ISA structure.
*/
sparc_isa_t *isa = self;
/* emit now all global declarations */
- be_gas_emit_decls(isa->arch_env.main_env);
+ be_gas_emit_decls(isa->base.main_env);
+ pmap_destroy(isa->constants);
be_emit_exit();
- free(self);
+ free(isa);
}
-
static unsigned sparc_get_n_reg_class(void)
{
- return N_CLASSES;
+ return N_SPARC_CLASSES;
}
static const arch_register_class_t *sparc_get_reg_class(unsigned i)
{
- assert(i < N_CLASSES);
+ assert(i < N_SPARC_CLASSES);
return &sparc_reg_classes[i];
}
return &sparc_reg_classes[CLASS_sparc_gp];
}
-
-
-typedef struct {
- be_abi_call_flags_bits_t flags;
- const arch_env_t *arch_env;
- ir_graph *irg;
-} sparc_abi_env_t;
-
-static void *sparc_abi_init(const be_abi_call_t *call, const arch_env_t *arch_env, ir_graph *irg)
-{
- sparc_abi_env_t *env = XMALLOC(sparc_abi_env_t);
- be_abi_call_flags_t fl = be_abi_call_get_flags(call);
- env->flags = fl.bits;
- env->irg = irg;
- env->arch_env = arch_env;
- return env;
-}
-
-/**
- * Get the between type for that call.
- * @param self The callback object.
- * @return The between type of for that call.
- */
-static ir_type *sparc_get_between_type(void *self)
-{
- static ir_type *between_type = NULL;
- (void) self;
-
- if (between_type == NULL) {
- between_type = new_type_class(new_id_from_str("sparc_between_type"));
- set_type_size_bytes(between_type, 0);
- }
-
- return between_type;
-}
-
-
/**
- * Build the prolog, return the BASE POINTER register
+ * Returns the necessary byte alignment for storing a register of given class.
*/
-static const arch_register_t *sparc_abi_prologue(void *self, ir_node **mem,
- pmap *reg_map, int *stack_bias)
-{
- sparc_abi_env_t *env = self;
- ir_node *block = get_irg_start_block(env->irg);
- const arch_register_t *fp = &sparc_gp_regs[REG_FP];
- const arch_register_t *sp = &sparc_gp_regs[REG_SP];
-
- // sp
- ir_node *sp_proj = be_abi_reg_map_get(reg_map, sp);
-
-
- //ir_type *frame_type = get_irg_frame_type(env->irg);
- //frame_alloc_area(frame_type, reserved_stack_size, 1, 1);
-
- // alloc min required stack space
- // TODO: the min stacksize depends on wether this is a leaf procedure or not
- ir_node *save = new_bd_sparc_Save(NULL, block, sp_proj, *mem, SPARC_MIN_STACKSIZE);
-
- (void) reg_map;
- (void) mem;
- (void) stack_bias;
-
- *stack_bias -= SPARC_MIN_STACKSIZE;
- sp_proj = new_r_Proj(save, sp->reg_class->mode, pn_sparc_Save_stack);
- *mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
-
- arch_set_irn_register(sp_proj, sp);
- be_abi_reg_map_set(reg_map, sp, sp_proj);
-
- // we always have a framepointer
- return fp;
-}
-
-/* Build the epilog */
-static void sparc_abi_epilogue(void *self, ir_node *bl, ir_node **mem,
- pmap *reg_map)
+static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
{
- (void) self;
- (void) bl;
- (void) mem;
- (void) reg_map;
+ ir_mode *mode = arch_register_class_mode(cls);
+ return get_mode_size_bytes(mode);
}
-static const be_abi_callbacks_t sparc_abi_callbacks = {
- sparc_abi_init,
- free,
- sparc_get_between_type,
- sparc_abi_prologue,
- sparc_abi_epilogue,
-};
-
-/**
- * Get the ABI restrictions for procedure calls.
- * @param self The this pointer.
- * @param method_type The type of the method (procedure) in question.
- * @param abi The abi object to be modified
- */
-static void sparc_get_call_abi(const void *self, ir_type *method_type,
- be_abi_call_t *abi)
+static void sparc_lower_for_target(void)
{
- ir_type *tp;
- ir_mode *mode;
- int i, n = get_method_n_params(method_type);
- be_abi_call_flags_t call_flags;
- (void) self;
+ int i;
+ int n_irgs = get_irp_n_irgs();
- /* set abi flags for calls */
- call_flags.bits.left_to_right = 0;
- call_flags.bits.store_args_sequential = 1;
- /* */
- call_flags.bits.try_omit_fp = 0;
- call_flags.bits.fp_free = 0;
- call_flags.bits.call_has_imm = 1;
-
- /* set stack parameter passing style */
- be_abi_call_set_flags(abi, call_flags, &sparc_abi_callbacks);
-
- for (i = 0; i < n; i++) {
- /* reg = get reg for param i; */
- /* be_abi_call_param_reg(abi, i, reg); */
-
- /* pass outgoing params 0-5 via registers, remaining via stack */
- /* on sparc we need to set the ABI context since register names of parameters change to i0-i5 if we are the callee */
- if (i < 6) {
- be_abi_call_param_reg(abi, i, sparc_get_RegParamOut_reg(i), ABI_CONTEXT_CALLER);
- be_abi_call_param_reg(abi, i, sparc_get_RegParamIn_reg(i), ABI_CONTEXT_CALLEE);
- } else {
- tp = get_method_param_type(method_type, i);
- mode = get_type_mode(tp);
- be_abi_call_param_stack(abi, i, mode, 4, 0, 0, ABI_CONTEXT_BOTH); /*< stack args have no special context >*/
- }
- }
-
- /* set return value register: return value is in i0 resp. f0 */
- if (get_method_n_ress(method_type) > 0) {
- tp = get_method_res_type(method_type, 0);
- mode = get_type_mode(tp);
+ /* TODO, doubleword lowering and others */
- be_abi_call_res_reg(abi, 0,
- mode_is_float(mode) ? &sparc_fp_regs[REG_F0] : &sparc_gp_regs[REG_I0], ABI_CONTEXT_CALLEE); /*< return has no special context >*/
-
- be_abi_call_res_reg(abi, 0,
- mode_is_float(mode) ? &sparc_fp_regs[REG_F0] : &sparc_gp_regs[REG_O0], ABI_CONTEXT_CALLER); /*< return has no special context >*/
+ for (i = 0; i < n_irgs; ++i) {
+ ir_graph *irg = get_irp_irg(i);
+ lower_switch(irg, 256, false);
}
}
-static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
+static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
+ ir_node *mux_true)
{
- (void) block_env;
-
- if (!is_sparc_irn(irn))
- return -1;
-
- return 1;
-}
-
-/**
- * Initializes the code generator interface.
- */
-static const arch_code_generator_if_t *sparc_get_code_generator_if(
- void *self)
-{
- (void) self;
- return &sparc_code_gen_if;
-}
-
-list_sched_selector_t sparc_sched_selector;
-
-/**
- * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
- */
-static const list_sched_selector_t *sparc_get_list_sched_selector(
- const void *self, list_sched_selector_t *selector)
-{
- (void) self;
- (void) selector;
-
- sparc_sched_selector = trivial_selector;
- sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
- return &sparc_sched_selector;
-}
-
-static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
- const void *self)
-{
- (void) self;
- return NULL;
-}
-
-/**
- * Returns the necessary byte alignment for storing a register of given class.
- */
-static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
-{
- ir_mode *mode = arch_register_class_mode(cls);
- return get_mode_size_bytes(mode);
+ (void) sel;
+ (void) mux_false;
+ (void) mux_true;
+ return false;
}
/**
*/
static const backend_params *sparc_get_backend_params(void)
{
+ static const ir_settings_arch_dep_t arch_dep = {
+ 1, /* also_use_subs */
+ 1, /* maximum_shifts */
+ 31, /* highest_shift_amount */
+ NULL, /* evaluate_cost_func */
+ 1, /* allow mulhs */
+ 1, /* allow mulhu */
+ 32, /* max_bits_for_mulh */
+ };
static backend_params p = {
- 0, /* no dword lowering */
0, /* no inline assembly */
- NULL, /* will be set later */
- NULL, /* no creator function */
- NULL, /* context for create_intrinsic_fkt */
- NULL, /* parameter for if conversion */
+ 0, /* no support for RotL nodes */
+ 1, /* big endian */
+ sparc_lower_for_target, /* lowering callback */
+ &arch_dep, /* will be set later */
+ sparc_is_mux_allowed, /* parameter for if conversion */
NULL, /* float arithmetic mode */
0, /* no trampoline support: size 0 */
0, /* no trampoline support: align 0 */
return &p;
}
-static const be_execution_unit_t ***sparc_get_allowed_execution_units(
- const ir_node *irn)
-{
- (void) irn;
- /* TODO */
- panic("sparc_get_allowed_execution_units not implemented yet");
-}
-
-static const be_machine_t *sparc_get_machine(const void *self)
-{
- (void) self;
- /* TODO */
- panic("sparc_get_machine not implemented yet");
-}
-
static ir_graph **sparc_get_backend_irg_list(const void *self,
- ir_graph ***irgs)
+ ir_graph ***irgs)
{
(void) self;
(void) irgs;
sparc_get_n_reg_class,
sparc_get_reg_class,
sparc_get_reg_class_for_mode,
- sparc_get_call_abi,
- sparc_get_code_generator_if,
- sparc_get_list_sched_selector,
- sparc_get_ilp_sched_selector,
+ NULL,
sparc_get_reg_class_alignment,
- sparc_get_backend_params,
- sparc_get_allowed_execution_units,
- sparc_get_machine,
+ sparc_get_backend_params,
sparc_get_backend_irg_list,
NULL, /* mark remat */
sparc_parse_asm_constraint,
- sparc_is_valid_clobber
+ sparc_is_valid_clobber,
+
+ sparc_init_graph,
+ NULL, /* get_pic_base */
+ NULL, /* before_abi */
+ sparc_prepare_graph,
+ sparc_before_ra,
+ sparc_after_ra,
+ NULL, /* finish */
+ sparc_emit_routine,
};
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
projects / libfirm / blobdiff