#include "irdump.h"
#include "lowering.h"
#include "lower_dw.h"
+#include "lower_builtins.h"
#include "lower_calls.h"
+#include "lower_softfloat.h"
#include "bitset.h"
#include "debug.h"
#include "../begnuas.h"
#include "../belistsched.h"
#include "../beflags.h"
+#include "../beutil.h"
#include "bearch_sparc_t.h"
if (get_irn_arity(node) == 3)
panic("no support for _reg variant yet");
- /* Note we do not report the change of the SPARC_MIN_STACKSIZE
- * size, since we have additional magic in the emitter which
- * calculates that! */
- assert(attr->immediate_value <= -SPARC_MIN_STACKSIZE);
- return attr->immediate_value + SPARC_MIN_STACKSIZE;
+ return -attr->immediate_value;
} else if (is_sparc_RestoreZero(node)) {
return SP_BIAS_RESET;
}
static bool sparc_modifies_flags(const ir_node *node)
{
- return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
+ return arch_get_irn_flags(node) & sparc_arch_irn_flag_modifies_flags;
}
static bool sparc_modifies_fp_flags(const ir_node *node)
{
- return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
+ return arch_get_irn_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
}
static void sparc_before_ra(ir_graph *irg)
5, /* costs for a reload instruction */
true, /* custom abi handling */
},
- NULL, /* constants */
+ NULL, /* constants */
+ SPARC_FPU_ARCH_FPU, /* FPU architecture */
};
/**
};
lower_calls_with_compounds(LF_RETURN_HIDDEN);
+ if (sparc_isa_template.fpu_arch == SPARC_FPU_ARCH_SOFTFLOAT)
+ lower_floating_point();
+
+ lower_builtins(0, NULL);
+
sparc_lower_64bit();
for (i = 0; i < n_irgs; ++i) {
return 0;
}
+/* fpu set architectures. */
+static const lc_opt_enum_int_items_t sparc_fpu_items[] = {
+ { "fpu", SPARC_FPU_ARCH_FPU },
+ { "softfloat", SPARC_FPU_ARCH_SOFTFLOAT },
+ { NULL, 0 }
+};
+
+static lc_opt_enum_int_var_t arch_fpu_var = {
+ &sparc_isa_template.fpu_arch, sparc_fpu_items
+};
+
+static const lc_opt_table_entry_t sparc_options[] = {
+ LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit", &arch_fpu_var),
+ LC_OPT_LAST
+};
+
+static ir_node *sparc_new_spill(ir_node *value, ir_node *after)
+{
+ ir_node *block = get_block(after);
+ ir_graph *irg = get_irn_irg(value);
+ ir_node *frame = get_irg_frame(irg);
+ ir_node *mem = get_irg_no_mem(irg);
+ ir_mode *mode = get_irn_mode(value);
+ ir_node *store;
+
+ if (mode_is_float(mode)) {
+ store = create_stf(NULL, block, value, frame, mem, mode, NULL, 0, true);
+ } else {
+ store = new_bd_sparc_St_imm(NULL, block, value, frame, mem, mode, NULL,
+ 0, true);
+ }
+ sched_add_after(after, store);
+ return store;
+}
+
+static ir_node *sparc_new_reload(ir_node *value, ir_node *spill,
+ ir_node *before)
+{
+ ir_node *block = get_block(before);
+ ir_graph *irg = get_irn_irg(value);
+ ir_node *frame = get_irg_frame(irg);
+ ir_mode *mode = get_irn_mode(value);
+ ir_node *load;
+ ir_node *res;
+
+ if (mode_is_float(mode)) {
+ load = create_ldf(NULL, block, frame, spill, mode, NULL, 0, true);
+ } else {
+ load = new_bd_sparc_Ld_imm(NULL, block, frame, spill, mode, NULL, 0,
+ true);
+ }
+ sched_add_before(before, load);
+ assert((long)pn_sparc_Ld_res == (long)pn_sparc_Ldf_res);
+ res = new_r_Proj(load, mode, pn_sparc_Ld_res);
+
+ return res;
+}
+
const arch_isa_if_t sparc_isa_if = {
sparc_init,
sparc_lower_for_target,
sparc_finish,
sparc_emit_routine,
NULL, /* register_saved_by */
+ sparc_new_spill,
+ sparc_new_reload
};
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
void be_init_arch_sparc(void)
{
+ lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
+ lc_opt_entry_t *sparc_grp = lc_opt_get_grp(be_grp, "sparc");
+
+ lc_opt_add_table(sparc_grp, sparc_options);
+
be_register_isa_if("sparc", &sparc_isa_if);
FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
sparc_init_transform();