#!/usr/bin/perl -w
-# This script generates C code which emits assembler code for the
-# assembler ir nodes. It takes a "emit" key from the node specification
-# and substitutes lines starting with . with a corresponding fprintf().
+# This script generates C code which creates ands sets up functions and
+# data structures for the register allocator.
# Creation: 2005/11/14
# $Id$
our $arch;
our %reg_classes;
our %nodes;
+our %cpu;
# include spec file
push(@types, "arch_register_type_ignore");
}
+ if ($t & 8) {
+ push(@types, "arch_register_type_joker");
+ }
+
+ if ($t & 16) {
+ push(@types, "arch_register_type_virtual");
+ }
+
return join(" | ", @types);
}
}
push(@obst_req, $tmp);
push(@obst_header_all,"extern const $arch\_register_req_t $arch\_default_req_$class_name\_".$_->{"name"}.";\n");
+ # realname is name if not set by user
+ $_->{"realname"} = $_->{"name"} if (! exists($_->{"realname"}));
+
$reg2class{$_->{"name"}} = { "class" => $old_classname, "index" => $idx }; # remember reg to class for later use
push(@obst_regdef, " REG_".uc($_->{"name"})." = $idx,\n");
- push(@obst_reginit, " ".$class_name."_regs[$idx].name = \"".$_->{"name"}."\";\n");
+ push(@obst_reginit, " ".$class_name."_regs[$idx].name = \"".$_->{"realname"}."\";\n");
push(@obst_reginit, " ".$class_name."_regs[$idx].reg_class = $class_ptr;\n");
push(@obst_reginit, " ".$class_name."_regs[$idx].index = $idx;\n");
push(@obst_reginit, " ".$class_name."_regs[$idx].type = ".translate_reg_type($_->{"type"}).";\n");
+ push(@obst_reginit, " ".$class_name."_regs[$idx].data = ".get_execunit_variable_name($_->{"unit"}).";\n");
push(@obst_reginit, "\n");
$idx++;
}
-# generate c inline file
+# generate c file
open(OUT, ">$target_c") || die("Could not open $target_c, reason: $!\n");
$creation_time = localtime(time());
* date: $creation_time
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
#include "gen_$arch\_regalloc_if.h"
-#include "bearch_$arch\_t.h" /* we need this to put the caller saved registers into the isa set */
+#include "gen_$arch\_machine.h" /* we need this, as there can be units assigned to registers */
+#include "bearch_$arch\_t.h" /* we need this to put the caller saved registers into the isa set */
#include "$arch\_map_regs.h"
#include "irmode.h"
else {
my @regs = split(/ /, $reqs[$idx]);
GET_CLASS: foreach my $reg (@regs) {
- if ($reg =~ /!?(in|out)\_r\d+/) {
+ if ($reg =~ /!?(in|out)\_r\d+/ || $reg =~ /!in/) {
$class = "UNKNOWN_CLASS";
}
else {
push(@req_type_mask, "arch_register_req_type_should_be_same");
}
if (defined($different_pos)) {
- push(@req_type_mask, "arch_register_req_type_should_be_different");
+ if ($different_pos == 666) {
+ push(@req_type_mask, "arch_register_req_type_should_be_different_from_all");
+ undef $different_pos;
+ }
+ else {
+ push(@req_type_mask, "arch_register_req_type_should_be_different");
+ }
}
$tmp .= "&_".$op."_reg_req_$inout\_$idx\n";
my $same_pos = undef;
my $different_pos = undef;
my $temp;
- my @temp_obst;
+ my @obst_init;
+ my @obst_limits;
+ my @obst_ignore;
# build function header
$class = $idx_class[$2 - 1];
next CHECK_REQS;
}
+ elsif (/!in/) {
+ $class = $idx_class[0];
+ return ($class, 0, undef, 666);
+ }
# check for negate
if (substr($_, 0, 1) eq "!") {
if (!defined($neg)) {
$has_limit = 1;
- push(@temp_obst, " bs = bitset_set_all(bs); /* allow all register (negative constraints given) */\n");
+ push(@obst_init, " bs = bitset_set_all(bs); /* allow all register (negative constraints given) */\n");
}
$_ = substr($_, 1); # skip '!'
if (!defined($neg)) {
$has_limit = 1;
- push(@temp_obst, " bs = bitset_clear_all(bs); /* disallow all register (positive constraints given) */\n");
+ push(@obst_init, " bs = bitset_clear_all(bs); /* disallow all register (positive constraints given) */\n");
}
$neg = 0;
}
if ($neg == 1) {
$has_limit = 1;
- push(@temp_obst, " bitset_clear(bs, ".get_reg_index($_)."); /* disallow $_ */\n");
+ push(@obst_limits, " bitset_clear(bs, ".get_reg_index($_)."); /* disallow $_ */\n");
}
else {
$has_limit = 1;
- push(@temp_obst, " bitset_set(bs, ".get_reg_index($_)."); /* allow $_ */\n");
+ push(@obst_limits, " bitset_set(bs, ".get_reg_index($_)."); /* allow $_ */\n");
}
}
my @cur_class = @{ $reg_classes{"$class"} };
for (my $idx = 0; $idx <= $#cur_class; $idx++) {
if (defined($cur_class[$idx]{"type"}) && ($cur_class[$idx]{"type"} & 4)) {
- push(@temp_obst, " bitset_clear(bs, ".get_reg_index($cur_class[$idx]{"name"}).");");
- push(@temp_obst, " /* disallow ignore reg ".$cur_class[$idx]{"name"}." */\n");
+ push(@obst_ignore, " bitset_clear(bs, ".get_reg_index($cur_class[$idx]{"name"}).");");
+ push(@obst_ignore, " /* disallow ignore reg ".$cur_class[$idx]{"name"}." */\n");
}
}
push(@obst_limit_func, "/* limit the possible registers for ".($in ? "IN" : "OUT")." $idx at op $op */\n");
push(@obst_limit_func, "void limit_reg_".$op."_".($in ? "in" : "out")."_".$idx."(void *_unused, bitset_t *bs) {\n");
- push(@obst_limit_func, @temp_obst);
+ push(@obst_limit_func, @obst_init);
+ push(@obst_limit_func, @obst_ignore);
+ push(@obst_limit_func, @obst_limits);
push(@obst_limit_func, "}\n\n");
}
return ($class, $has_limit, $same_pos, $different_pos);
}
+
+###
+# Gets the variable name for the execution unit assigned to this register.
+###
+sub get_execunit_variable_name {
+ my $unit = shift;
+ my $name = "NULL";
+ my $uc_arch = uc($arch);
+
+ if ($unit) {
+ my $found = 0;
+SRCH: foreach my $cur_type (keys(%cpu)) {
+ foreach my $cur_unit (@{ $cpu{"$cur_type"} }) {
+ if ($unit eq $cur_unit) {
+ my $tp_name = "$arch\_execution_units_$cur_type";
+ my $unit_name = "$uc_arch\_EXECUNIT_TP_$cur_type\_$unit";
+ $name = "&".$tp_name."[".$unit_name."]";
+ $found = 1;
+ last SRCH;
+ }
+ }
+ }
+
+ if (! $found) {
+ print STDERR "Invalid execution unit $unit specified!\n";
+ }
+ }
+
+ return $name;
+}
projects / libfirm / blobdiff