start register allocator again, fix typo
[libfirm] / ir / be / scripts / generate_regalloc_if.pl
index 0f310b3..c29dc5d 100755 (executable)
@@ -1,8 +1,7 @@
 #!/usr/bin/perl -w
 
-# This script generates C code which emits assembler code for the
-# assembler ir nodes. It takes a "emit" key from the node specification
-# and substitutes lines starting with . with a corresponding fprintf().
+# This script generates C code which creates ands sets up functions and
+# data structures for the register allocator.
 # Creation: 2005/11/14
 # $Id$
 
@@ -15,6 +14,7 @@ my $target_dir = $ARGV[1];
 our $arch;
 our %reg_classes;
 our %nodes;
+our %cpu;
 
 # include spec file
 
@@ -58,6 +58,10 @@ sub translate_reg_type {
                        push(@types, "arch_register_type_joker");
                }
 
+               if ($t & 16) {
+                       push(@types, "arch_register_type_virtual");
+               }
+
                return join(" | ", @types);
        }
 }
@@ -178,12 +182,16 @@ foreach my $class_name (keys(%reg_classes)) {
                push(@obst_req, $tmp);
                push(@obst_header_all,"extern const $arch\_register_req_t $arch\_default_req_$class_name\_".$_->{"name"}.";\n");
 
+               # realname is name if not set by user
+               $_->{"realname"} = $_->{"name"} if (! exists($_->{"realname"}));
+
                $reg2class{$_->{"name"}} = { "class" => $old_classname, "index" => $idx }; # remember reg to class for later use
                push(@obst_regdef, "  REG_".uc($_->{"name"})." = $idx,\n");
-               push(@obst_reginit, "  ".$class_name."_regs[$idx].name      = \"".$_->{"name"}."\";\n");
+               push(@obst_reginit, "  ".$class_name."_regs[$idx].name      = \"".$_->{"realname"}."\";\n");
                push(@obst_reginit, "  ".$class_name."_regs[$idx].reg_class = $class_ptr;\n");
                push(@obst_reginit, "  ".$class_name."_regs[$idx].index     = $idx;\n");
                push(@obst_reginit, "  ".$class_name."_regs[$idx].type      = ".translate_reg_type($_->{"type"}).";\n");
+               push(@obst_reginit, "  ".$class_name."_regs[$idx].data      = ".get_execunit_variable_name($_->{"unit"}).";\n");
                push(@obst_reginit, "\n");
                $idx++;
        }
@@ -290,7 +298,7 @@ close(OUT);
 
 
 
-# generate c inline file
+# generate c file
 open(OUT, ">$target_c") || die("Could not open $target_c, reason: $!\n");
 
 $creation_time = localtime(time());
@@ -307,8 +315,13 @@ print OUT<<EOF;
  * date:       $creation_time
  */
 
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
 #include "gen_$arch\_regalloc_if.h"
-#include "bearch_$arch\_t.h"   /* we need this to put the caller saved registers into the isa set */
+#include "gen_$arch\_machine.h"  /* we need this, as there can be units assigned to registers */
+#include "bearch_$arch\_t.h"     /* we need this to put the caller saved registers into the isa set */
 #include "$arch\_map_regs.h"
 #include "irmode.h"
 
@@ -354,7 +367,7 @@ sub build_inout_idx_class {
                        else {
                                my @regs = split(/ /, $reqs[$idx]);
 GET_CLASS:             foreach my $reg (@regs) {
-                                       if ($reg =~ /!?(in|out)\_r\d+/) {
+                                       if ($reg =~ /!?(in|out)\_r\d+/ || $reg =~ /!in/) {
                                                $class = "UNKNOWN_CLASS";
                                        }
                                        else {
@@ -439,7 +452,13 @@ sub generate_requirements {
                                push(@req_type_mask, "arch_register_req_type_should_be_same");
                        }
                        if (defined($different_pos)) {
-                               push(@req_type_mask, "arch_register_req_type_should_be_different");
+                               if ($different_pos == 666) {
+                                       push(@req_type_mask, "arch_register_req_type_should_be_different_from_all");
+                                       undef $different_pos;
+                               }
+                               else {
+                                       push(@req_type_mask, "arch_register_req_type_should_be_different");
+                               }
                        }
 
                        $tmp  .= "&_".$op."_reg_req_$inout\_$idx\n";
@@ -543,6 +562,10 @@ CHECK_REQS: foreach (@regs) {
                        $class = $idx_class[$2 - 1];
                        next CHECK_REQS;
                }
+               elsif (/!in/) {
+                       $class = $idx_class[0];
+                       return ($class, 0, undef, 666);
+               }
 
                # check for negate
                if (substr($_, 0, 1) eq "!") {
@@ -624,3 +647,33 @@ CHECK_REQS: foreach (@regs) {
 
        return ($class, $has_limit, $same_pos, $different_pos);
 }
+
+###
+# Gets the variable name for the execution unit assigned to this register.
+###
+sub get_execunit_variable_name {
+       my $unit    = shift;
+       my $name    = "NULL";
+       my $uc_arch = uc($arch);
+
+       if ($unit) {
+               my $found = 0;
+SRCH:  foreach my $cur_type (keys(%cpu)) {
+                       foreach my $cur_unit (@{ $cpu{"$cur_type"} }) {
+                               if ($unit eq $cur_unit) {
+                                       my $tp_name   = "$arch\_execution_units_$cur_type";
+                                       my $unit_name = "$uc_arch\_EXECUNIT_TP_$cur_type\_$unit";
+                                       $name  = "&".$tp_name."[".$unit_name."]";
+                                       $found = 1;
+                                       last SRCH;
+                               }
+                       }
+               }
+
+               if (! $found) {
+                       print STDERR "Invalid execution unit $unit specified!\n";
+               }
+       }
+
+       return $name;
+}