fixed some minor bugs

[libfirm] / ir / be / scripts / generate_regalloc_if.pl

diff --git a/ir/be/scripts/generate_regalloc_if.pl b/ir/be/scripts/generate_regalloc_if.pl
index 525b695..8c94db7 100755 (executable)
--- a/ir/be/scripts/generate_regalloc_if.pl
+++ b/ir/be/scripts/generate_regalloc_if.pl
@@ -68,7 +68,6 @@ my @obst_req;          # stack for the register requirements
 my @obst_limit_func;   # stack for functions to return a subset of a register class
 my @obst_defreq_head;  # stack for prototypes of default requirement function
 my @obst_header_all;   # stack for some extern struct defs needed for bearch_$arch include
-my @obst_projnum_map;  # stack for mapping register projnums to requirements
 my @obst_requirement_def;  # stack for requirement name defines
 
 my $numregs;
@@ -98,7 +97,6 @@ push(@obst_header_all, "extern const $arch\_register_req_t $arch\_default_req_no
 
 push(@obst_classdef, "#define N_CLASSES ".scalar(keys(%reg_classes))."\n");
 
-my $global_projnum_idx = 0;
 my $class_mode;
 
 # generate register type and class variable, init function and default requirements
@@ -180,12 +178,6 @@ foreach my $class_name (keys(%reg_classes)) {
                push(@obst_reginit, "  ".$class_name."_regs[$idx].reg_class = $class_ptr;\n");
                push(@obst_reginit, "  ".$class_name."_regs[$idx].index     = $idx;\n");
                push(@obst_reginit, "  ".$class_name."_regs[$idx].type      = ".translate_reg_type($_->{"type"}).";\n");
-               if ($_->{"type"} == 2) {
-                       # this is a caller saved register
-                       push(@obst_reginit, "  ia32_set_reg_projnum(&".$class_name."_regs[$idx], $global_projnum_idx, isa->reg_projnum_map);\n");
-                       push(@obst_projnum_map, "&$arch\_default_req_$class_name\_".$_->{"name"});
-                       $global_projnum_idx++;
-               }
                push(@obst_reginit, "\n");
                $idx++;
        }
@@ -193,10 +185,6 @@ foreach my $class_name (keys(%reg_classes)) {
        $class_idx++;
 }
 
-push(@obst_regdef, "\n#define N_CALLER_SAVE_REGS ".scalar(@obst_projnum_map)."\n");
-
-push(@obst_header_all, "\nextern const $arch\_register_req_t *$arch\_projnum_reg_req_map[N_CALLER_SAVE_REGS];\n\n");
-
 # generate node-register constraints
 foreach my $op (keys(%nodes)) {
        my %n = %{ $nodes{"$op"} };
@@ -309,18 +297,15 @@ print OUT<<EOF;
  */
 
 #include "gen_$arch\_regalloc_if.h"
-#include "bearch_ia32_t.h"   /* we need this to put the caller saved registers into the isa set */
-#include "ia32_map_regs.h"
+#include "bearch_$arch\_t.h"   /* we need this to put the caller saved registers into the isa set */
+#include "$arch\_map_regs.h"
 #include "irmode.h"
 
 EOF
 
 print OUT "arch_register_class_t $arch\_reg_classes[] = {\n  ".join(",\n  ", @obst_regclasses)."\n};\n\n";
 
-print OUT "const $arch\_register_req_t *$arch\_projnum_reg_req_map[] = {\n  ".join(",\n  ", @obst_projnum_map)."\n};\n\n";
-
 print OUT "void ".$arch."_register_init(void *isa_ptr) {\n";
-print OUT "  ia32_isa_t *isa = (ia32_isa_t *)isa_ptr;\n\n";
 print OUT @obst_reginit;
 print OUT "}\n\n";
 
@@ -460,6 +445,7 @@ sub is_reg_class {
 ###
 sub get_reg_class {
        my $reg = shift;
+       $reg = substr($reg, 1) if ($reg =~ /!.*/);
        return $reg2class{"$reg"}{"class"} if (exists($reg2class{"$reg"}));
        return undef;
 }
@@ -504,7 +490,7 @@ sub build_subset_class_func {
        # set/unset registers
 CHECK_REQS: foreach (@regs) {
                if (/(!)?$outin\_r(\d+)/) {
-                       if (($1 && defined($different_pos)) || defined($same_pos)) {
+                       if (($1 && defined($different_pos)) || (!$1 && defined($same_pos))) {
                                print STDERR "Multiple in/out references of same type in one requirement not allowed.\n";
                                return (undef, undef, undef, undef);
                        }