make firm compilable with a c++ compiler

[libfirm] / ir / be / scripts / generate_new_opcodes.pl

diff --git a/ir/be/scripts/generate_new_opcodes.pl b/ir/be/scripts/generate_new_opcodes.pl
index 8a932f6..aa80228 100755 (executable)
--- a/ir/be/scripts/generate_new_opcodes.pl
+++ b/ir/be/scripts/generate_new_opcodes.pl
@@ -270,10 +270,10 @@ sub create_constructor {
 
        # emit constructor code
        $temp = <<EOF;
-       ir_node        *res;
-       ir_op          *op      = op_${arch}_${op};
-       int             flags   = 0;
-       backend_info_t *info;
+       ir_node          *res;
+       ir_op            *op      = op_${arch}_${op};
+       arch_irn_flags_t  flags   = arch_irn_flags_none;
+       backend_info_t   *info;
 EOF
 
        if($arity == $ARITY_DYNAMIC) {
@@ -416,6 +416,7 @@ EOF
                        "rematerializable" => "arch_irn_flags_rematerializable",
                        "modify_flags"     => "arch_irn_flags_modify_flags",
                        "simple_jump"      => "arch_irn_flags_simple_jump",
+                       "not_scheduled"    => "arch_irn_flags_not_scheduled",
                );
                if (defined(%custom_irn_flags)) {
                        %known_irn_flags = (%known_irn_flags, %custom_irn_flags);
@@ -458,14 +459,14 @@ EOF
 EOF
 
        if (exists($n->{"init_attr"})) {
-               $temp .= "\tattr = get_irn_generic_attr(res);\n";
+               $temp .= "\tattr = (${attr_type}*)get_irn_generic_attr(res);\n";
                $temp .= "\t".$n->{"init_attr"}."\n";
        }
 
        $temp .= <<EOF;
        /* optimize node */
        res = optimize_node(res);
-       irn_vrfy_irg(res, current_ir_graph);
+       irn_verify_irg(res, current_ir_graph);
 
        return res;
 EOF
@@ -476,7 +477,7 @@ EOF
        $obst_constructor .= "}\n\n";
 }
 
-push(@obst_enum_op, "typedef enum _${arch}_opcodes {\n");
+push(@obst_enum_op, "typedef enum ${arch}_opcodes {\n");
 foreach my $op (keys(%nodes)) {
        my %n        = %{ $nodes{"$op"} };
        my $known_mode;
@@ -529,18 +530,20 @@ foreach my $op (keys(%nodes)) {
 
                $num_outs = $#outs + 1;
 
-               $obst_proj .= "\nenum pn_${op} {\n";
+               if ($num_outs > 0) {
+                       $obst_proj .= "\nenum pn_${op} {\n";
 
-               for (my $idx = 0; $idx <= $#outs; $idx++) {
-                       # check, if we have additional flags annotated to out
-                       if ($outs[$idx] =~ /:((S|I)(\|(S|I))*)/) {
-                               push(@out_flags, $1);
-                               $outs[$idx] =~ s/:((S|I)(\|(S|I))*)//;
+                       for (my $idx = 0; $idx <= $#outs; $idx++) {
+                               # check, if we have additional flags annotated to out
+                               if ($outs[$idx] =~ /:((S|I)(\|(S|I))*)/) {
+                                       push(@out_flags, $1);
+                                       $outs[$idx] =~ s/:((S|I)(\|(S|I))*)//;
+                               }
+                               $obst_proj .= "\tpn_${op}_".$outs[$idx]." = ${idx},\n";
                        }
-                       $obst_proj .= "\tpn_${op}_".$outs[$idx]." = ${idx},\n";
-               }
 
-               $obst_proj .= "};\n";
+                       $obst_proj .= "};\n";
+               }
                # outs have names, it must be a mode_T node
                if (!defined($n{mode})) {
                        $n{mode} = "mode_T";
@@ -554,11 +557,13 @@ foreach my $op (keys(%nodes)) {
                        die "Fatal error: Op ${op} has different number of ins and arity\n";
                }
 
-               $obst_proj .= "\nenum n_$op {\n";
-               for (my $idx = 0; $idx <= $#ins; $idx++) {
-                       $obst_proj .= "\tn_${op}_".$ins[$idx]." = ${idx},\n";
+               if ($#ins >= 0) {
+                       $obst_proj .= "\nenum n_$op {\n";
+                       for (my $idx = 0; $idx <= $#ins; $idx++) {
+                               $obst_proj .= "\tn_${op}_".$ins[$idx]." = ${idx},\n";
+                       }
+                       $obst_proj .= "};\n";
                }
-               $obst_proj .= "};\n";
        }
 
        # Create opcode
@@ -704,7 +709,9 @@ push(@obst_enum_op, "\n} $arch\_opcodes;\n\n");
 
 open(OUT, ">$target_c") || die("Fatal error: Could not open $target_c, reason: $!\n");
 
-print OUT "#include \"gen_$arch\_regalloc_if.h\"\n\n";
+print OUT "#include \"gen_$arch\_regalloc_if.h\"\n";
+print OUT "#include \"irverify_t.h\"\n";
+print OUT "\n";
 print OUT @obst_cmp_attr;
 print OUT "\n";
 print OUT @obst_opvar;
@@ -776,7 +783,7 @@ print OUT <<END;
 #ifdef BIT
 #undef BIT
 #endif
-#define BIT(x)  (1 << (x % 32))
+#define BIT(x)  (1 << (x))
 
 END
 
@@ -831,8 +838,7 @@ print OUT<<ENDOFMAIN;
 ENDOFMAIN
 
        if (defined($default_op_attr_type)) {
-               print OUT "\tattrs = xmalloc(sizeof(attr[0]) * iro_$arch\_last);\n";
-               print OUT "\tmemset(attrs, 0, sizeof(attr[0]) * iro_$arch\_last);\n";
+               print OUT "\tattrs = XMALLOCNZ(${default_op_attr_type}, iro_${arch}_last);\n";
        }
 
 print OUT @obst_new_irop;
@@ -1237,7 +1243,10 @@ CHECK_REQS: foreach (@regs) {
                                } elsif(defined($temp)) {
                                        $temp .= " | ";
                                }
-                               $temp .= "BIT(REG_".uc(${reg}).")";
+                               my $firstreg = uc($reg_classes{$class}[0]->{"name"});
+                               my $classuc = uc($class);
+                               my $reguc = uc($reg);
+                               $temp .= "BIT(REG_${classuc}_${reguc})";
                        }
                        if(defined($temp)) {
                                push(@obst_limit_func, "${temp}");
@@ -1261,6 +1270,7 @@ sub generate_requirements {
        my $idx   = shift;
        my $is_in = shift;
        my $class = "";
+       my $width = 1;
        my $result;
 
        my @req_type_mask;
@@ -1270,6 +1280,10 @@ sub generate_requirements {
                                push(@req_type_mask, "arch_register_req_type_ignore");
                        } elsif ($f eq "S") {
                                push(@req_type_mask, "arch_register_req_type_produces_sp");
+                       } elsif ($f eq "a") {
+                               push(@req_type_mask, "arch_register_req_type_aligned");
+                       } elsif ($f eq "2" or $f eq "4" or $f eq "8") {
+                               $width = int($f);
                        }
                }
        }
@@ -1282,7 +1296,8 @@ sub generate_requirements {
        NULL,                         /* regclass */
        NULL,                         /* limit bitset */
        0,                            /* same pos */
-       0                             /* different pos */
+       0,                            /* different pos */
+       0                             /* width */
 };
 
 EOF
@@ -1296,7 +1311,8 @@ EOF
        & ${arch}_reg_classes[CLASS_${arch}_${class}],
        NULL,        /* limit bitset */
        0,           /* same pos */
-       0            /* different pos */
+       0,           /* different pos */
+       $width            /* width */
 };
 
 EOF
@@ -1331,7 +1347,8 @@ EOF
        & ${arch}_reg_classes[CLASS_${arch}_${class}],
        ${limit_bitset},
        ${same_pos},        /* same pos */
-       ${different_pos}        /* different pos */
+       ${different_pos},       /* different pos */
+       $width             /* width */
 };
 
 EOF