my $line_nr = 0;
our $arch;
+our $additional_opcodes;
our %nodes;
+our %cpu;
+our $default_cmp_attr;
# include spec file
no strict "subs";
unless ($return = do $specfile) {
- warn "couldn't parse $specfile: $@" if $@;
- warn "couldn't do $specfile: $!" unless defined $return;
- warn "couldn't run $specfile" unless $return;
+ die "couldn't parse $specfile: $@" if $@;
+ die "couldn't do $specfile: $!" unless defined $return;
+ die "couldn't run $specfile" unless $return;
}
use strict "subs";
my $target_h = $target_dir."/gen_".$arch."_new_nodes.h";
#print Dumper(%nodes);
+#print Dumper(%operands);
# create c code file from specs
my @obst_get_opvar; # stack for the get_op_<arch>_<op-name>() functions
my @obst_constructor; # stack for node constructor functions
my @obst_new_irop; # stack for the new_ir_op calls
+my @obst_enum_op; # stack for creating the <arch>_opcode enum
my @obst_header; # stack for function prototypes
my @obst_is_archirn; # stack for the is_$arch_irn() function
my @obst_cmp_attr; # stack for the compare attribute functions
+my @obst_proj; # stack for the pn_ numbers
my $orig_op;
my $arity;
my $cmp_attr_func;
my $temp;
+my $n_opcodes = 0; # number of opcodes
+
+# for registering additional opcodes
+$n_opcodes += $additional_opcodes if (defined($additional_opcodes));
push(@obst_header, "void ".$arch."_create_opcodes(void);\n");
+# create default compare function
+if(defined($default_cmp_attr)) {
+ my $cmpcode = $default_cmp_attr;
+ push(@obst_cmp_attr, "static int default_cmp_attr(ir_node *a, ir_node *b) {\n");
+ if($cmpcode =~ m/attr_a/) {
+ push(@obst_cmp_attr, "\t$arch\_attr_t *attr_a = get_$arch\_attr(a);\n");
+ }
+ if($cmpcode =~ m/attr_b/) {
+ push(@obst_cmp_attr, "\t$arch\_attr_t *attr_b = get_$arch\_attr(b);\n");
+ }
+ push(@obst_cmp_attr, "\t${cmpcode}\n");
+ push(@obst_cmp_attr, "}\n\n");
+}
+
+push(@obst_enum_op, "typedef enum _$arch\_opcodes {\n");
foreach my $op (keys(%nodes)) {
- my %n = %{ $nodes{"$op"} };
+ my %n = %{ $nodes{"$op"} };
+ my $known_mode;
+ my $n_res = 0;
+ my $num_outs = 0;
+ my @out_flags;
+
+ # determine arity from in requirements
+ $arity = exists($n{"arity"}) ? $n{"arity"} : 0;
+ if (exists($n{"reg_req"}) && exists($n{"reg_req"}{"in"})) {
+ $arity = scalar(@{ $n{"reg_req"}{"in"} });
+ }
$orig_op = $op;
$op = $arch."_".$op;
- $arity = $n{"arity"};
$temp = "";
+ # define some proj numbers
+ if (exists($n{"outs"})) {
+ undef my @outs;
+
+ @outs = @{ $n{"outs"} };
+ $num_outs = $#outs + 1;
+
+ push(@obst_proj, "\nenum pn_$op {\n");
+
+ for (my $idx = 0; $idx <= $#outs; $idx++) {
+ # check, if we have additional flags annotated to out
+ if ($outs[$idx] =~ /:((S|I)(\|(S|I))*)/) {
+ push(@out_flags, $1);
+ $outs[$idx] =~ s/:((S|I)(\|(S|I))*)//;
+ }
+ push(@obst_proj, " pn_$op\_".$outs[$idx]." = $idx,\n");
+ }
+
+ push(@obst_proj, "};\n");
+ $known_mode = "mode_T";
+ }
+ if (exists($n{"mode"})) {
+ $known_mode = $n{"mode"};
+ }
+
push(@obst_opvar, "ir_op *op_$op = NULL;\n");
- push(@obst_get_opvar, "ir_op *get_op_$op(void) { return op_$op; }\n");
- push(@obst_get_opvar, "int is_$op(const ir_node *n) { return get_irn_op(n) == op_$op; }\n\n");
+ push(@obst_get_opvar, "ir_op *get_op_$op(void) { return op_$op; }\n");
+ push(@obst_get_opvar, "int is_$op(const ir_node *n) { return get_$arch\_irn_opcode(n) == iro_$op; }\n\n");
push(@obst_is_archirn, "is_$op(node)");
+ push(@obst_header, "extern ir_op *op_$op;\n");
+ push(@obst_header, "ir_op *get_op_$op(void);\n");
push(@obst_header, "int is_$op(const ir_node *n);\n");
- $cmp_attr_func = 0;
+ my $cmp_attr_func;
+ if(defined($default_cmp_attr)) {
+ $cmp_attr_func = "default_cmp_attr";
+ }
# create compare attribute function if needed
if (exists($n{"cmp_attr"})) {
+ my $cmpcode = $n{"cmp_attr"};
+
push(@obst_cmp_attr, "static int cmp_attr_$op(ir_node *a, ir_node *b) {\n");
- push(@obst_cmp_attr, " asmop_attr *attr_a = get_ia32_attr(a);\n");
- push(@obst_cmp_attr, " asmop_attr *attr_b = get_ia32_attr(b);\n");
- push(@obst_cmp_attr, $n{"cmp_attr"});
+ if($cmpcode =~ m/attr_a/) {
+ push(@obst_cmp_attr, "\t$arch\_attr_t *attr_a = get_$arch\_attr(a);\n");
+ }
+ if($cmpcode =~ m/attr_b/) {
+ push(@obst_cmp_attr, "\t$arch\_attr_t *attr_b = get_$arch\_attr(b);\n");
+ }
+ push(@obst_cmp_attr, "\t${cmpcode}\n");
push(@obst_cmp_attr, "}\n\n");
- $cmp_attr_func = 1;
+ $cmp_attr_func = "cmp_attr_${op}";
}
if (exists($n{"rd_constructor"}) && $n{"rd_constructor"} =~ /^NONE$/i) {
$temp = "ir_node *new_rd_$op(dbg_info *db, ir_graph *irg, ir_node *block";
if (!exists($n{"args"}) || $n{"args"} =~ /^DEFAULT$/i) { # default args
- if ($n{"arity"} !~ /^\d+$/) {
+ if ($arity !~ /^\d+$/) {
print "DEFAULT args require numeric arity (0, 1, 2, ...)! Ignoring op $orig_op!\n";
next;
}
- for (my $i = 1; $i <= $n{"arity"}; $i++) {
+ for (my $i = 1; $i <= $arity; $i++) {
$complete_args .= ", ir_node *op".$i;
$arg_names .= ", op".$i;
}
- $complete_args .= ", ir_mode *mode";
- $arg_names .= ", mode";
+ if (!defined($known_mode)) {
+ $complete_args .= ", ir_mode *mode";
+ $arg_names .= ", mode";
+ }
}
else { # user defined args
for my $href (@{ $n{"args"} }) {
$arg_names .= ", ".$href->{"name"};
}
}
- $complete_args = substr($complete_args, 2);
- $temp .= ", $complete_args)";
+
+ # we have additional attribute arguements
+ if (exists($n{"attr"})) {
+ $complete_args .= ", ".$n{"attr"};
+ }
+
+ # $complete_args = substr($complete_args, 2);
+ $temp .= "$complete_args)";
push(@obst_constructor, $temp." {\n");
+ push(@obst_header, $n{"comment"});
push(@obst_header, $temp.";\n");
# emit constructor code
if (!exists($n{"rd_constructor"}) || $n{"rd_constructor"} =~ /^DEFAULT$/i) { # default constructor
- if ($n{"arity"} !~ /^\d+$/) {
- print "DEFAULT rd_constructor requires arity 0,1,2 or 3! Ignoring op $orig_op!\n";
+ if ($arity !~ /^\d+$/) {
+ print "DEFAULT rd_constructor requires numeric arity! Ignoring op $orig_op!\n";
next;
}
- $temp = " asmop_attr *attr;\n";
- $temp .= " ir_node *res;\n";
- $temp .= " ir_node *in[$arity];\n" if ($arity > 0);
+
+ $temp = "\tir_node *res;\n";
+ $temp .= "\tir_node *in[$arity];\n" if ($arity > 0);
+ $temp .= "\tint flags = 0;\n";
+ $temp .= "\t$arch\_attr_t *attr;\n" if (exists($n{"init_attr"}));
+
+ my $exec_units = "NULL";
+ # set up static variables for cpu execution unit assigments
+ if (exists($n{"units"})) {
+ $temp .= gen_execunit_list_initializer($n{"units"});
+ $exec_units = "_exec_units";
+ }
undef my $in_req_var;
undef my $out_req_var;
- undef my $slots_var;
# set up static variables for requirements and registers
if (exists($n{"reg_req"})) {
if (@in) {
$in_req_var = "_in_req_$op";
- $temp .= " static const $arch\_register_req_t *".$in_req_var."[] =\n {\n";
+ $temp .= "\tstatic const arch_register_req_t *".$in_req_var."[] =\n";
+ $temp .= "\t{\n";
for ($idx = 0; $idx <= $#in; $idx++) {
- $temp .= " ".$op."_reg_req_in_".$idx.",\n";
+ $temp .= "\t\t&".$op."_reg_req_in_".$idx.",\n";
}
- $temp .= " };\n";
+ $temp .= "\t};\n";
}
if (@out) {
$out_req_var = "_out_req_$op";
- $slots_var = "_slots_$op";
- $temp .= " static const $arch\_register_req_t *".$out_req_var."[] =\n {\n";
+ $temp .= "\tstatic const arch_register_req_t *".$out_req_var."[] =\n";
+ $temp .= "\t{\n";
for ($idx = 0; $idx <= $#out; $idx++) {
- $temp .= " ".$op."_reg_req_out_".$idx.",\n";
+ $temp .= "\t\t&".$op."_reg_req_out_".$idx.",\n";
}
- $temp .= " };\n";
- $temp .= " static arch_register_t *".$slots_var."[".($#out + 1)."];\n";
+ $temp .= "\t};\n";
}
}
$temp .= "\n";
- $temp .= " if (!op_$op) {\n";
- $temp .= " assert(0);\n";
- $temp .= " return NULL;\n";
- $temp .= " }\n\n";
+ $temp .= "\tassert(op_$op != NULL);\n\n";
+
for (my $i = 1; $i <= $arity; $i++) {
- $temp .= " in[".($i - 1)."] = op".$i.";\n";
- }
- $temp .= " res = new_ir_node(db, irg, block, op_$op, mode, $arity, ".($arity > 0 ? "in" : "NULL").");\n";
- $temp .= " set_ia32_pncode(res, -1);\n";
- $temp .= " res = optimize_node(res);\n";
- $temp .= " irn_vrfy_irg(res, irg);\n\n";
-
- # set register flags
- $temp .= " attr = get_ia32_attr(res);\n\n";
- $temp .= " attr->flags = 0; /* clear flags */\n";
- if (exists($n{"spill"}) && $n{"spill"} == 0) {
- $temp .= " attr->flags |= arch_irn_flags_dont_spill; /* op is NOT spillable */\n";
+ $temp .= "\tin[".($i - 1)."] = op".$i.";\n";
}
- if (exists($n{"remat"}) && $n{"remat"} == 1) {
- $temp .= " attr->flags |= arch_irn_flags_rematerializable; /* op can be easily recalulated */\n";
+
+ # set flags
+ if (exists($n{"irn_flags"})) {
+ foreach my $flag (split(/\|/, $n{"irn_flags"})) {
+ if ($flag eq "R") {
+ $temp .= "\tflags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */\n";
+ }
+ elsif ($flag eq "N") {
+ $temp .= "\tflags |= arch_irn_flags_dont_spill; /* op is NOT spillable */\n";
+ }
+ elsif ($flag eq "I") {
+ $temp .= "\tflags |= arch_irn_flags_ignore; /* ignore op for register allocation */\n";
+ }
+ elsif ($flag eq "S") {
+ $temp .= "\tflags |= arch_irn_flags_modify_sp; /* op modifies stack pointer */\n";
+ }
+ }
}
+ my $in_param;
+ my $out_param;
# allocate memory and set pointer to register requirements
if (exists($n{"reg_req"})) {
my %req = %{ $n{"reg_req"} };
undef my @out;
@out = @{ $req{"out"} } if exists(($req{"out"}));
- $temp .= "\n /* set IN register requirements */\n";
if (@in) {
- $temp .= " attr->in_req = ".$in_req_var.";\n";
+ $in_param = $in_req_var;
}
else {
- $temp .= " attr->in_req = NULL;\n";
+ $in_param = "NULL";
}
- $temp .= "\n /* set OUT register requirements and get space for registers */\n";
if (@out) {
- $temp .= " attr->out_req = ".$out_req_var.";\n";
- $temp .= " attr->slots = ".$slots_var.";\n";
- $temp .= " attr->n_res = ".($#out + 1).";\n";
+ $n_res = $#out + 1;
+ $out_param = "$out_req_var, $exec_units, $n_res";
}
else {
- $temp .= " attr->out_req = NULL;\n";
- $temp .= " attr->slots = NULL;\n";
- $temp .= " attr->n_res = 0;\n";
+ $out_param = "NULL, $exec_units, 0";
}
}
+ else {
+ $in_param = "NULL";
+ $out_param = "NULL, $exec_units, 0";
+ }
+ $temp .= "\n\t/* create node */\n";
+
+ my $latency = 1;
+ if (exists($n{"latency"})) {
+ $latency = $n{"latency"};
+ }
+
+ my $mode = "mode";
+ if (defined($known_mode)) {
+ $mode = $known_mode;
+ }
+ $temp .= "\tres = new_ir_node(db, irg, block, op_$op, $mode, $arity, ".($arity > 0 ? "in" : "NULL").");\n";
+
+ $temp .= "\n\t/* init node attributes */\n";
+ $temp .= "\tinit_$arch\_attributes(res, flags, $in_param, $out_param, $latency);\n";
+
+ # set flags for outs
+ if ($#out_flags >= 0) {
+ $temp .= "\n\t/* set flags for outs */\n";
+ for (my $idx = 0; $idx <= $#out_flags; $idx++) {
+ my $flags = "";
+ my $prefix = "";
+
+ foreach my $flag (split(/\|/, $out_flags[$idx])) {
+ if ($flag eq "I") {
+ $flags .= $prefix."arch_irn_flags_ignore";
+ $prefix = " | ";
+ }
+ elsif ($flag eq "S") {
+ $flags .= $prefix."arch_irn_flags_modify_sp";
+ $prefix = " | ";
+ }
+ }
+
+ $temp .= "\tset_$arch\_out_flags(res, $flags, $idx);\n";
+ }
+ }
+
+
+ if (exists($n{"init_attr"})) {
+ $temp .= "\tattr = get_$arch\_attr(res);\n";
+ $temp .= $n{"init_attr"}."\n";
+ }
- $temp .= "\n return res;\n";
+ $temp .= "\n\t/* optimize node */\n";
+ $temp .= "\tres = optimize_node(res);\n";
+ $temp .= "\tirn_vrfy_irg(res, irg);\n\n";
+
+ $temp .= "\n\treturn res;\n";
push(@obst_constructor, $temp);
}
# close constructor function
push(@obst_constructor, "}\n\n");
-
} # constructor creation
# set default values for state and flags if not given
- $n{"state"} = "pinned" if (! exists($n{"state"}));
+ $n{"state"} = "floats" if (! exists($n{"state"}));
$n{"op_flags"} = "N" if (! exists($n{"op_flags"}));
- push(@obst_new_irop, "\n memset(&ops, 0, sizeof(ops));\n");
- push(@obst_new_irop, " ops.dump_node = dump_node_$arch;\n");
- if ($cmp_attr_func) {
- push(@obst_new_irop, " ops.node_cmp_attr = cmp_attr_$op;\n");
+ push(@obst_new_irop, "\n\tmemset(&ops, 0, sizeof(ops));\n");
+ push(@obst_new_irop, "\tops.dump_node = $arch\_dump_node;\n");
+
+ if (defined($cmp_attr_func)) {
+ push(@obst_new_irop, "\tops.node_cmp_attr = ${cmp_attr_func};\n");
}
- $temp = " op_$op = new_ir_op(get_next_ir_opcode(), \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"};
- $temp .= ", ".translate_arity($arity).", 0, sizeof(asmop_attr), &ops);\n";
+ $n_opcodes++;
+ $temp = "\top_$op = new_ir_op(cur_opcode + iro_$op, \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"};
+ $temp .= "|M, ".translate_arity($arity).", 0, sizeof($arch\_attr_t) + $n_res * sizeof(arch_register_t *), &ops);\n";
push(@obst_new_irop, $temp);
+ push(@obst_new_irop, "\tset_op_tag(op_$op, &$arch\_op_tag);\n");
+ push(@obst_enum_op, "\tiro_$op,\n");
+
+ push(@obst_header, "\n");
}
+push(@obst_enum_op, "\tiro_$arch\_last_generated,\n");
+push(@obst_enum_op, "\tiro_$arch\_last = iro_$arch\_last_generated");
+push(@obst_enum_op, " + $additional_opcodes") if (defined($additional_opcodes));
+push(@obst_enum_op, "\n} $arch\_opcodes;\n\n");
# emit the code
print OUT @obst_get_opvar;
print OUT "\n";
-print OUT<<ENDOFISIRN;
+print OUT<<EOF;
-static opcode ia32_opcode_start = -1;
-static opcode ia32_opcode_end = -1;
+static int $arch\_opcode_start = -1;
+static int $arch\_opcode_end = -1;
-int is_$arch\_irn(const ir_node *node) {
- opcode opc = get_irn_opcode(node);
+EOF
- assert(ia32_opcode_start > 0 && "missing opcode init");
- assert(ia32_opcode_end > 0 && "missing opcode init");
+# build the FOURCC arguments from $arch
- if (opc > ia32_opcode_start && opc < ia32_opcode_end)
- return 1;
+my ($a, $b, $c, $d) = ('\0', '\0', '\0', '\0');
+
+if (length($arch) >= 1) {
+ $a = uc(substr($arch, 0, 1));
+}
+
+if (length($arch) >= 2) {
+ $b = uc(substr($arch, 1, 1));
+}
+
+if (length($arch) >= 3) {
+ $c = uc(substr($arch, 2, 1));
+}
+
+if (length($arch) >= 4) {
+ $d = uc(substr($arch, 3, 1));
+}
+
+print OUT "static unsigned $arch\_op_tag = FOURCC('$a', '$b', '$c', '$d');\n";
+
+print OUT<<ENDOFISIRN;
+
+/** Return the opcode number of the first $arch opcode. */
+int get_$arch\_opcode_first(void) {
+ return $arch\_opcode_start;
+}
+
+/** Return the opcode number of the last $arch opcode + 1. */
+int get_$arch\_opcode_last(void) {
+ return $arch\_opcode_end;
+}
+
+/** Return 1 if the given node is a $arch machine node, 0 otherwise */
+int is_$arch\_irn(const ir_node *node) {
+ return get_op_tag(get_irn_op(node)) == &$arch\_op_tag;
+}
- return 0;
+int get_$arch\_irn_opcode(const ir_node *node) {
+ if (is_$arch\_irn(node))
+ return get_irn_opcode(node) - $arch\_opcode_start;
+ return -1;
}
ENDOFISIRN
print OUT<<ENDOFMAIN;
/**
- * Creates the $arch specific firm operations
+ * Creates the $arch specific Firm machine operations
* needed for the assembler irgs.
*/
void $arch\_create_opcodes(void) {
#define Y irop_flag_forking
#define H irop_flag_highlevel
#define c irop_flag_constlike
+#define K irop_flag_keep
+#define M irop_flag_machine
+#define O irop_flag_machine_op
+#define R (irop_flag_user << 0)
+
+ ir_op_ops ops;
+ int cur_opcode;
+ static int run_once = 0;
- ir_op_ops ops;
+ if (run_once)
+ return;
+ run_once = 1;
- ia32_opcode_start = get_next_ir_opcode();
+ cur_opcode = get_next_ir_opcodes(iro_$arch\_last);
+ $arch\_opcode_start = cur_opcode;
ENDOFMAIN
print OUT @obst_new_irop;
-print OUT "\n ia32_opcode_end = get_next_ir_opcode();\n";
+print OUT "\n";
+print OUT "\t$arch\_register_additional_opcodes(cur_opcode);\n" if (defined($additional_opcodes));
+print OUT "\t$arch\_opcode_end = cur_opcode + iro_$arch\_last";
+print OUT " + $additional_opcodes" if (defined($additional_opcodes));
+print OUT ";\n";
print OUT "}\n";
close(OUT);
open(OUT, ">$target_h") || die("Could not open $target_h, reason: $!\n");
+print OUT "#ifndef __GEN_$arch\_NEW_NODES_H__\n";
+print OUT "#define __GEN_$arch\_NEW_NODES_H__\n\n";
+print OUT @obst_enum_op;
+print OUT "int is_$arch\_irn(const ir_node *node);\n\n";
+print OUT "int get_$arch\_opcode_first(void);\n";
+print OUT "int get_$arch\_opcode_last(void);\n";
+print OUT "int get_$arch\_irn_opcode(const ir_node *node);\n";
print OUT @obst_header;
+print OUT @obst_proj;
+print OUT "\n#endif /* __GEN_$arch\_NEW_NODES_H__ */\n";
close(OUT);
return "oparity_trinary";
}
else {
- return "$arity";
+ return "oparity_any";
}
}
else {
return "oparity_".$arity;
}
}
+
+###
+# Return the list of pointers for the given execution units.
+###
+sub gen_execunit_list_initializer {
+ my $units = shift;
+ my $uc_arch = uc($arch);
+ my $ret = "";
+ my $ret2 = "";
+ my %init;
+
+ foreach my $unit (@{ $units }) {
+ if ($unit eq "DUMMY") {
+ push(@{ $init{"DUMMY"} }, "\t\t&be_machine_execution_units_DUMMY[0]");
+ }
+ elsif (exists($cpu{"$unit"})) {
+ # operation can be executed on all units of this type
+ # -> add them all
+ my $tp_name = "$arch\_execution_units_$unit";
+ my $idx = 0;
+ foreach (@{ $cpu{"$unit"} }) {
+ next if ($idx++ == 0); # skip first element (it's not a unit)
+ my $unit_name = "$uc_arch\_EXECUNIT_TP_$unit\_$_";
+ push(@{ $init{"$unit"} }, "\t\t&".$tp_name."[".$unit_name."]");
+ }
+ }
+ else {
+ # operation can be executed only a certain unit
+ # -> find corresponding unit type
+ my $found = 0;
+TP_SEARCH: foreach my $cur_type (keys(%cpu)) {
+ foreach my $cur_unit (@{ $cpu{"$cur_type"} }) {
+ if ($unit eq $cur_unit) {
+ my $tp_name = "$arch\_execution_units_$cur_type";
+ my $unit_name = "$uc_arch\_EXECUNIT_TP_$cur_type\_$unit";
+ push(@{ $init{"$unit"} }, "\t\t&".$tp_name."[".$unit_name."]");
+ $found = 1;
+ last TP_SEARCH;
+ }
+ }
+ }
+
+ if (! $found) {
+ print STDERR "Invalid execution unit $unit specified!\n";
+ }
+ }
+ }
+
+ # prepare the 2-dim array init
+ foreach my $key (keys(%init)) {
+ $ret .= "\tstatic const be_execution_unit_t *_allowed_units_".$key."[] =\n";
+ $ret .= "\t{\n";
+ foreach (@{ $init{"$key"} }) {
+ $ret .= "$_,\n";
+ }
+ $ret .= "\t\tNULL\n";
+ $ret .= "\t};\n";
+ $ret2 .= "\t\t_allowed_units_$key,\n";
+ }
+ $ret2 .= "\t\tNULL\n";
+
+ $ret .= "\tstatic const be_execution_unit_t **_exec_units[] =\n";
+ $ret .= "\t{\n";
+ $ret .= $ret2;
+ $ret .= "\t};\n";
+
+ return $ret;
+}