my $line_nr = 0;
our $arch;
+our $additional_opcodes;
our %nodes;
# include spec file
my $temp;
my $n_opcodes = 2; # we have two additional border opcodes (lowest/highest)
+# for registering additional opcodes
+$n_opcodes += $additional_opcodes if (defined($additional_opcodes));
+
push(@obst_header, "void ".$arch."_create_opcodes(void);\n");
foreach my $op (keys(%nodes)) {
push(@obst_is_archirn, "is_$op(node)");
+ push(@obst_header, "extern ir_op *op_$op;\n");
push(@obst_header, "ir_op *get_op_$op(void);\n");
push(@obst_header, "int is_$op(const ir_node *n);\n");
$arg_names .= ", ".$href->{"name"};
}
}
+
+ # we have additional attribute arguements
+ if (exists($n{"attr"})) {
+ $complete_args .= ", ".$n{"attr"};
+ }
+
$complete_args = substr($complete_args, 2);
$temp .= ", $complete_args)";
push(@obst_constructor, $temp." {\n");
print "DEFAULT rd_constructor requires numeric arity! Ignoring op $orig_op!\n";
next;
}
- $temp = " $arch\_attr_t *attr;\n";
- $temp .= " ir_node *res;\n";
+
+ $temp = " ir_node *res;\n";
$temp .= " ir_node *in[$arity];\n" if ($arity > 0);
+ $temp .= " int flags = 0;\n";
+ $temp .= " $arch\_attr_t *attr;\n" if (exists($n{"init_attr"}));
undef my $in_req_var;
undef my $out_req_var;
for (my $i = 1; $i <= $arity; $i++) {
$temp .= " in[".($i - 1)."] = op".$i.";\n";
}
- $temp .= " res = new_ir_node(db, irg, block, op_$op, mode, $arity, ".($arity > 0 ? "in" : "NULL").");\n";
- $temp .= " res = optimize_node(res);\n";
- $temp .= " irn_vrfy_irg(res, irg);\n\n";
# set flags
- $temp .= " attr = get_$arch\_attr(res);\n\n";
- $temp .= " attr->flags = 0; /* clear flags */\n";
-
if (exists($n{"irn_flags"})) {
foreach my $flag (split(/\|/, $n{"irn_flags"})) {
if ($flag eq "R") {
- $temp .= " attr->flags |= arch_irn_flags_rematerializable; /* op can be easily recalulated */\n";
+ $temp .= " flags |= arch_irn_flags_rematerializable; /* op can be easily recalulated */\n";
}
elsif ($flag eq "N") {
- $temp .= " attr->flags |= arch_irn_flags_dont_spill; /* op is NOT spillable */\n";
+ $temp .= " flags |= arch_irn_flags_dont_spill; /* op is NOT spillable */\n";
}
elsif ($flag eq "I") {
- $temp .= " attr->flags |= arch_irn_flags_ignore; /* ignore op for register allocation */\n";
+ $temp .= " flags |= arch_irn_flags_ignore; /* ignore op for register allocation */\n";
}
}
}
+ my $in_param;
+ my $out_param;
# allocate memory and set pointer to register requirements
if (exists($n{"reg_req"})) {
my %req = %{ $n{"reg_req"} };
undef my @out;
@out = @{ $req{"out"} } if exists(($req{"out"}));
- $temp .= "\n /* set IN register requirements */\n";
if (@in) {
- $temp .= " attr->in_req = ".$in_req_var.";\n";
+ $in_param = $in_req_var;
}
else {
- $temp .= " attr->in_req = NULL;\n";
+ $in_param = "NULL";
}
- $temp .= "\n /* set OUT register requirements and get space for registers */\n";
if (@out) {
- $temp .= " attr->out_req = ".$out_req_var.";\n";
- $temp .= " attr->slots = xcalloc(".($#out + 1).", sizeof(attr->slots[0]));\n";
- $temp .= " attr->n_res = ".($#out + 1).";\n";
+ $out_param = $out_req_var.", ".($#out + 1);
}
else {
- $temp .= " attr->out_req = NULL;\n";
- $temp .= " attr->slots = NULL;\n";
- $temp .= " attr->n_res = 0;\n";
+ $out_param = "NULL, 0";
}
}
+ $temp .= "\n /* create node */\n";
+ $temp .= " res = new_ir_node(db, irg, block, op_$op, mode, $arity, ".($arity > 0 ? "in" : "NULL").");\n";
+
+ $temp .= "\n /* init node attributes */\n";
+ $temp .= " init_$arch\_attributes(res, flags, $in_param, $out_param);\n";
+
+ if (exists($n{"init_attr"})) {
+ $temp .= " attr = get_$arch\_attr(res);\n";
+ $temp .= $n{"init_attr"}."\n";
+ }
+
+ $temp .= "\n /* optimize node */\n";
+ $temp .= " res = optimize_node(res);\n";
+ $temp .= " irn_vrfy_irg(res, irg);\n\n";
$temp .= "\n return res;\n";
$n_opcodes++;
$temp = " op_$op = new_ir_op(cur_opcode++, \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"};
- $temp .= ", ".translate_arity($arity).", 0, sizeof($arch\_attr_t), &ops);\n";
+ $temp .= "|M, ".translate_arity($arity).", 0, sizeof($arch\_attr_t), &ops);\n";
push(@obst_new_irop, $temp);
}
static opcode $arch\_opcode_start = -1;
static opcode $arch\_opcode_end = -1;
+opcode get_$arch\_opcode_first(void) {
+ return $arch\_opcode_start + 1;
+}
+
+opcode get_$arch\_opcode_last(void) {
+ return $arch\_opcode_end - 1;
+}
+
int is_$arch\_irn(const ir_node *node) {
opcode opc = get_irn_opcode(node);
#define H irop_flag_highlevel
#define c irop_flag_constlike
#define K irop_flag_keep
+#define M irop_flag_machine
+#define R (irop_flag_machine<<1)
ir_op_ops ops;
int cur_opcode = get_next_ir_opcodes($n_opcodes);
ENDOFMAIN
print OUT @obst_new_irop;
-print OUT "\n $arch\_opcode_end = cur_opcode;\n";
+print OUT "\n $arch\_register_additional_opcodes(cur_opcode);\n";
+print OUT " $arch\_opcode_end = cur_opcode";
+print OUT " + $additional_opcodes" if (defined($additional_opcodes));
+print OUT ";\n";
print OUT "}\n";
close(OUT);
open(OUT, ">$target_h") || die("Could not open $target_h, reason: $!\n");
-print OUT "int is_$arch\_irn(const ir_node *node);\n";
+print OUT "int is_$arch\_irn(const ir_node *node);\n\n";
+print OUT "opcode get_$arch\_opcode_first(void);\n";
+print OUT "opcode get_$arch\_opcode_last(void);\n\n";
print OUT @obst_header;
close(OUT);
projects / libfirm / blobdiff