#!/usr/bin/perl -w
#
-# Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+# Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
#
# This file is part of libFirm.
#
our %nodes;
our %operands;
our %cpu;
+our $default_op_attr_type;
our $default_attr_type;
our $default_cmp_attr;
our $default_copy_attr;
}
if(!defined(%init_attr)) {
%init_attr = (
- "$default_attr_type" => "\tinit_${arch}_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
+ "$default_attr_type" => "\tinit_${arch}_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
);
}
if(!defined($default_cmp_attr)) {
# for registering additional opcodes
$n_opcodes += $additional_opcodes if (defined($additional_opcodes));
-push(@obst_header, "void ".$arch."_create_opcodes(void);\n");
+push(@obst_header, "void ".$arch."_create_opcodes(const arch_irn_ops_t *be_ops);\n");
push(@obst_enum_op, "typedef enum _$arch\_opcodes {\n");
foreach my $op (keys(%nodes)) {
$attr_type = $default_attr_type;
}
+ # determine hash function
+ my $hash_func;
+ if (exists($n{"hash_func"})) {
+ $hash_func = $n{"hash_func"};
+ }
+
# determine compare function
my $cmp_attr_func;
if (exists($n{"cmp_attr"})) {
$temp .= "\tint n_res = ${out_arity};\n";
}
- my $latency = $n{"latency"};
- if (!defined($latency)) {
- $latency = 1;
- }
- $temp .= "\tunsigned latency = ${latency};\n";
-
if (defined($known_mode)) {
$temp .= "\tir_mode *mode = ${known_mode};\n";
}
$temp .= "\n";
# set flags for outs
- if ($#out_flags >= 0) {
- $temp .= "\t/* set flags for outs */\n";
- for (my $idx = 0; $idx <= $#out_flags; $idx++) {
- my $flags = "";
- my $prefix = "";
-
- foreach my $flag (split(/\|/, $out_flags[$idx])) {
- if ($flag eq "I") {
- $flags .= $prefix."arch_irn_flags_ignore";
- $prefix = " | ";
- }
- elsif ($flag eq "S") {
- $flags .= $prefix."arch_irn_flags_modify_sp";
- $prefix = " | ";
+ if (exists($n{"outs"})) {
+ undef my @outs;
+ @outs = @{ $n{"outs"} };
+
+ for (my $idx = 0; $idx <= $#outs; $idx++) {
+ # check, if we have additional flags annotated to out
+ if ($outs[$idx] =~ /:((S|I)(\|(S|I))*)/) {
+ my $flag_string = $1;
+ my $prefix = "";
+ my $flags = "";
+
+ foreach my $flag (split(/\|/, $flag_string)) {
+ if ($flag eq "I") {
+ $flags .= $prefix."arch_irn_flags_ignore";
+ $prefix = " | ";
+ } elsif ($flag eq "S") {
+ $flags .= $prefix."arch_irn_flags_modify_sp";
+ $prefix = " | ";
+ }
}
- }
- $temp .= "\tset_$arch\_out_flags(res, $flags, $idx);\n";
+ $temp .= "\tset_$arch\_out_flags(res, $flags, $idx);\n";
+ }
}
- $temp .= "\n";
}
-
if (exists($n{"init_attr"})) {
$temp .= "\tattr = get_irn_generic_attr(res);\n";
$temp .= "\t".$n{"init_attr"}."\n";
push(@obst_new_irop, "\n\tmemset(&ops, 0, sizeof(ops));\n");
+ push(@obst_new_irop, "\tops.be_ops = be_ops;\n");
push(@obst_new_irop, "\tops.dump_node = $arch\_dump_node;\n");
if (defined($cmp_attr_func)) {
if (defined($copy_attr_func)) {
push(@obst_new_irop, "\tops.copy_attr = ${copy_attr_func};\n");
}
+ if (defined($hash_func)) {
+ push(@obst_new_irop, "\tops.hash = ${hash_func};\n");
+ }
$n_opcodes++;
my $n_res = $out_arity;
$temp = "\top_$op = new_ir_op(cur_opcode + iro_$op, \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"};
$temp .= "|M, ".translate_arity($arity).", 0, sizeof(${attr_type}), &ops);\n";
push(@obst_new_irop, $temp);
- push(@obst_new_irop, "\tset_op_tag(op_$op, &$arch\_op_tag);\n");
+ push(@obst_new_irop, "\tset_op_tag(op_$op, $arch\_op_tag);\n");
+ if(defined($default_op_attr_type)) {
+ push(@obst_new_irop, "\tattr = &attrs[iro_$op];\n");
+ if(defined($n{op_attr_init})) {
+ push(@obst_new_irop, "\t".$n{op_attr_init}."\n");
+ }
+ push(@obst_new_irop, "\tset_op_attr(op_$op, attr);\n");
+ }
+
push(@obst_enum_op, "\tiro_$op,\n");
push(@obst_header, "\n");
print OUT<<ENDOFISIRN;
/** A tag for the $arch opcodes. Note that the address is used as a tag value, NOT the FOURCC code. */
-static unsigned $arch\_op_tag = FOURCC('$a', '$b', '$c', '$d');
+#define $arch\_op_tag FOURCC('$a', '$b', '$c', '$d')
/** Return the opcode number of the first $arch opcode. */
int get_$arch\_opcode_first(void) {
/** Return 1 if the given opcode is a $arch machine op, 0 otherwise */
int is_$arch\_op(const ir_op *op) {
- return get_op_tag(op) == &$arch\_op_tag;
+ return get_op_tag(op) == $arch\_op_tag;
}
/** Return 1 if the given node is a $arch machine node, 0 otherwise */
* Creates the $arch specific Firm machine operations
* needed for the assembler irgs.
*/
-void $arch\_create_opcodes(void) {
+void $arch\_create_opcodes(const arch_irn_ops_t *be_ops) {
#define N irop_flag_none
#define L irop_flag_labeled
#define C irop_flag_commutative
#define K irop_flag_keep
#define M irop_flag_machine
#define O irop_flag_machine_op
+#define NB irop_flag_dump_noblock
+#define NI irop_flag_dump_noinput
#define R (irop_flag_user << 0)
ir_op_ops ops;
int cur_opcode;
static int run_once = 0;
+ int i;
+ENDOFMAIN
+
+ if (defined($default_op_attr_type)) {
+ print OUT "\t$default_op_attr_type *attr, *attrs;\n";
+ }
+
+print OUT<<ENDOFMAIN;
if (run_once)
return;
run_once = 1;
+ /* we handle all middleend nodes as well that have no other handler */
+ for (i = 0; i <= iro_Last; ++i) {
+ ir_op *op = get_irp_opcode(i);
+ if (op->ops.be_ops == NULL)
+ op->ops.be_ops = be_ops;
+ }
+
cur_opcode = get_next_ir_opcodes(iro_$arch\_last);
$arch\_opcode_start = cur_opcode;
ENDOFMAIN
+ if (defined($default_op_attr_type)) {
+ print OUT "\tattrs = xmalloc(sizeof(attr[0]) * iro_$arch\_last);\n";
+ print OUT "\tmemset(attrs, 0, sizeof(attr[0]) * iro_$arch\_last);\n";
+ }
+
print OUT @obst_new_irop;
print OUT "\n";
print OUT "\t$arch\_register_additional_opcodes(cur_opcode);\n" if (defined($additional_opcodes));
my $class = undef;
my $has_limit = 0;
my $limit_name;
- my $same_pos = undef;
- my $different_pos = undef;
+ my $same_pos = 0;
+ my $different_pos = 0;
my $temp;
my @obst_init;
my @obst_limits;
my $is_in = shift;
my @regs = split(/ /, shift);
- my $outin = $is_in ? "out" : "in";
-
my @idx_class = build_inout_idx_class($node, $op, !$is_in);
# set/unset registers
CHECK_REQS: foreach (@regs) {
- if (/(!)?$outin\_r(\d+)/) {
- if (($1 && defined($different_pos)) || (!$1 && defined($same_pos))) {
- print STDERR "Multiple in/out references of same type in one requirement not allowed.\n";
+ if (!$is_in && /(!)?in_r(\d+)/) {
+ my $bit_pos = 1 << ($2 - 1);
+ if ($different_pos & $bit_pos) {
+ if ($1) {
+ print STDERR "duplicate !in constraint\n";
+ } else {
+ print STDERR "conflicting !in and in constraints\n";
+ }
+ return (undef, undef, undef, undef);
+ }
+
+ if ($same_pos & $bit_pos) {
+ if ($1) {
+ print STDERR "conflicting !in and in constraints\n";
+ } else {
+ print STDERR "duplicate in constraint\n";
+ }
return (undef, undef, undef, undef);
}
if ($1) {
- $different_pos = $is_in ? -$2 : $2 - 1;
+ $different_pos |= $bit_pos;
} else {
- $same_pos = $is_in ? -$2 : $2 - 1;
+ $same_pos |= $bit_pos;
}
$class = $idx_class[$2 - 1];
next CHECK_REQS;
- } elsif (/!in/) {
- $class = $idx_class[0];
- return ($class, "NULL", undef, 666);
}
# check for negate
arch_register_req_type_none,
NULL, /* regclass */
NULL, /* limit bitset */
- -1, /* same pos */
- -1 /* different pos */
-};
-
-EOF
- } elsif ($reqs =~ /^new_reg_(.*)$/) {
- if(!is_reg_class($1)) {
- die "$1 is not a register class in requirements for $op\n";
- }
- $class = $1;
- $result = <<EOF;
-{
- arch_register_req_type_should_be_different_from_all,
- & ${arch}_reg_classes[CLASS_${arch}_${class}],
- NULL, /* limit bitset */
- -1, /* same pos */
- -1 /* different pos */
+ 0, /* same pos */
+ 0 /* different pos */
};
EOF
arch_register_req_type_normal,
& ${arch}_reg_classes[CLASS_${arch}_${class}],
NULL, /* limit bitset */
- -1, /* same pos */
- -1 /* different pos */
+ 0, /* same pos */
+ 0 /* different pos */
};
EOF
if (defined($limit_bitset) && $limit_bitset ne "NULL") {
push(@req_type_mask, "arch_register_req_type_limited");
}
- if (defined($same_pos)) {
+ if ($same_pos != 0) {
push(@req_type_mask, "arch_register_req_type_should_be_same");
}
- if (defined($different_pos)) {
- if ($different_pos == 666) {
- push(@req_type_mask, "arch_register_req_type_should_be_different_from_all");
- undef $different_pos;
- } else {
- push(@req_type_mask, "arch_register_req_type_should_be_different");
- }
+ if ($different_pos != 0) {
+ push(@req_type_mask, "arch_register_req_type_must_be_different");
}
my $reqtype = join(" | ", @req_type_mask);
if(!defined($limit_bitset)) {
$limit_bitset = "NULL";
}
- my $same_pos_str = (defined($same_pos) ? $same_pos : "-1");
- my $different_pos_str = (defined($different_pos) ? $different_pos : "-1");
$class = $regclass;
$result = <<EOF;
${reqtype},
& ${arch}_reg_classes[CLASS_${arch}_${class}],
${limit_bitset},
- ${same_pos_str}, /* same pos */
- ${different_pos_str} /* different pos */
+ ${same_pos}, /* same pos */
+ ${different_pos} /* different pos */
};
EOF