{
ir_node *fctiw = new_rd_ppc32_fCtiw(env->dbg, env->irg, env->block, op, from_mode);
ir_node *stfd = new_rd_ppc32_Stfd(env->dbg, env->irg, env->block, get_irg_frame(env->irg),
- fctiw, memory, mode_T);
+ fctiw, memory);
ir_node *storememproj = new_rd_Proj(env->dbg, env->irg, env->block, stfd, mode_M, pn_Store_M);
ir_node *lwz = new_rd_ppc32_Lwz(env->dbg, env->irg, env->block, get_irg_frame(env->irg),
- storememproj, mode_T);
+ storememproj);
set_ppc32_frame_entity(stfd, memslot);
set_ppc32_offset_mode(stfd, ppc32_ao_Lo16); // TODO: only allows a 16-bit offset on stack
set_ppc32_frame_entity(lwz, memslot);
tenv.block = current_block;
tenv.irg = current_ir_graph;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
memory = get_irg_no_mem(current_ir_graph);
for(i = 0; i < attr->conv_count; i++)
}
tenv.irg = current_ir_graph;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
if (code == iro_Conv)
{
}
tenv.irg = current_ir_graph;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
if(code == iro_Const || code == iro_SymConst)
{