add index to register classes, change some fields to unsigned

[libfirm] / ir / be / ppc32 / ppc32_transform_conv.c

diff --git a/ir/be/ppc32/ppc32_transform_conv.c b/ir/be/ppc32/ppc32_transform_conv.c
index b500292..205732b 100644 (file)
--- a/ir/be/ppc32/ppc32_transform_conv.c
+++ b/ir/be/ppc32/ppc32_transform_conv.c
@@ -1,6 +1,28 @@
-/* The codegenerator (transform FIRM Conv nodes into ppc FIRM) */
-/* $Id$ */
+/*
+ * Copyright (C) 1995-2007 University of Karlsruhe.  All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
 
+/**
+ * @file
+ * @brief   The codegenerator (transform FIRM Conv nodes into ppc FIRM)
+ * @author  Moritz Kroll, Jens Mueller
+ * @version $Id$
+ */
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
@@ -13,7 +35,6 @@
 #include "iredges_t.h"
 #include "irvrfy.h"
 #include "ircons.h"
-#include "dbginfo.h"
 #include "iropt_t.h"
 #include "debug.h"
 
@@ -38,7 +59,7 @@ typedef struct
 
 ir_node *current_block;
 int conv_nodes_found;
-entity *memslot;
+ir_entity *memslot;
 ir_node *memory;
 
 /**
@@ -55,7 +76,7 @@ static ir_node *own_gen_convert_call(ppc32_transform_env_t *env, ir_node *op, co
                                                                         ir_mode *from_mode, ir_mode *to_mode)
 {
        ir_type *method_type;
-       entity  *method_ent;
+       ir_entity *method_ent;
        ir_node *in[1];
        ir_node *call, *callee, *call_results;
 
@@ -101,10 +122,10 @@ static ir_node *gen_Conv(ppc32_transform_env_t *env, ir_node *op) {
                        {
                                ir_node *fctiw = new_rd_ppc32_fCtiw(env->dbg, env->irg, env->block, op, from_mode);
                                ir_node *stfd = new_rd_ppc32_Stfd(env->dbg, env->irg, env->block, get_irg_frame(env->irg),
-                                       fctiw, memory, mode_T);
+                                       fctiw, memory);
                                ir_node *storememproj = new_rd_Proj(env->dbg, env->irg, env->block, stfd, mode_M, pn_Store_M);
                                ir_node *lwz = new_rd_ppc32_Lwz(env->dbg, env->irg, env->block, get_irg_frame(env->irg),
-                                       storememproj, mode_T);
+                                       storememproj);
                                set_ppc32_frame_entity(stfd, memslot);
                                set_ppc32_offset_mode(stfd, ppc32_ao_Lo16);     // TODO: only allows a 16-bit offset on stack
                                set_ppc32_frame_entity(lwz, memslot);
@@ -234,8 +255,9 @@ void init_block(void)
  * Constant generating code
  */
 
+#if 0
 struct tv_ent {
-       entity *ent;
+       ir_entity *ent;
        tarval *tv;
 };
 
@@ -255,7 +277,7 @@ static ir_node *gen_fp_known_symconst(ppc32_transform_env_t *env, tarval *known_
        struct tv_ent *entry;
        ir_node       *cnst;
        ir_graph      *rem;
-       entity        *ent;
+       ir_entity     *ent;
 
        if(!const_set)
                const_set = new_set(cmp_tv_ent, 10);
@@ -293,6 +315,7 @@ static ir_node *gen_fp_known_symconst(ppc32_transform_env_t *env, tarval *known_
 
        return new_rd_SymConst_addr_ent(env->dbg, env->irg, ent, tp);
 }
+#endif
 
 /**
  * Transforms a Const
@@ -345,7 +368,7 @@ static ir_node *gen_SymConst(ppc32_transform_env_t *env) {
  */
 void ppc32_conv_walk(ir_node *node, void *env) {
        ppc32_code_gen_t *cgenv = (ppc32_code_gen_t *)env;
-       opcode  code          = get_irn_opcode(node);
+       ir_opcode  code         = get_irn_opcode(node);
        ppc32_transform_env_t tenv;
 
        if (is_Block(node))
@@ -446,7 +469,7 @@ void ppc32_conv_walk(ir_node *node, void *env) {
  */
 void ppc32_pretransform_walk(ir_node *node, void *env) {
        ppc32_code_gen_t *cgenv = (ppc32_code_gen_t *)env;
-       opcode  code          = get_irn_opcode(node);
+       ir_opcode  code         = get_irn_opcode(node);
        ppc32_transform_env_t tenv;
 
        if (is_Block(node))