warning fixes

[libfirm] / ir / be / ppc32 / ppc32_new_nodes.c

diff --git a/ir/be/ppc32/ppc32_new_nodes.c b/ir/be/ppc32/ppc32_new_nodes.c
index af0734c..07a8b33 100644 (file)
--- a/ir/be/ppc32/ppc32_new_nodes.c
+++ b/ir/be/ppc32/ppc32_new_nodes.c
@@ -157,15 +157,15 @@ static int ppc32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
                        }
 
                        /* dump OUT requirements */
-                       if (attr->n_res > 0) {
+                       if (ARR_LEN(attr->slots) > 0) {
                                reqs = get_ppc32_out_req_all(n);
                                dump_reg_req(F, n, reqs, 1);
                        }
 
                        /* dump assigned registers */
                        slots = get_ppc32_slots(n);
-                       if (slots && attr->n_res > 0) {
-                               for (i = 0; i < attr->n_res; i++) {
+                       if (slots && ARR_LEN(attr->slots) > 0) {
+                               for (i = 0; i < ARR_LEN(attr->slots); i++) {
                                        if (slots[i]) {
                                                fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
                                        }
@@ -309,7 +309,7 @@ const char *get_ppc32_out_reg_name(const ir_node *node, int pos) {
        ppc32_attr_t *attr = get_ppc32_attr(node);
 
        assert(is_ppc32_irn(node) && "Not an ppc node.");
-       assert(pos < attr->n_res && "Invalid OUT position.");
+       assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
        assert(attr->slots[pos]  && "No register assigned");
 
        return arch_register_get_name(attr->slots[pos]);
@@ -322,7 +322,7 @@ int get_ppc32_out_regnr(const ir_node *node, int pos) {
        ppc32_attr_t *attr = get_ppc32_attr(node);
 
        assert(is_ppc32_irn(node) && "Not an ppc node.");
-       assert(pos < attr->n_res && "Invalid OUT position.");
+       assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
        assert(attr->slots[pos]  && "No register assigned");
 
        return arch_register_get_index(attr->slots[pos]);
@@ -335,26 +335,18 @@ const arch_register_t *get_ppc32_out_reg(const ir_node *node, int pos) {
        ppc32_attr_t *attr = get_ppc32_attr(node);
 
        assert(is_ppc32_irn(node) && "Not an ppc node.");
-       assert(pos < attr->n_res && "Invalid OUT position.");
+       assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
        assert(attr->slots[pos]  && "No register assigned");
 
        return attr->slots[pos];
 }
 
-/**
- * Sets the number of results.
- */
-void set_ppc32_n_res(ir_node *node, int n_res) {
-       ppc32_attr_t *attr = get_ppc32_attr(node);
-       attr->n_res      = n_res;
-}
-
 /**
  * Returns the number of results.
  */
 int get_ppc32_n_res(const ir_node *node) {
        ppc32_attr_t *attr = get_ppc32_attr(node);
-       return attr->n_res;
+       return ARR_LEN(attr->slots);
 }
 
 /**
@@ -503,18 +495,22 @@ void init_ppc32_attributes(ir_node *node, int flags,
                                                 const arch_register_req_t **in_reqs, const arch_register_req_t **out_reqs,
                                                 const be_execution_unit_t ***execution_units,
                                                 int n_res, unsigned latency) {
-       ppc32_attr_t *attr = get_ppc32_attr(node);
+       ir_graph       *irg  = get_irn_irg(node);
+       struct obstack *obst = get_irg_obstack(irg);
+       ppc32_attr_t   *attr = get_ppc32_attr(node);
+       (void) execution_units;
+       (void) latency;
 
        attr->flags   = flags;
        attr->in_req  = in_reqs;
        attr->out_req = out_reqs;
-       attr->n_res   = n_res;
 
        attr->content_type = ppc32_ac_None;
        attr->offset_mode  = ppc32_ao_Illegal;
        attr->data.empty   = NULL;
 
-       memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
+       attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
+       memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
 }