/* The main ppc backend driver file. */
/* $Id$ */
-
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "../be.h"
#include "../beabi.h"
#include "../bemachine.h"
+#include "../bemodule.h"
+#include "../beblocksched.h"
#include "pset.h"
* |___/
**************************************************/
-static ir_node *my_skip_proj(const ir_node *n) {
- while (is_Proj(n))
- n = get_Proj_pred(n);
- return (ir_node *)n;
-}
-
/**
* Return register requirements for a ppc node.
* If the node returns a tuple (mode_T) then the proj's
* will be asked for this information.
*/
-static const arch_register_req_t *ppc32_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos) {
- const ppc32_register_req_t *irn_req;
+static const
+arch_register_req_t *ppc32_get_irn_reg_req(const void *self,
+ const ir_node *irn, int pos) {
long node_pos = pos == -1 ? 0 : pos;
ir_mode *mode = get_irn_mode(irn);
FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE);
if (is_Block(irn) || mode == mode_X || mode == mode_M) {
DBG((mod, LEVEL_1, "ignoring block, mode_X or mode_M node %+F\n", irn));
- return NULL;
+ return arch_no_register_req;
}
if (mode == mode_T && pos < 0) {
DBG((mod, LEVEL_1, "ignoring request for OUT requirements at %+F", irn));
- return NULL;
+ return arch_no_register_req;
}
DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
/* of the node corresponding to the proj number */
if (pos == -1) {
node_pos = ppc32_translate_proj_pos(irn);
- }
- else {
+ } else {
node_pos = pos;
}
- irn = my_skip_proj(irn);
+ irn = skip_Proj_const(irn);
DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
}
/* get requirements for our own nodes */
if (is_ppc32_irn(irn)) {
+ const arch_register_req_t *req;
if (pos >= 0) {
- irn_req = get_ppc32_in_req(irn, pos);
- }
- else {
- irn_req = get_ppc32_out_req(irn, node_pos);
+ req = get_ppc32_in_req(irn, pos);
+ } else {
+ req = get_ppc32_out_req(irn, node_pos);
}
DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
-
- memcpy(req, &(irn_req->req), sizeof(*req));
-
- if (arch_register_req_is(&(irn_req->req), should_be_same)) {
- assert(irn_req->same_pos >= 0 && "should be same constraint for in -> out NYI");
- req->other_same = get_irn_n(irn, irn_req->same_pos);
- }
-
- if (arch_register_req_is(&(irn_req->req), should_be_different)) {
- assert(irn_req->different_pos >= 0 && "should be different constraint for in -> out NYI");
- req->other_different = get_irn_n(irn, irn_req->different_pos);
- }
+ return req;
}
- /* get requirements for FIRM nodes */
- else {
- /* treat Phi like Const with default requirements */
- if (is_Phi(irn)) {
- DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
- if (mode_is_float(mode)) {
- memcpy(req, &(ppc32_default_req_ppc32_fp.req), sizeof(*req));
- }
- else if (mode_is_int(mode) || mode_is_reference(mode)) {
- memcpy(req, &(ppc32_default_req_ppc32_gp.req), sizeof(*req));
- }
- else if (mode == mode_T || mode == mode_M) {
- DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
- return NULL;
- }
- else {
- assert(0 && "unsupported Phi-Mode");
- }
- }
- else {
- DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
- req = NULL;
- }
- }
+ /* unknowns should be transformed by now */
+ assert(!is_Unknown(irn));
- return req;
+ DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
+ return arch_no_register_req;
}
static void ppc32_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) {
}
pos = ppc32_translate_proj_pos(irn);
- irn = my_skip_proj(irn);
+ irn = skip_Proj(irn);
}
if (is_ppc32_irn(irn)) {
}
pos = ppc32_translate_proj_pos(irn);
- irn = my_skip_proj(irn);
+ irn = skip_Proj_const(irn);
}
if (is_ppc32_irn(irn)) {
}
static arch_irn_class_t ppc32_classify(const void *self, const ir_node *irn) {
- irn = my_skip_proj(irn);
+ irn = skip_Proj_const(irn);
if (is_cfop(irn)) {
return arch_irn_class_branch;
}
static arch_irn_flags_t ppc32_get_flags(const void *self, const ir_node *irn) {
- irn = my_skip_proj(irn);
+ irn = skip_Proj_const(irn);
if (is_ppc32_irn(irn)) {
return get_ppc32_flags(irn);
return 0;
}
-static entity *ppc32_get_frame_entity(const void *self, const ir_node *irn) {
+static ir_entity *ppc32_get_frame_entity(const void *self, const ir_node *irn) {
if(!is_ppc32_irn(irn)) return NULL;
if(get_ppc32_type(irn)!=ppc32_ac_FrameEntity) return NULL;
return get_ppc32_frame_entity(irn);
}
-static void ppc32_set_frame_entity(const void *self, const ir_node *irn, entity *ent) {
+static void ppc32_set_frame_entity(const void *self, ir_node *irn, ir_entity *ent) {
if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity)
return;
set_ppc32_frame_entity(irn, ent);
static ir_type *ppc32_abi_get_between_type(void *self)
{
static ir_type *between_type = NULL;
- static entity *old_bp_ent = NULL;
+ static ir_entity *old_bp_ent = NULL;
if(!between_type) {
- entity *ret_addr_ent;
+ ir_entity *ret_addr_ent;
ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
- set_entity_offset_bytes(old_bp_ent, 0);
- set_entity_offset_bytes(ret_addr_ent, get_type_size_bytes(old_bp_type));
+ set_entity_offset(old_bp_ent, 0);
+ set_entity_offset(ret_addr_ent, get_type_size_bytes(old_bp_type));
set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
}
*/
static void ppc32_before_ra(void *self) {
ppc32_code_gen_t *cg = self;
- cg->blk_sched = sched_create_block_schedule(cg->irg, cg->birg->execfreqs);
+ cg->blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
}
static void ppc32_transform_spill(ir_node *node, void *env)
}
}
-int is_direct_entity(entity *ent);
+int is_direct_entity(ir_entity *ent);
/**
* Collects all SymConsts which need to be accessed "indirectly"
void ppc32_collect_symconsts_walk(ir_node *node, void *env) {
if(get_irn_op(node) == op_SymConst)
{
- entity *ent = get_SymConst_entity(node);
+ ir_entity *ent = get_SymConst_entity(node);
if(!is_direct_entity(ent))
pset_insert_ptr(symbol_pset, ent);
}
}
-static void *ppc32_cg_init(const be_irg_t *birg);
+static void *ppc32_cg_init(be_irg_t *birg);
static const arch_code_generator_if_t ppc32_code_gen_if = {
ppc32_cg_init,
ppc32_before_abi,
ppc32_prepare_graph,
+ NULL, /* spill */
ppc32_before_sched, /* before scheduling hook */
ppc32_before_ra, /* before register allocation hook */
ppc32_after_ra,
/**
* Initializes the code generator.
*/
-static void *ppc32_cg_init(const be_irg_t *birg) {
+static void *ppc32_cg_init(be_irg_t *birg) {
ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env->isa;
ppc32_code_gen_t *cg = xmalloc(sizeof(*cg));
return &ppc32_sched_selector;
}
+static const ilp_sched_selector_t *ppc32_get_ilp_sched_selector(const void *self) {
+ return NULL;
+}
+
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
return NULL;
}
+/**
+ * Return irp irgs in the desired order.
+ */
+static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) {
+ return NULL;
+}
+
/**
* Returns the libFirm configuration parameter for this backend.
*/
return &p;
}
-#ifdef WITH_LIBCORE
-static void ppc32_register_options(lc_opt_entry_t *ent)
-{
-}
-#endif /* WITH_LIBCORE */
-
const arch_isa_if_t ppc32_isa_if = {
ppc32_init,
ppc32_done,
ppc32_get_irn_handler,
ppc32_get_code_generator_if,
ppc32_get_list_sched_selector,
+ ppc32_get_ilp_sched_selector,
ppc32_get_reg_class_alignment,
ppc32_get_libfirm_params,
ppc32_get_allowed_execution_units,
ppc32_get_machine,
-#ifdef WITH_LIBCORE
- ppc32_register_options
-#endif
+ ppc32_get_irg_list,
};
+
+void be_init_arch_ppc32(void)
+{
+ be_register_isa_if("ppc32", &ppc32_isa_if);
+}
+
+BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ppc32);
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