fixed debug output of unary x87 nodes

[libfirm] / ir / be / ppc32 / bearch_ppc32.c

diff --git a/ir/be/ppc32/bearch_ppc32.c b/ir/be/ppc32/bearch_ppc32.c
index 3b01383..455f371 100644 (file)
--- a/ir/be/ppc32/bearch_ppc32.c
+++ b/ir/be/ppc32/bearch_ppc32.c
@@ -233,6 +233,12 @@ static entity *ppc32_get_frame_entity(const void *self, const ir_node *irn) {
        return get_ppc32_frame_entity(irn);
 }
 
+static void ppc32_set_frame_entity(const void *self, const ir_node *irn, entity *ent) {
+       if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity)
+               return;
+       set_ppc32_frame_entity(irn, ent);
+}
+
 /**
  * This function is called by the generic backend to correct offsets for
  * nodes accessing the stack.
@@ -359,7 +365,12 @@ static const arch_irn_ops_if_t ppc32_irn_ops_if = {
        ppc32_classify,
        ppc32_get_flags,
        ppc32_get_frame_entity,
-       ppc32_set_stack_bias
+       ppc32_set_frame_entity,
+       ppc32_set_stack_bias,
+       NULL,    /* get_inverse             */
+       NULL,    /* get_op_estimated_cost   */
+       NULL,    /* possible_memory_operand */
+       NULL,    /* perform_memory_operand  */
 };
 
 ppc32_irn_ops_t ppc32_irn_ops = {
@@ -433,7 +444,7 @@ static void ppc32_prepare_graph(void *self) {
 /**
  * Called immediatly before emit phase.
  */
-static void ppc32_finish_irg(ir_graph *irg, ppc32_code_gen_t *cg) {
+static void ppc32_finish_irg(void *self) {
        /* TODO: - fix offsets for nodes accessing stack
                         - ...
        */
@@ -556,7 +567,6 @@ static void ppc32_emit_and_done(void *self) {
                cg->emit_decls = 0;
        }
 
-       ppc32_finish_irg(irg, cg);
        dump_ir_block_graph_sched(irg, "-ppc-finished");
        ppc32_gen_routine(out, irg, cg);
 
@@ -599,6 +609,7 @@ static const arch_code_generator_if_t ppc32_code_gen_if = {
        ppc32_before_sched,   /* before scheduling hook */
        ppc32_before_ra,      /* before register allocation hook */
        ppc32_after_ra,
+       ppc32_finish_irg,
        ppc32_emit_and_done
 };
 
@@ -848,6 +859,30 @@ static int ppc32_get_reg_class_alignment(const void *self, const arch_register_c
        return get_mode_size_bytes(mode);
 }
 
+/**
+ * Returns the libFirm configuration parameter for this backend.
+ */
+static const backend_params *ppc32_get_libfirm_params(void) {
+       static arch_dep_params_t ad = {
+               1,  /* allow subs */
+               0,      /* Muls are fast enough on ARM */
+               31, /* shift would be ok */
+               0,  /* SMUL is needed, only in Arch M*/
+               0,  /* UMUL is needed, only in Arch M */
+               32, /* SMUL & UMUL available for 32 bit */
+       };
+       static backend_params p = {
+               NULL,  /* no additional opcodes */
+               NULL,  /* will be set later */
+               1,     /* need dword lowering */
+               NULL,  /* but yet no creator function */
+               NULL,  /* context for create_intrinsic_fkt */
+       };
+
+       p.dep_param = &ad;
+       return &p;
+}
+
 #ifdef WITH_LIBCORE
 static void ppc32_register_options(lc_opt_entry_t *ent)
 {
@@ -865,6 +900,7 @@ const arch_isa_if_t ppc32_isa_if = {
        ppc32_get_code_generator_if,
        ppc32_get_list_sched_selector,
        ppc32_get_reg_class_alignment,
+       ppc32_get_libfirm_params,
 #ifdef WITH_LIBCORE
        ppc32_register_options
 #endif