Fix comments.

[libfirm] / ir / be / ppc32 / bearch_ppc32.c

diff --git a/ir/be/ppc32/bearch_ppc32.c b/ir/be/ppc32/bearch_ppc32.c
index 054fba6..0bd4af4 100644 (file)
--- a/ir/be/ppc32/bearch_ppc32.c
+++ b/ir/be/ppc32/bearch_ppc32.c
@@ -399,12 +399,12 @@ static void ppc32_transform_spill(ir_node *node, void *env)
 
                if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
                {
-                       store = new_rd_ppc32_Stw(dbg, current_ir_graph, block,
+                       store = new_bd_ppc32_Stw(dbg, block,
                                get_irn_n(node, 0), get_irn_n(node, 1), new_NoMem());
                }
                else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
                {
-                       store = new_rd_ppc32_Stfd(dbg, current_ir_graph, block,
+                       store = new_bd_ppc32_Stfd(dbg, block,
                                get_irn_n(node, 0), get_irn_n(node, 1), new_NoMem());
                }
                else panic("Spill for register class not supported yet!");
@@ -435,11 +435,11 @@ static void ppc32_transform_spill(ir_node *node, void *env)
 
                if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
                {
-                       load = new_rd_ppc32_Lwz(dbg, current_ir_graph, block,   get_irn_n(node, 0), get_irn_n(node, 1));
+                       load = new_bd_ppc32_Lwz(dbg, block,     get_irn_n(node, 0), get_irn_n(node, 1));
                }
                else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
                {
-                       load = new_rd_ppc32_Lfd(dbg, current_ir_graph, block,   get_irn_n(node, 0), get_irn_n(node, 1));
+                       load = new_bd_ppc32_Lfd(dbg, block,     get_irn_n(node, 0), get_irn_n(node, 1));
                }
                else panic("Reload for register class not supported yet!");
 
@@ -820,13 +820,13 @@ static const backend_params *ppc32_get_libfirm_params(void) {
        static backend_params p = {
                1,     /* need dword lowering */
                0,     /* don't support inline assembler yet */
-               0,     /* no immediate floating point mode. */
-               NULL,  /* no additional opcodes */
                NULL,  /* will be set later */
                NULL,  /* but yet no creator function */
                NULL,  /* context for create_intrinsic_fkt */
                NULL,  /* no if conversion settings */
-               NULL   /* no immediate fp mode */
+               0,     /* no trampoline support: size 0 */
+               0,     /* no trampoline support: align 0 */
+               NULL   /* no trampoline support: no trampoline builder */
        };
 
        return &p;