adapted to some new backend structures

[libfirm] / ir / be / mips / bearch_mips.c

diff --git a/ir/be/mips/bearch_mips.c b/ir/be/mips/bearch_mips.c
index 6371ec8..b4f7214 100644 (file)
--- a/ir/be/mips/bearch_mips.c
+++ b/ir/be/mips/bearch_mips.c
@@ -237,6 +237,12 @@ static entity *mips_get_frame_entity(const void *self, const ir_node *irn) {
        return NULL;
 }
 
+static void mips_set_frame_entity(const void *self, ir_node *irn, entity *ent) {
+       mips_attr_t *attr  = get_mips_attr(irn);
+       assert(is_mips_load_r(irn) || is_mips_store_r(irn));
+       attr->stack_entity = ent;
+}
+
 /**
  * This function is called by the generic backend to correct offsets for
  * nodes accessing the stack.
@@ -257,7 +263,12 @@ static const arch_irn_ops_if_t mips_irn_ops_if = {
        mips_classify,
        mips_get_flags,
        mips_get_frame_entity,
-       mips_set_frame_offset
+       mips_set_frame_entity,
+       mips_set_frame_offset,
+       NULL,    /* get_inverse             */
+       NULL,    /* get_op_estimated_cost   */
+       NULL,    /* possible_memory_operand */
+       NULL,    /* perform_memory_operand  */
 };
 
 mips_irn_ops_t mips_irn_ops = {
@@ -447,10 +458,11 @@ static void mips_prepare_graph(void *self) {
 /**
  * Called immediately before emit phase.
  */
-static void mips_finish_irg(ir_graph *irg, mips_code_gen_t *cg) {
-       /* TODO: - fix offsets for nodes accessing stack
-                        - ...
-       */
+static void mips_finish_irg(void *self) {
+       mips_code_gen_t *cg = self;
+       ir_graph        *irg = cg->irg;
+
+       dump_ir_block_graph_sched(irg, "-mips-finished");
 }
 
 
@@ -486,8 +498,6 @@ static void mips_emit_and_done(void *self) {
                cg->emit_decls = 0;
        }
 
-       mips_finish_irg(irg, cg);
-       dump_ir_block_graph_sched(irg, "-mips-finished");
        mips_gen_routine(out, irg, cg);
 
        cur_reg_set = NULL;
@@ -510,6 +520,7 @@ static const arch_code_generator_if_t mips_code_gen_if = {
        mips_before_sched,   /* before scheduling hook */
        mips_before_ra,      /* before register allocation hook */
        mips_after_ra,
+       mips_finish_irg,
        mips_emit_and_done
 };
 
@@ -917,6 +928,30 @@ static int mips_get_reg_class_alignment(const void *self, const arch_register_cl
        return get_mode_size_bytes(mode);
 }
 
+/**
+ * Returns the libFirm configuration parameter for this backend.
+ */
+static const backend_params *mips_get_libfirm_params(void) {
+       static arch_dep_params_t ad = {
+               1,  /* allow subs */
+               0,      /* Muls are fast enough on Mips */
+               31, /* shift would be ok */
+               0,  /* no Mulhs */
+               0,  /* no Mulhu */
+               32, /* Mulhs & Mulhu available for 32 bit */
+       };
+       static backend_params p = {
+               NULL,  /* no additional opcodes */
+               NULL,  /* will be set later */
+               1,     /* need dword lowering */
+               NULL,  /* but yet no creator function */
+               NULL,  /* context for create_intrinsic_fkt */
+       };
+
+       p.dep_param = &ad;
+       return &p;
+}
+
 #ifdef WITH_LIBCORE
 static void mips_register_options(lc_opt_entry_t *ent)
 {
@@ -934,6 +969,7 @@ const arch_isa_if_t mips_isa_if = {
        mips_get_code_generator_if,
        mips_get_list_sched_selector,
        mips_get_reg_class_alignment,
+       mips_get_libfirm_params,
 #ifdef WITH_LIBCORE
        mips_register_options
 #endif