mips_load_store_attr_t *attr;
if(!is_mips_irn(node)) {
- panic("trying to set frame entity on non load/store node %+F\n", node);
+ panic("trying to set frame entity on non load/store node %+F", node);
}
if(!mips_is_Load(node) && !mips_is_Store(node)) {
- panic("trying to set frame entity on non load/store node %+F\n", node);
+ panic("trying to set frame entity on non load/store node %+F", node);
}
attr = get_irn_generic_attr(node);
mips_load_store_attr_t *attr;
if(!is_mips_irn(node)) {
- panic("trying to set frame offset on non load/store node %+F\n", node);
+ panic("trying to set frame offset on non load/store node %+F", node);
}
if(!mips_is_Load(node) && !mips_is_Store(node)) {
- panic("trying to set frame offset on non load/store node %+F\n", node);
+ panic("trying to set frame offset on non load/store node %+F", node);
}
attr = get_irn_generic_attr(node);
static void collect_copyb_nodes(ir_node *node, void *env) {
wenv_t *wenv = env;
- if (get_irn_op(node) == op_CopyB) {
+ if (is_CopyB(node)) {
set_irn_link(node, wenv->list);
wenv->list = node;
}
&mips_gp_regs[REG_SP],
&mips_gp_regs[REG_FP],
-1, /* stack direction */
- 1, /* stack alignment for calls */
+ 2, /* power of two stack alignment for calls, 2^2 == 4 */
NULL, /* main environment */
7, /* spill costs */
5, /* reload costs */
pset_insert_ptr(s, env->arch_env->bp);
}
-static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap *reg_map)
+static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap *reg_map, int *stack_bias)
{
mips_abi_env_t *env = self;
ir_graph *irg = env->irg;
ir_node *fp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
int initialstackframesize;
- if(env->debug) {
+ (void) stack_bias;
+
+ if (env->debug) {
/*
* The calling conventions wants a stack frame of at least 24bytes size with
* a0-a3 saved in offset 0-12
static backend_params p = {
1, /* need dword lowering */
0, /* don't support inline assembler yet */
+ 0, /* no immediate floating point mode. */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
NULL, /* no if conversion settings */
+ NULL /* no immediate fp mode */
};
return &p;
}
+static asm_constraint_flags_t mips_parse_asm_constraint(const void *self,
+ const char **c)
+{
+ (void) self;
+ (void) c;
+ return ASM_CONSTRAINT_FLAG_INVALID;
+}
+
+static int mips_is_valid_clobber(const void *self, const char *clobber)
+{
+ (void) self;
+ (void) clobber;
+ return 0;
+}
+
const arch_isa_if_t mips_isa_if = {
mips_init,
mips_done,
mips_get_allowed_execution_units,
mips_get_machine,
mips_get_irg_list,
+ mips_parse_asm_constraint,
+ mips_is_valid_clobber
};
void be_init_arch_mips(void)