/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
* will be asked for this information.
*/
static const
-arch_register_req_t *mips_get_irn_reg_req(const void *self,
- const ir_node *node, int pos)
+arch_register_req_t *mips_get_irn_reg_req(const ir_node *node, int pos)
{
long node_pos = pos == -1 ? 0 : pos;
ir_mode *mode = get_irn_mode(node);
- (void) self;
if (is_Block(node) || mode == mode_X || mode == mode_M) {
return arch_no_register_req;
return arch_no_register_req;
}
-static void mips_set_irn_reg(const void *self, ir_node *irn,
- const arch_register_t *reg)
+static void mips_set_irn_reg(ir_node *irn, const arch_register_t *reg)
{
int pos = 0;
- (void) self;
if (is_Proj(irn)) {
}
}
-static const arch_register_t *mips_get_irn_reg(const void *self,
- const ir_node *irn)
+static const arch_register_t *mips_get_irn_reg(const ir_node *irn)
{
int pos = 0;
const arch_register_t *reg = NULL;
- (void) self;
if (is_Proj(irn)) {
return reg;
}
-static arch_irn_class_t mips_classify(const void *self, const ir_node *irn)
+static arch_irn_class_t mips_classify(const ir_node *irn)
{
- (void) self;
irn = skip_Proj_const(irn);
if (is_cfop(irn)) {
return 0;
}
-static arch_irn_flags_t mips_get_flags(const void *self, const ir_node *irn)
+static arch_irn_flags_t mips_get_flags(const ir_node *irn)
{
- (void) self;
irn = skip_Proj_const(irn);
if (!is_mips_irn(irn))
return is_mips_sw(node) || is_mips_sh(node) || is_mips_sb(node);
}
-static ir_entity *mips_get_frame_entity(const void *self, const ir_node *node)
+static ir_entity *mips_get_frame_entity(const ir_node *node)
{
const mips_load_store_attr_t *attr;
- (void) self;
if(!is_mips_irn(node))
return NULL;
return attr->stack_entity;
}
-static void mips_set_frame_entity(const void *self, ir_node *node,
- ir_entity *entity)
+static void mips_set_frame_entity(ir_node *node, ir_entity *entity)
{
mips_load_store_attr_t *attr;
- (void) self;
if(!is_mips_irn(node)) {
- panic("trying to set frame entity on non load/store node %+F\n", node);
+ panic("trying to set frame entity on non load/store node %+F", node);
}
if(!mips_is_Load(node) && !mips_is_Store(node)) {
- panic("trying to set frame entity on non load/store node %+F\n", node);
+ panic("trying to set frame entity on non load/store node %+F", node);
}
attr = get_irn_generic_attr(node);
* This function is called by the generic backend to correct offsets for
* nodes accessing the stack.
*/
-static void mips_set_frame_offset(const void *self, ir_node *node, int offset)
+static void mips_set_frame_offset(ir_node *node, int offset)
{
mips_load_store_attr_t *attr;
- (void) self;
if(!is_mips_irn(node)) {
- panic("trying to set frame offset on non load/store node %+F\n", node);
+ panic("trying to set frame offset on non load/store node %+F", node);
}
if(!mips_is_Load(node) && !mips_is_Store(node)) {
- panic("trying to set frame offset on non load/store node %+F\n", node);
+ panic("trying to set frame offset on non load/store node %+F", node);
}
attr = get_irn_generic_attr(node);
}
}
-static int mips_get_sp_bias(const void *self, const ir_node *irn)
+static int mips_get_sp_bias(const ir_node *irn)
{
- (void) self;
(void) irn;
return 0;
}
/* fill register allocator interface */
-static const arch_irn_ops_if_t mips_irn_ops_if = {
+static const arch_irn_ops_t mips_irn_ops = {
mips_get_irn_reg_req,
mips_set_irn_reg,
mips_get_irn_reg,
NULL, /* perform_memory_operand */
};
-mips_irn_ops_t mips_irn_ops = {
- &mips_irn_ops_if,
- NULL
-};
-
-
-
/**************************************************
* _ _ __
* | | (_)/ _|
static const arch_code_generator_if_t mips_code_gen_if = {
mips_cg_init,
+ NULL, /* get_pic_base */
NULL, /* before abi introduce */
mips_prepare_graph,
NULL, /* spill */
static void *mips_cg_init(be_irg_t *birg)
{
const arch_env_t *arch_env = be_get_birg_arch_env(birg);
- mips_isa_t *isa = (mips_isa_t *) arch_env->isa;
+ mips_isa_t *isa = (mips_isa_t *) arch_env;
mips_code_gen_t *cg = xmalloc(sizeof(*cg));
cg->impl = &mips_code_gen_if;
cur_reg_set = cg->reg_set;
- mips_irn_ops.cg = cg;
-
isa->cg = cg;
return (arch_code_generator_t *)cg;
&mips_gp_regs[REG_SP],
&mips_gp_regs[REG_FP],
-1, /* stack direction */
+ 2, /* power of two stack alignment for calls, 2^2 == 4 */
NULL, /* main environment */
7, /* spill costs */
5, /* reload costs */
/**
* Initializes the backend ISA and opens the output file.
*/
-static void *mips_init(FILE *file_handle) {
+static arch_env_t *mips_init(FILE *file_handle) {
static int inited = 0;
mips_isa_t *isa;
be_emit_init(file_handle);
mips_register_init();
- mips_create_opcodes();
+ mips_create_opcodes(&mips_irn_ops);
// mips_init_opcode_transforms();
/* we mark referenced global entities, so we can only emit those which
*/
inc_master_type_visited();
- return isa;
+ return &isa->arch_env;
}
/**
{
mips_isa_t *isa = self;
- be_gas_emit_decls(isa->arch_isa.main_env, 1);
+ be_gas_emit_decls(isa->arch_env.main_env, 1);
be_emit_exit();
free(isa);
const ir_mode *mode)
{
(void) self;
+ (void) mode;
ASSERT_NO_FLOAT(mode);
return &mips_reg_classes[CLASS_mips_gp];
}
typedef struct {
be_abi_call_flags_bits_t flags;
- const arch_isa_t *isa;
const arch_env_t *arch_env;
ir_graph *irg;
// do special handling to support debuggers
env->flags = fl.bits;
env->irg = irg;
env->arch_env = arch_env;
- env->isa = arch_env->isa;
env->debug = 1;
return env;
}
mips_abi_env_t *env = self;
if(env->flags.try_omit_fp)
- pset_insert_ptr(s, env->isa->bp);
+ pset_insert_ptr(s, env->arch_env->bp);
}
static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap *reg_map)
// - setup first part of stackframe
sp = new_rd_mips_addu(NULL, irg, block, sp,
mips_create_Immediate(initialstackframesize));
- mips_set_irn_reg(NULL, sp, &mips_gp_regs[REG_SP]);
+ mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
set_mips_flags(sp, arch_irn_flags_ignore);
/* TODO: where to get an edge with a0-a3
// save old framepointer
sp = new_rd_mips_addu(NULL, irg, block, sp,
mips_create_Immediate(-initialstackframesize));
- mips_set_irn_reg(NULL, sp, &mips_gp_regs[REG_SP]);
+ mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
set_mips_flags(sp, arch_irn_flags_ignore);
reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
// setup framepointer
fp = new_rd_mips_addu(NULL, irg, block, sp,
mips_create_Immediate(-initialstackframesize));
- mips_set_irn_reg(NULL, fp, &mips_gp_regs[REG_FP]);
+ mips_set_irn_reg(fp, &mips_gp_regs[REG_FP]);
set_mips_flags(fp, arch_irn_flags_ignore);
be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp);
// copy fp to sp
sp = new_rd_mips_or(NULL, irg, block, fp, mips_create_zero());
- mips_set_irn_reg(NULL, sp, &mips_gp_regs[REG_SP]);
+ mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
set_mips_flags(sp, arch_irn_flags_ignore);
// 1. restore fp
be_abi_call_param_reg(abi, i, reg);
} else {
/* default: all parameters on stack */
- be_abi_call_param_stack(abi, i, 4, 0, 0);
+ be_abi_call_param_stack(abi, i, modes[i], 4, 0, 0);
}
}
}
}
-static const void *mips_get_irn_ops(const arch_irn_handler_t *self,
- const ir_node *irn)
-{
- (void) self;
- (void) irn;
- return &mips_irn_ops;
-}
-
-const arch_irn_handler_t mips_irn_handler = {
- mips_get_irn_ops
-};
-
-const arch_irn_handler_t *mips_get_irn_handler(const void *self)
-{
- (void) self;
- return &mips_irn_handler;
-}
-
/**
* Initializes the code generator interface.
*/
static backend_params p = {
1, /* need dword lowering */
0, /* don't support inline assembler yet */
+ 0, /* no immediate floating point mode. */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
NULL, /* no if conversion settings */
+ NULL /* no immediate fp mode */
};
return &p;
}
+static asm_constraint_flags_t mips_parse_asm_constraint(const void *self,
+ const char **c)
+{
+ (void) self;
+ (void) c;
+ return ASM_CONSTRAINT_FLAG_INVALID;
+}
+
+static int mips_is_valid_clobber(const void *self, const char *clobber)
+{
+ (void) self;
+ (void) clobber;
+ return 0;
+}
+
const arch_isa_if_t mips_isa_if = {
mips_init,
mips_done,
mips_get_reg_class,
mips_get_reg_class_for_mode,
mips_get_call_abi,
- mips_get_irn_handler,
mips_get_code_generator_if,
mips_get_list_sched_selector,
mips_get_ilp_sched_selector,
mips_get_allowed_execution_units,
mips_get_machine,
mips_get_irg_list,
+ mips_parse_asm_constraint,
+ mips_is_valid_clobber
};
void be_init_arch_mips(void)
projects / libfirm / blobdiff