mips_load_store_attr_t *attr;
if(!is_mips_irn(node)) {
- panic("trying to set frame entity on non load/store node %+F\n", node);
+ panic("trying to set frame entity on non load/store node %+F", node);
}
if(!mips_is_Load(node) && !mips_is_Store(node)) {
- panic("trying to set frame entity on non load/store node %+F\n", node);
+ panic("trying to set frame entity on non load/store node %+F", node);
}
attr = get_irn_generic_attr(node);
mips_load_store_attr_t *attr;
if(!is_mips_irn(node)) {
- panic("trying to set frame offset on non load/store node %+F\n", node);
+ panic("trying to set frame offset on non load/store node %+F", node);
}
if(!mips_is_Load(node) && !mips_is_Store(node)) {
- panic("trying to set frame offset on non load/store node %+F\n", node);
+ panic("trying to set frame offset on non load/store node %+F", node);
}
attr = get_irn_generic_attr(node);
static void *mips_cg_init(be_irg_t *birg)
{
const arch_env_t *arch_env = be_get_birg_arch_env(birg);
- mips_isa_t *isa = (mips_isa_t *) arch_env->isa;
+ mips_isa_t *isa = (mips_isa_t *) arch_env;
mips_code_gen_t *cg = xmalloc(sizeof(*cg));
cg->impl = &mips_code_gen_if;
&mips_gp_regs[REG_SP],
&mips_gp_regs[REG_FP],
-1, /* stack direction */
- 1, /* stack alignment for calls */
+ 2, /* power of two stack alignment for calls, 2^2 == 4 */
NULL, /* main environment */
7, /* spill costs */
5, /* reload costs */
/**
* Initializes the backend ISA and opens the output file.
*/
-static void *mips_init(FILE *file_handle) {
+static arch_env_t *mips_init(FILE *file_handle) {
static int inited = 0;
mips_isa_t *isa;
*/
inc_master_type_visited();
- return isa;
+ return &isa->arch_env;
}
/**
{
mips_isa_t *isa = self;
- be_gas_emit_decls(isa->arch_isa.main_env, 1);
+ be_gas_emit_decls(isa->arch_env.main_env, 1);
be_emit_exit();
free(isa);
typedef struct {
be_abi_call_flags_bits_t flags;
- const arch_isa_t *isa;
const arch_env_t *arch_env;
ir_graph *irg;
// do special handling to support debuggers
env->flags = fl.bits;
env->irg = irg;
env->arch_env = arch_env;
- env->isa = arch_env->isa;
env->debug = 1;
return env;
}
mips_abi_env_t *env = self;
if(env->flags.try_omit_fp)
- pset_insert_ptr(s, env->isa->bp);
+ pset_insert_ptr(s, env->arch_env->bp);
}
static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap *reg_map)
static backend_params p = {
1, /* need dword lowering */
0, /* don't support inline assembler yet */
+ 0, /* no immediate floating point mode. */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
NULL, /* no if conversion settings */
+ NULL /* no immediate fp mode */
};
return &p;
}
+static asm_constraint_flags_t mips_parse_asm_constraint(const void *self,
+ const char **c)
+{
+ (void) self;
+ (void) c;
+ return ASM_CONSTRAINT_FLAG_INVALID;
+}
+
+static int mips_is_valid_clobber(const void *self, const char *clobber)
+{
+ (void) self;
+ (void) clobber;
+ return 0;
+}
+
const arch_isa_if_t mips_isa_if = {
mips_init,
mips_done,
mips_get_allowed_execution_units,
mips_get_machine,
mips_get_irg_list,
+ mips_parse_asm_constraint,
+ mips_is_valid_clobber
};
void be_init_arch_mips(void)