Fixed register order (arg, the comments were in ATT).

[libfirm] / ir / be / ia32 / ia32_x87.c

diff --git a/ir/be/ia32/ia32_x87.c b/ir/be/ia32/ia32_x87.c
index 4f85646..6e806fb 100644 (file)
--- a/ir/be/ia32/ia32_x87.c
+++ b/ir/be/ia32/ia32_x87.c
@@ -44,8 +44,8 @@
 #include "error.h"
 
 #include "../belive_t.h"
-#include "../besched_t.h"
-#include "../benode_t.h"
+#include "../besched.h"
+#include "../benode.h"
 #include "bearch_ia32_t.h"
 #include "ia32_new_nodes.h"
 #include "gen_ia32_new_nodes.h"
@@ -1267,9 +1267,8 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
                                set_ia32_am_sc(vfld, get_ia32_am_sc(n));
                                set_ia32_ls_mode(vfld, get_ia32_ls_mode(n));
 
-                               irg   = get_irn_irg(n);
-                               rproj = new_r_Proj(irg, block, vfld, get_ia32_ls_mode(vfld), pn_ia32_vfld_res);
-                               mproj = new_r_Proj(irg, block, vfld, mode_M, pn_ia32_vfld_M);
+                               rproj = new_r_Proj(block, vfld, get_ia32_ls_mode(vfld), pn_ia32_vfld_res);
+                               mproj = new_r_Proj(block, vfld, mode_M, pn_ia32_vfld_M);
                                mem   = get_irn_Proj_for_mode(n, mode_M);
 
                                assert(mem && "Store memory not found");
@@ -1277,6 +1276,7 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
                                arch_set_irn_register(rproj, op2);
 
                                /* reroute all former users of the store memory to the load memory */
+                               irg = get_irn_irg(n);
                                edges_reroute(mem, mproj, irg);
                                /* set the memory input of the load to the store memory */
                                set_irn_n(vfld, n_ia32_vfld_mem, mem);
@@ -1473,9 +1473,9 @@ static int sim_Fucom(x87_state *state, ir_node *n)
        int reg_index_1 = arch_register_get_index(op1);
        int reg_index_2 = arch_register_get_index(op2);
        unsigned live = vfp_live_args_after(sim, n, 0);
-       int                    permuted = attr->attr.data.ins_permuted;
-       int xchg = 0;
-       int pops = 0;
+       bool                   permuted = attr->attr.data.ins_permuted;
+       bool                   xchg     = false;
+       int                    pops     = 0;
 
        DB((dbg, LEVEL_1, ">>> %+F %s, %s\n", n,
                arch_register_get_name(op1), arch_register_get_name(op2)));
@@ -1503,7 +1503,7 @@ static int sim_Fucom(x87_state *state, ir_node *n)
                                } else if (op2_idx == 0) {
                                        /* res = op X tos */
                                        permuted = !permuted;
-                                       xchg    = 1;
+                                       xchg     = true;
                                } else {
                                        /* bring the first one to tos */
                                        x87_create_fxch(state, n, op1_idx);
@@ -1538,9 +1538,9 @@ static int sim_Fucom(x87_state *state, ir_node *n)
                                        op2_idx = 0;
                                }
                                /* res = op X tos, pop */
-                               pops    = 1;
+                               pops     = 1;
                                permuted = !permuted;
-                               xchg    = 1;
+                               xchg     = true;
                        } else {
                                /* both operands are dead here, check first for identity. */
                                if (op1_idx == op2_idx) {
@@ -1575,8 +1575,8 @@ static int sim_Fucom(x87_state *state, ir_node *n)
                                        }
                                        /* res = op X tos, pop, pop */
                                        permuted = !permuted;
-                                       xchg    = 1;
-                                       pops    = 2;
+                                       xchg     = true;
+                                       pops     = 2;
                                } else {
                                        /* if one is already the TOS, we need two fxch */
                                        if (op1_idx == 0) {
@@ -1587,9 +1587,9 @@ static int sim_Fucom(x87_state *state, ir_node *n)
                                                x87_create_fxch(state, n, op2_idx);
                                                op2_idx = 0;
                                                /* res = op X tos, pop, pop */
-                                               pops    = 2;
+                                               pops     = 2;
                                                permuted = !permuted;
-                                               xchg    = 1;
+                                               xchg     = true;
                                        } else if (op2_idx == 0) {
                                                /* second one is TOS, move to st(1) */
                                                x87_create_fxch(state, n, 1);
@@ -1734,16 +1734,12 @@ static int sim_Keep(x87_state *state, ir_node *node)
  */
 static void keep_float_node_alive(ir_node *node)
 {
-       ir_graph                    *irg    = get_irn_irg(node);
-       ir_node                     *block  = get_nodes_block(node);
-       const arch_register_class_t *cls    = arch_get_irn_reg_class_out(node);
-       ir_node                     *keep;
-
-       keep = be_new_Keep(cls, irg, block, 1, &node);
+       ir_node *block = get_nodes_block(node);
+       ir_node *keep  = be_new_Keep(block, 1, &node);
 
        assert(sched_is_scheduled(node));
        sched_add_after(node, keep);
-}  /* keep_float_node_alive */
+}
 
 /**
  * Create a copy of a node. Recreate the node if it's a constant.