ia32_Minus64Bit needs no contraint copies.

[libfirm] / ir / be / ia32 / ia32_x87.c

diff --git a/ir/be/ia32/ia32_x87.c b/ir/be/ia32/ia32_x87.c
index ac3d876..4457de1 100644 (file)
--- a/ir/be/ia32/ia32_x87.c
+++ b/ir/be/ia32/ia32_x87.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
+ * Copyright (C) 1995-2010 University of Karlsruhe.  All right reserved.
  *
  * This file is part of libFirm.
  *
@@ -707,7 +707,7 @@ static ir_node *x87_create_fpop(x87_state *state, ir_node *n, int num)
        ia32_x87_attr_t *attr;
 
        assert(num > 0);
-       while (num > 0) {
+       do {
                x87_pop(state);
                if (ia32_cg_config.use_ffreep)
                        fpop = new_bd_ia32_ffreep(NULL, get_nodes_block(n));
@@ -721,9 +721,7 @@ static ir_node *x87_create_fpop(x87_state *state, ir_node *n, int num)
                keep_alive(fpop);
                sched_add_before(n, fpop);
                DB((dbg, LEVEL_1, "<<< %s %s\n", get_irn_opname(fpop), attr->x87[0]->name));
-
-               --num;
-       }
+       } while (--num > 0);
        return fpop;
 }  /* x87_create_fpop */
 
@@ -1197,14 +1195,15 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
                                x87_patch_insn(n, op_p);
                        } else {
                                ir_node  *vfld, *mem, *block, *rproj, *mproj;
-                               ir_graph *irg = get_irn_irg(n);
+                               ir_graph *irg   = get_irn_irg(n);
+                               ir_node  *nomem = get_irg_no_mem(irg);
 
                                /* stack full here: need fstp + load */
                                x87_pop(state);
                                x87_patch_insn(n, op_p);
 
                                block = get_nodes_block(n);
-                               vfld  = new_bd_ia32_vfld(NULL, block, get_irn_n(n, 0), get_irn_n(n, 1), new_r_NoMem(irg), get_ia32_ls_mode(n));
+                               vfld  = new_bd_ia32_vfld(NULL, block, get_irn_n(n, 0), get_irn_n(n, 1), nomem, get_ia32_ls_mode(n));
 
                                /* copy all attributes */
                                set_ia32_frame_ent(vfld, get_ia32_frame_ent(n));
@@ -1224,7 +1223,7 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
                                arch_set_irn_register(rproj, op2);
 
                                /* reroute all former users of the store memory to the load memory */
-                               edges_reroute(mem, mproj, irg);
+                               edges_reroute(mem, mproj);
                                /* set the memory input of the load to the store memory */
                                set_irn_n(vfld, n_ia32_vfld_mem, mem);
 
@@ -1784,8 +1783,6 @@ static int sim_Copy(x87_state *state, ir_node *n)
        op1_idx = x87_on_stack(state, arch_register_get_index(op1));
 
        if (is_vfp_live(arch_register_get_index(op1), live)) {
-               ir_node *pred = get_irn_n(n, 0);
-
                /* Operand is still live, a real copy. We need here an fpush that can
                   hold a a register, so use the fpushCopy or recreate constants */
                node = create_Copy(state, n);
@@ -1939,7 +1936,7 @@ static int sim_Return(x87_state *state, ir_node *n)
 
        /* only floating point return values must reside on stack */
        for (i = 0; i < n_res; ++i) {
-               ir_node *res = get_irn_n(n, be_pos_Return_val + i);
+               ir_node *res = get_irn_n(n, n_be_Return_val + i);
 
                if (mode_is_float(get_irn_mode(res)))
                        ++n_float_res;