forbid calls of new_XXX and new_d_XXX when not in phase_building (only new_r_XXX...

[libfirm] / ir / be / ia32 / ia32_x87.c

diff --git a/ir/be/ia32/ia32_x87.c b/ir/be/ia32/ia32_x87.c
index ce3f04e..346751a 100644 (file)
--- a/ir/be/ia32/ia32_x87.c
+++ b/ir/be/ia32/ia32_x87.c
@@ -58,7 +58,7 @@
 /* the unop index */
 #define UNOP_IDX 0
 
-#define MASK_TOS(x)            ((x) & (N_x87_REGS - 1))
+#define MASK_TOS(x)    ((x) & (N_x87_REGS - 1))
 
 /** the debug handle */
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
@@ -131,7 +131,7 @@ typedef struct blk_state {
        x87_state *end;     /**< state at the end or NULL if not assigned */
 } blk_state;
 
-#define PTR_TO_BLKSTATE(p)     ((blk_state *)(p))
+#define PTR_TO_BLKSTATE(p)    ((blk_state *)(p))
 
 /** liveness bitset for vfp registers. */
 typedef unsigned char vfp_liveness;
@@ -802,7 +802,7 @@ static vfp_liveness vfp_liveness_end_of_block(x87_simulator *sim, const ir_node
 }  /* vfp_liveness_end_of_block */
 
 /** get the register mask from an arch_register */
-#define REGMASK(reg)   (1 << (arch_register_get_index(reg)))
+#define REGMASK(reg)    (1 << (arch_register_get_index(reg)))
 
 /**
  * Return a bitset of argument registers which are live at the end of a node.
@@ -1196,14 +1196,14 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
                                x87_patch_insn(n, op_p);
                        } else {
                                ir_node  *vfld, *mem, *block, *rproj, *mproj;
-                               ir_graph *irg;
+                               ir_graph *irg = get_irn_irg(n);
 
                                /* stack full here: need fstp + load */
                                x87_pop(state);
                                x87_patch_insn(n, op_p);
 
                                block = get_nodes_block(n);
-                               vfld  = new_bd_ia32_vfld(NULL, block, get_irn_n(n, 0), get_irn_n(n, 1), new_NoMem(), get_ia32_ls_mode(n));
+                               vfld  = new_bd_ia32_vfld(NULL, block, get_irn_n(n, 0), get_irn_n(n, 1), new_r_NoMem(irg), get_ia32_ls_mode(n));
 
                                /* copy all attributes */
                                set_ia32_frame_ent(vfld, get_ia32_frame_ent(n));
@@ -1223,7 +1223,6 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
                                arch_set_irn_register(rproj, op2);
 
                                /* reroute all former users of the store memory to the load memory */
-                               irg = get_irn_irg(n);
                                edges_reroute(mem, mproj, irg);
                                /* set the memory input of the load to the store memory */
                                set_irn_n(vfld, n_ia32_vfld_mem, mem);
@@ -1267,7 +1266,7 @@ static int sim_##op(x87_state *state, ir_node *n) { \
 }
 
 #define GEN_BINOP(op)   _GEN_BINOP(op, op)
-#define GEN_BINOPR(op) _GEN_BINOP(op, op##r)
+#define GEN_BINOPR(op)  _GEN_BINOP(op, op##r)
 
 #define GEN_LOAD(op)                                              \
 static int sim_##op(x87_state *state, ir_node *n) {               \