if (mode == mode_T) {
/* patch all Proj's */
- const ir_edge_t *edge;
-
foreach_out_edge(n, edge) {
ir_node *proj = get_edge_src_irn(edge);
if (is_Proj(proj)) {
*/
static ir_node *get_irn_Proj_for_mode(ir_node *n, ir_mode *m)
{
- const ir_edge_t *edge;
-
assert(get_irn_mode(n) == mode_T && "Need mode_T node");
foreach_out_edge(n, edge) {
const arch_register_class_t *cls = &ia32_reg_classes[CLASS_ia32_vfp];
if (get_irn_mode(irn) == mode_T) {
- const ir_edge_t *edge;
-
foreach_out_edge(irn, edge) {
ir_node *proj = get_edge_src_irn(edge);
*/
static vfp_liveness vfp_liveness_end_of_block(x87_simulator *sim, const ir_node *block)
{
- int i;
vfp_liveness live = 0;
const arch_register_class_t *cls = &ia32_reg_classes[CLASS_ia32_vfp];
const be_lv_t *lv = sim->lv;
- be_lv_foreach(lv, block, be_lv_state_end, i) {
+ be_lv_foreach(lv, block, be_lv_state_end, node) {
const arch_register_t *reg;
- const ir_node *node = be_lv_get_irn(lv, block, i);
if (!arch_irn_consider_in_reg_alloc(cls, node))
continue;
{
vfp_liveness live = vfp_liveness_end_of_block(sim, block);
unsigned idx;
- ir_node *irn;
/* now iterate through the block backward and cache the results */
sched_foreach_reverse(block, irn) {
*/
static int sim_unop(x87_state *state, ir_node *n, ir_op *op)
{
- int op1_idx;
x87_simulator *sim = state->sim;
const arch_register_t *op1 = x87_get_irn_register(get_irn_n(n, 0));
const arch_register_t *out = x87_get_irn_register(n);
DB((dbg, LEVEL_1, ">>> %+F -> %s\n", n, out->name));
DEBUG_ONLY(vfp_dump_live(live);)
- op1_idx = x87_on_stack(state, arch_register_get_index(op1));
+ int op1_idx = x87_on_stack(state, arch_register_get_index(op1));
if (is_vfp_live(arch_register_get_index(op1), live)) {
/* push the operand here */
x87_create_fpush(state, n, op1_idx, 0);
op1_idx = 0;
- }
- else {
+ } else {
/* operand is dead, bring it to tos */
if (op1_idx != 0) {
x87_create_fxch(state, n, op1_idx);
- op1_idx = 0;
}
}
*/
static void collect_and_rewire_users(ir_node *store, ir_node *old_val, ir_node *new_val)
{
- const ir_edge_t *edge, *ne;
-
- foreach_out_edge_safe(old_val, edge, ne) {
+ foreach_out_edge_safe(old_val, edge) {
ir_node *user = get_edge_src_irn(edge);
if (! user || user == store)
case 0: dst = op_ia32_FucomFnstsw; break;
case 1: dst = op_ia32_FucompFnstsw; break;
case 2: dst = op_ia32_FucomppFnstsw; break;
- default: panic("invalid popcount in sim_Fucom");
+ default: panic("invalid popcount");
}
for (i = 0; i < pops; ++i) {
x87_pop(state);
x87_create_fpop(state, sched_next(n), 1);
break;
- default: panic("invalid popcount in sim_Fucom");
+ default: panic("invalid popcount");
}
} else {
- panic("invalid operation %+F in sim_FucomFnstsw", n);
+ panic("invalid operation %+F", n);
}
x87_patch_insn(n, dst);
if (out_idx >= 0 && out_idx != op1_idx) {
/* Matze: out already on stack? how can this happen? */
- panic("invalid stack state in x87 simulator");
+ panic("invalid stack state");
#if 0
/* op1 must be killed and placed where out is */
*/
static ir_node *get_call_result_proj(ir_node *call)
{
- const ir_edge_t *edge;
-
/* search the result proj */
foreach_out_edge(call, edge) {
ir_node *proj = get_edge_src_irn(edge);
*/
static int sim_Perm(x87_state *state, ir_node *irn)
{
- int i, n;
- ir_node *pred = get_irn_n(irn, 0);
- int *stack_pos;
- const ir_edge_t *edge;
+ int i, n;
+ ir_node *pred = get_irn_n(irn, 0);
+ int *stack_pos;
/* handle only floating point Perms */
if (! mode_is_float(get_irn_mode(pred)))
ir_node *n, *next;
blk_state *bl_state = x87_get_bl_state(sim, block);
x87_state *state = bl_state->begin;
- const ir_edge_t *edge;
ir_node *start_block;
assert(state != NULL);