ia32_x87_attr_t *attr;
ir_op *dst;
x87_simulator *sim = state->sim;
- const arch_register_t *op1 = x87_get_irn_register(sim, get_irn_n(n, BINOP_IDX_1));
- const arch_register_t *op2 = x87_get_irn_register(sim, get_irn_n(n, BINOP_IDX_2));
+ ir_node *op1_node = get_irn_n(n, n_ia32_vfCondJmp_left);
+ ir_node *op2_node = get_irn_n(n, n_ia32_vfCondJmp_right);
+ const arch_register_t *op1 = x87_get_irn_register(sim, op1_node);
+ const arch_register_t *op2 = x87_get_irn_register(sim, op2_node);
int reg_index_1 = arch_register_get_index(op1);
int reg_index_2 = arch_register_get_index(op2);
unsigned live = vfp_live_args_after(sim, n, 0);
/* at block begin, kill all dead registers */
state = x87_kill_deads(sim, block, state);
+ /* create a new state, will be changed */
+ state = x87_clone_state(sim, state);
/* beware, n might change */
for (n = sched_first(block); !sched_is_end(n); n = next) {
func = (sim_func)op->ops.generic;
- /* have work to do */
- if (state == bl_state->begin) {
- /* create a new state, will be changed */
- state = x87_clone_state(sim, state);
- }
-
/* simulate it */
node_inserted = (*func)(state, n);
start_block = get_irg_start_block(get_irn_irg(block));
+ DB((dbg, LEVEL_2, "State at Block end:\n ")); DEBUG_ONLY(x87_dump_stack(state));
+
/* check if the state must be shuffled */
foreach_block_succ(block, edge) {
ir_node *succ = get_edge_src_irn(edge);
fix_unknown_phis(state, succ, block, get_edge_src_pos(edge));
if (succ_state->begin == NULL) {
+ DB((dbg, LEVEL_2, "Set begin state for succ %+F:\n", succ));
+ DEBUG_ONLY(x87_dump_stack(state));
succ_state->begin = state;
waitq_put(sim->worklist, succ);
} else {
+ DB((dbg, LEVEL_2, "succ %+F already has a state, shuffling\n", succ));
/* There is already a begin state for the successor, bad.
Do the necessary permutations.
Note that critical edges are removed, so this is always possible:
}
}
bl_state->end = state;
-
- DB((dbg, LEVEL_2, "State at Block end:\n ")); DEBUG_ONLY(x87_dump_stack(state));
} /* x87_simulate_block */
/**