Complement r22830.

[libfirm] / ir / be / ia32 / ia32_x87.c

diff --git a/ir/be/ia32/ia32_x87.c b/ir/be/ia32/ia32_x87.c
index 8a6aa74..14216a5 100644 (file)
--- a/ir/be/ia32/ia32_x87.c
+++ b/ir/be/ia32/ia32_x87.c
@@ -24,9 +24,7 @@
  * @author      Michael Beck
  * @version     $Id$
  */
-#ifdef HAVE_CONFIG_H
 #include "config.h"
-#endif
 
 #include <assert.h>
 
@@ -139,7 +137,6 @@ typedef unsigned char vfp_liveness;
 struct _x87_simulator {
        struct obstack obst;        /**< An obstack for fast allocating. */
        pmap *blk_states;           /**< Map blocks to states. */
-       const arch_env_t *arch_env; /**< The architecture environment. */
        be_lv_t *lv;                /**< intrablock liveness. */
        vfp_liveness *live;         /**< Liveness information. */
        unsigned n_idx;             /**< The cached get_irg_last_idx() result. */
@@ -748,18 +745,16 @@ static ir_node *x87_create_fldz(x87_state *state, ir_node *n, int regidx)
  * Updates a live set over a single step from a given node to its predecessor.
  * Everything defined at the node is removed from the set, the uses of the node get inserted.
  *
- * @param sim      The simulator handle.
  * @param irn      The node at which liveness should be computed.
  * @param live     The bitset of registers live before @p irn. This set gets modified by updating it to
  *                 the registers live after irn.
  *
  * @return The live bitset.
  */
-static vfp_liveness vfp_liveness_transfer(x87_simulator *sim, ir_node *irn, vfp_liveness live)
+static vfp_liveness vfp_liveness_transfer(ir_node *irn, vfp_liveness live)
 {
        int i, n;
        const arch_register_class_t *cls = &ia32_reg_classes[CLASS_ia32_vfp];
-       const arch_env_t *arch_env = sim->arch_env;
 
        if (get_irn_mode(irn) == mode_T) {
                const ir_edge_t *edge;
@@ -767,14 +762,14 @@ static vfp_liveness vfp_liveness_transfer(x87_simulator *sim, ir_node *irn, vfp_
                foreach_out_edge(irn, edge) {
                        ir_node *proj = get_edge_src_irn(edge);
 
-                       if (arch_irn_consider_in_reg_alloc(arch_env, cls, proj)) {
+                       if (arch_irn_consider_in_reg_alloc(cls, proj)) {
                                const arch_register_t *reg = x87_get_irn_register(proj);
                                live &= ~(1 << arch_register_get_index(reg));
                        }
                }
        }
 
-       if (arch_irn_consider_in_reg_alloc(arch_env, cls, irn)) {
+       if (arch_irn_consider_in_reg_alloc(cls, irn)) {
                const arch_register_t *reg = x87_get_irn_register(irn);
                live &= ~(1 << arch_register_get_index(reg));
        }
@@ -782,7 +777,8 @@ static vfp_liveness vfp_liveness_transfer(x87_simulator *sim, ir_node *irn, vfp_
        for (i = 0, n = get_irn_arity(irn); i < n; ++i) {
                ir_node *op = get_irn_n(irn, i);
 
-               if (mode_is_float(get_irn_mode(op)) && arch_irn_consider_in_reg_alloc(arch_env, cls, op)) {
+               if (mode_is_float(get_irn_mode(op)) &&
+                               arch_irn_consider_in_reg_alloc(cls, op)) {
                        const arch_register_t *reg = x87_get_irn_register(op);
                        live |= 1 << arch_register_get_index(reg);
                }
@@ -804,13 +800,12 @@ static vfp_liveness vfp_liveness_end_of_block(x87_simulator *sim, const ir_node
        int i;
        vfp_liveness live = 0;
        const arch_register_class_t *cls = &ia32_reg_classes[CLASS_ia32_vfp];
-       const arch_env_t *arch_env = sim->arch_env;
        const be_lv_t *lv = sim->lv;
 
        be_lv_foreach(lv, block, be_lv_state_end, i) {
                const arch_register_t *reg;
                const ir_node *node = be_lv_get_irn(lv, block, i);
-               if (!arch_irn_consider_in_reg_alloc(arch_env, cls, node))
+               if (!arch_irn_consider_in_reg_alloc(cls, node))
                        continue;
 
                reg = x87_get_irn_register(node);
@@ -862,7 +857,7 @@ static void update_liveness(x87_simulator *sim, ir_node *block)
                idx = get_irn_idx(irn);
                sim->live[idx] = live;
 
-               live = vfp_liveness_transfer(sim, irn, live);
+               live = vfp_liveness_transfer(irn, live);
        }
        idx = get_irn_idx(block);
        sim->live[idx] = live;
@@ -1203,10 +1198,9 @@ static void collect_and_rewire_users(ir_node *store, ir_node *old_val, ir_node *
  */
 static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
 {
-       x87_simulator         *sim = state->sim;
        ir_node               *val = get_irn_n(n, n_ia32_vfst_val);
        const arch_register_t *op2 = x87_get_irn_register(val);
-       unsigned              live = vfp_live_args_after(sim, n, 0);
+       unsigned              live = vfp_live_args_after(state->sim, n, 0);
        int                   insn = NO_NODE_ADDED;
        ia32_x87_attr_t *attr;
        int op2_reg_idx, op2_idx, depth;
@@ -1278,7 +1272,7 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
 
                                assert(mem && "Store memory not found");
 
-                               arch_set_irn_register(sim->arch_env, rproj, op2);
+                               arch_set_irn_register(rproj, op2);
 
                                /* reroute all former users of the store memory to the load memory */
                                edges_reroute(mem, mproj, irg);
@@ -1747,7 +1741,6 @@ static void keep_float_node_alive(ir_node *node)
  */
 static ir_node *create_Copy(x87_state *state, ir_node *n)
 {
-       x87_simulator *sim = state->sim;
        ir_graph *irg = get_irn_irg(n);
        dbg_info *n_dbg = get_irn_dbg_info(n);
        ir_mode *mode = get_irn_mode(n);
@@ -1809,7 +1802,7 @@ static ir_node *create_Copy(x87_state *state, ir_node *n)
                attr->x87[0] = &ia32_st_regs[op1_idx];
                attr->x87[2] = &ia32_st_regs[0];
        }
-       arch_set_irn_register(sim->arch_env, res, out);
+       arch_set_irn_register(res, out);
 
        return res;
 }  /* create_Copy */
@@ -2116,7 +2109,6 @@ static int sim_Perm(x87_state *state, ir_node *irn)
 
 static int sim_Barrier(x87_state *state, ir_node *node)
 {
-       //const arch_env_t *arch_env = state->sim->arch_env;
        int i, arity;
 
        /* materialize unknown if needed */
@@ -2375,14 +2367,11 @@ static void register_sim(ir_op *op, sim_func func)
  *
  * @param sim       a simulator handle, will be initialized
  * @param irg       the current graph
- * @param arch_env  the architecture environment
  */
-static void x87_init_simulator(x87_simulator *sim, ir_graph *irg,
-                               const arch_env_t *arch_env)
+static void x87_init_simulator(x87_simulator *sim, ir_graph *irg)
 {
        obstack_init(&sim->obst);
        sim->blk_states = pmap_create();
-       sim->arch_env   = arch_env;
        sim->n_idx      = get_irg_last_idx(irg);
        sim->live       = obstack_alloc(&sim->obst, sizeof(*sim->live) * sim->n_idx);
 
@@ -2441,23 +2430,17 @@ static void update_liveness_walker(ir_node *block, void *data)
        update_liveness(sim, block);
 }  /* update_liveness_walker */
 
-/**
- * Run a simulation and fix all virtual instructions for a graph.
- *
- * @param env       the architecture environment
- * @param irg       the current graph
- *
- * Needs a block-schedule.
- */
-void x87_simulate_graph(const arch_env_t *arch_env, be_irg_t *birg)
+void x87_simulate_graph(be_irg_t *birg)
 {
+       /* TODO improve code quality (less executed fxch) by using execfreqs */
+
        ir_node       *block, *start_block;
        blk_state     *bl_state;
        x87_simulator sim;
        ir_graph      *irg = be_get_birg_irg(birg);
 
        /* create the simulator */
-       x87_init_simulator(&sim, irg, arch_env);
+       x87_init_simulator(&sim, irg);
 
        start_block = get_irg_start_block(irg);
        bl_state    = x87_get_bl_state(&sim, start_block);