* Transforms a Const.
*/
static ir_node *gen_Const(ir_node *node) {
- ir_graph *irg = current_ir_graph;
- ir_node *old_block = get_nodes_block(node);
- ir_node *block = be_transform_node(old_block);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_mode *mode = get_irn_mode(node);
+ ir_graph *irg = current_ir_graph;
+ ir_node *old_block = get_nodes_block(node);
+ ir_node *block = be_transform_node(old_block);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_mode *mode = get_irn_mode(node);
if (mode_is_float(mode)) {
ir_node *res = NULL;
set_ia32_emit_cl(new_op);
+ /* lowered shift instruction may have a dependency operand, handle it here */
+ if (get_irn_arity(node) == 3) {
+ /* we have a dependency */
+ ir_node *new_dep = be_transform_node(get_irn_n(node, 2));
+ add_irn_dep(new_op, new_dep);
+ }
+
return new_op;
}
new_cmp_left, new_cmp_right, nomem, pnc);
set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);
+ res = new_rd_ia32_Conv_I2I8Bit(dbgi, irg, block, noreg, noreg, res,
+ nomem, mode_Bu);
+
return res;
}
new_cmp_left = maybe_scale_up(new_cmp_left, mode, dbgi);
new_cmp_right = maybe_scale_up(new_cmp_right, mode, dbgi);
- res = new_rd_ia32_CmpSet(dbgi, irg, block, noreg, noreg,
- new_cmp_left, new_cmp_right, nomem, pnc);
+ res = new_rd_ia32_CmpSet(dbgi, irg, block, noreg, noreg, new_cmp_left,
+ new_cmp_right, nomem, pnc);
+ res = new_rd_ia32_Conv_I2I8Bit(dbgi, irg, block, noreg, noreg, res, nomem,
+ mode_Bu);
return res;
}
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_flavour(load, ia32_am_B);
set_ia32_ls_mode(load, mode_Is);
+ if(get_ia32_ls_mode(fist) == mode_Ls) {
+ ia32_attr_t *attr = get_ia32_attr(load);
+ attr->data.need_64bit_stackent = 1;
+ } else {
+ ia32_attr_t *attr = get_ia32_attr(load);
+ attr->data.need_32bit_stackent = 1;
+ }
SET_IA32_ORIG_NODE(load, ia32_get_old_node_name(cg, node));
return new_r_Proj(irg, block, load, mode_Iu, pn_ia32_Load_res);
*
********************************************/
-static ir_node *gen_be_StackParam(ir_node *node) {
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *ptr = get_irn_n(node, be_pos_StackParam_ptr);
- ir_node *new_ptr = be_transform_node(ptr);
- ir_node *new_op = NULL;
- ir_graph *irg = current_ir_graph;
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *nomem = new_rd_NoMem(current_ir_graph);
- ir_entity *ent = arch_get_frame_entity(env_cg->arch_env, node);
- ir_mode *load_mode = get_irn_mode(node);
- ir_node *noreg = ia32_new_NoReg_gp(env_cg);
- ir_mode *proj_mode;
- long pn_res;
-
- if (mode_is_float(load_mode)) {
- if (USE_SSE2(env_cg)) {
- new_op = new_rd_ia32_xLoad(dbgi, irg, block, new_ptr, noreg, nomem);
- pn_res = pn_ia32_xLoad_res;
- proj_mode = mode_xmm;
- } else {
- new_op = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, nomem, load_mode);
- pn_res = pn_ia32_vfld_res;
- proj_mode = mode_vfp;
- }
- } else {
- new_op = new_rd_ia32_Load(dbgi, irg, block, new_ptr, noreg, nomem);
- proj_mode = mode_Iu;
- pn_res = pn_ia32_Load_res;
- }
-
- set_irn_pinned(new_op, op_pin_state_floats);
- set_ia32_frame_ent(new_op, ent);
- set_ia32_use_frame(new_op);
-
- set_ia32_op_type(new_op, ia32_AddrModeS);
- set_ia32_am_flavour(new_op, ia32_am_B);
- set_ia32_ls_mode(new_op, load_mode);
- set_ia32_flags(new_op, get_ia32_flags(new_op) | arch_irn_flags_rematerializable);
-
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
-
- return new_rd_Proj(dbgi, irg, block, new_op, proj_mode, pn_res);
-}
-
/**
* Transforms a FrameAddr into an ia32 Add.
*/
return res;
}
-/**
- * Transforms a FrameLoad into an ia32 Load.
- */
-static ir_node *gen_be_FrameLoad(ir_node *node) {
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *mem = get_irn_n(node, be_pos_FrameLoad_mem);
- ir_node *new_mem = be_transform_node(mem);
- ir_node *ptr = get_irn_n(node, be_pos_FrameLoad_ptr);
- ir_node *new_ptr = be_transform_node(ptr);
- ir_node *new_op = NULL;
- ir_graph *irg = current_ir_graph;
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *noreg = ia32_new_NoReg_gp(env_cg);
- ir_entity *ent = arch_get_frame_entity(env_cg->arch_env, node);
- ir_mode *mode = get_type_mode(get_entity_type(ent));
- ir_node *projs[pn_Load_max];
-
- ia32_collect_Projs(node, projs, pn_Load_max);
-
- if (mode_is_float(mode)) {
- if (USE_SSE2(env_cg)) {
- new_op = new_rd_ia32_xLoad(dbgi, irg, block, new_ptr, noreg, new_mem);
- }
- else {
- new_op = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, new_mem, mode);
- }
- }
- else {
- new_op = new_rd_ia32_Load(dbgi, irg, block, new_ptr, noreg, new_mem);
- }
-
- set_irn_pinned(new_op, op_pin_state_floats);
- set_ia32_frame_ent(new_op, ent);
- set_ia32_use_frame(new_op);
-
- set_ia32_op_type(new_op, ia32_AddrModeS);
- set_ia32_am_flavour(new_op, ia32_am_B);
- set_ia32_ls_mode(new_op, mode);
- set_ia32_flags(new_op, get_ia32_flags(new_op) | arch_irn_flags_rematerializable);
-
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
-
- return new_op;
-}
-
-
-/**
- * Transforms a FrameStore into an ia32 Store.
- */
-static ir_node *gen_be_FrameStore(ir_node *node) {
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *mem = get_irn_n(node, be_pos_FrameStore_mem);
- ir_node *new_mem = be_transform_node(mem);
- ir_node *ptr = get_irn_n(node, be_pos_FrameStore_ptr);
- ir_node *new_ptr = be_transform_node(ptr);
- ir_node *val = get_irn_n(node, be_pos_FrameStore_val);
- ir_node *new_val = be_transform_node(val);
- ir_node *new_op = NULL;
- ir_graph *irg = current_ir_graph;
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *noreg = ia32_new_NoReg_gp(env_cg);
- ir_entity *ent = arch_get_frame_entity(env_cg->arch_env, node);
- ir_mode *mode = get_irn_mode(val);
-
- if (mode_is_float(mode)) {
- if (USE_SSE2(env_cg)) {
- new_op = new_rd_ia32_xStore(dbgi, irg, block, new_ptr, noreg, new_val, new_mem);
- } else {
- new_op = new_rd_ia32_vfst(dbgi, irg, block, new_ptr, noreg, new_val, new_mem, mode);
- }
- } else if (get_mode_size_bits(mode) == 8) {
- new_op = new_rd_ia32_Store8Bit(dbgi, irg, block, new_ptr, noreg, new_val, new_mem);
- } else {
- new_op = new_rd_ia32_Store(dbgi, irg, block, new_ptr, noreg, new_val, new_mem);
- }
-
- set_ia32_frame_ent(new_op, ent);
- set_ia32_use_frame(new_op);
-
- set_ia32_op_type(new_op, ia32_AddrModeD);
- set_ia32_am_flavour(new_op, ia32_am_B);
- set_ia32_ls_mode(new_op, mode);
-
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
-
- return new_op;
-}
-
/**
* In case SSE is used we need to copy the result from XMM0 to FPU TOS before return.
*/
#if 0
/* Unknown nodes are buggy in x87 sim, use zero for now... */
if (USE_SSE2(env_cg))
- return ia32_new_Unknown_xmm(env_cg);
else
return ia32_new_Unknown_vfp(env_cg);
#else
- ir_graph *irg = current_ir_graph;
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *block = get_irg_start_block(irg);
- return new_rd_ia32_vfldz(dbgi, irg, block);
+ if (!USE_SSE2(env_cg)) {
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *block = get_irg_start_block(irg);
+ return new_rd_ia32_vfldz(dbgi, irg, block);
+ } else {
+ return ia32_new_Unknown_xmm(env_cg);
+ }
#endif
} else if (mode_needs_gp_reg(mode)) {
return ia32_new_Unknown_gp(env_cg);
}
/**
-* Transforms a lowered Store into a "real" one.
-*/
+ * Transforms a lowered Store into a "real" one.
+ */
static ir_node *gen_lowered_Store(ir_node *node, construct_store_func func)
{
ir_node *block = be_transform_node(get_nodes_block(node));
return gen_unop(node, get_unop_op(node), new_rd_ia32_##op); \
}
-#define GEN_LOWERED_SHIFT_OP(op) \
- static ir_node *gen_ia32_l_##op(ir_node *node) {\
- return gen_shift_binop(node, get_binop_left(node), \
- get_binop_right(node), new_rd_ia32_##op); \
+#define GEN_LOWERED_SHIFT_OP(l_op, op) \
+ static ir_node *gen_ia32_##l_op(ir_node *node) { \
+ return gen_shift_binop(node, get_irn_n(node, 0), \
+ get_irn_n(node, 1), new_rd_ia32_##op); \
}
#define GEN_LOWERED_LOAD(op) \
GEN_LOWERED_LOAD(vfild)
GEN_LOWERED_LOAD(Load)
-// GEN_LOWERED_STORE(vfist) TODO
GEN_LOWERED_STORE(Store)
+/**
+ * Transforms a l_vfist into a "real" vfist node.
+ *
+ * @param env The transformation environment
+ * @return the created ia32 vfist node
+ */
+static ir_node *gen_ia32_l_vfist(ir_node *node) {
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ ir_node *ptr = get_irn_n(node, 0);
+ ir_node *new_ptr = be_transform_node(ptr);
+ ir_node *val = get_irn_n(node, 1);
+ ir_node *new_val = be_transform_node(val);
+ ir_node *mem = get_irn_n(node, 2);
+ ir_node *new_mem = be_transform_node(mem);
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *noreg = ia32_new_NoReg_gp(env_cg);
+ ir_mode *mode = get_ia32_ls_mode(node);
+ ir_node *trunc_mode = ia32_new_Fpu_truncate(env_cg);
+ ir_node *new_op;
+ long am_offs;
+ ia32_am_flavour_t am_flav = ia32_B;
+
+ new_op = new_rd_ia32_vfist(dbgi, irg, block, new_ptr, noreg, new_val,
+ trunc_mode, new_mem);
+
+ if ((am_offs = get_ia32_am_offs_int(node)) != 0) {
+ am_flav |= ia32_O;
+ add_ia32_am_offs_int(new_op, am_offs);
+ }
+
+ set_ia32_op_type(new_op, ia32_AddrModeD);
+ set_ia32_am_flavour(new_op, am_flav);
+ set_ia32_ls_mode(new_op, mode);
+ set_ia32_frame_ent(new_op, get_ia32_frame_ent(node));
+ set_ia32_use_frame(new_op);
+
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
+
+ return new_op;
+}
+
+/**
+ * Transforms a l_vfdiv into a "real" vfdiv node.
+ *
+ * @param env The transformation environment
+ * @return the created ia32 vfdiv node
+ */
static ir_node *gen_ia32_l_vfdiv(ir_node *node) {
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *left = get_binop_left(node);
return muls;
}
-GEN_LOWERED_SHIFT_OP(Shl)
-GEN_LOWERED_SHIFT_OP(Shr)
-GEN_LOWERED_SHIFT_OP(Sar)
+GEN_LOWERED_SHIFT_OP(l_ShlDep, Shl)
+GEN_LOWERED_SHIFT_OP(l_ShrDep, Shr)
+GEN_LOWERED_SHIFT_OP(l_Sar, Sar)
+GEN_LOWERED_SHIFT_OP(l_SarDep, Sar)
/**
* Transforms a l_ShlD/l_ShrD into a ShlD/ShrD. Those nodes have 3 data inputs:
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *new_op1 = be_transform_node(op1);
ir_node *new_op2 = be_transform_node(op2);
- ir_node *new_count = be_transform_node(count);
ir_node *new_op = NULL;
+ ir_node *new_count = be_transform_node(count);
ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *noreg = ia32_new_NoReg_gp(env_cg);
* Transform the Projs from a be_Call.
*/
static ir_node *gen_Proj_be_Call(ir_node *node) {
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *call = get_Proj_pred(node);
- ir_node *new_call = be_transform_node(call);
- ir_graph *irg = current_ir_graph;
- dbg_info *dbgi = get_irn_dbg_info(node);
- long proj = get_Proj_proj(node);
- ir_mode *mode = get_irn_mode(node);
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ ir_node *call = get_Proj_pred(node);
+ ir_node *new_call = be_transform_node(call);
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_type *method_type = be_Call_get_type(call);
+ int n_res = get_method_n_ress(method_type);
+ long proj = get_Proj_proj(node);
+ ir_mode *mode = get_irn_mode(node);
ir_node *sse_load;
const arch_register_class_t *cls;
pn_ia32_xLoad_M);
}
}
- if (proj == pn_be_Call_first_res && mode_is_float(mode) && USE_SSE2(env_cg)) {
+ if (USE_SSE2(env_cg) && proj >= pn_be_Call_first_res
+ && proj < (pn_be_Call_first_res + n_res) && mode_is_float(mode)
+ && USE_SSE2(env_cg)) {
ir_node *fstp;
ir_node *frame = get_irg_frame(irg);
ir_node *noreg = ia32_new_NoReg_gp(env_cg);
pn_be_Call_first_res);
/* store st(0) onto stack */
- fstp = new_rd_ia32_vfst(dbgi, irg, block, frame, noreg, call_mem,
- call_res, mode);
+ fstp = new_rd_ia32_vfst(dbgi, irg, block, frame, noreg, call_res,
+ call_mem, mode);
set_ia32_op_type(fstp, ia32_AddrModeD);
set_ia32_use_frame(fstp);
set_ia32_am_flavour(fstp, ia32_am_B);
/* transform call modes */
if (mode_is_data(mode)) {
- cls = arch_get_irn_reg_class(env_cg->arch_env, node, -1);
+ cls = arch_get_irn_reg_class(env_cg->arch_env, node, -1);
mode = cls->mode;
}
ir_node *pred = get_Proj_pred(node);
long proj = get_Proj_proj(node);
- if (is_Store(pred) || be_is_FrameStore(pred)) {
+ if (is_Store(pred)) {
if (proj == pn_Store_M) {
return be_transform_node(pred);
} else {
assert(0);
return new_r_Bad(irg);
}
- } else if (is_Load(pred) || be_is_FrameLoad(pred)) {
+ } else if (is_Load(pred)) {
return gen_Proj_Load(node);
} else if (is_Div(pred) || is_Mod(pred) || is_DivMod(pred)) {
return gen_Proj_DivMod(node);
GEN(ia32_l_Mul);
GEN(ia32_l_Xor);
GEN(ia32_l_IMul);
- GEN(ia32_l_Shl);
- GEN(ia32_l_Shr);
+ GEN(ia32_l_ShlDep);
+ GEN(ia32_l_ShrDep);
GEN(ia32_l_Sar);
+ GEN(ia32_l_SarDep);
GEN(ia32_l_ShlD);
GEN(ia32_l_ShrD);
GEN(ia32_l_vfdiv);
GEN(ia32_l_vfsub);
GEN(ia32_l_vfild);
GEN(ia32_l_Load);
- /* GEN(ia32_l_vfist); TODO */
+ GEN(ia32_l_vfist);
GEN(ia32_l_Store);
GEN(ia32_l_X87toSSE);
GEN(ia32_l_SSEtoX87);
GEN(be_FrameAddr);
//GEN(be_Call);
GEN(be_Return);
- GEN(be_FrameLoad);
- GEN(be_FrameStore);
- GEN(be_StackParam);
GEN(be_AddSP);
GEN(be_SubSP);
GEN(be_Copy);
get_fpcw();
}
+/**
+ * Walker, checks if all ia32 nodes producing more than one result have
+ * its Projs, other wise creates new projs and keep them using a be_Keep node.
+ */
static
void add_missing_keep_walker(ir_node *node, void *data)
{
}
/**
- * Adds missing keeps to nodes
+ * Adds missing keeps to nodes. Adds missing Proj nodes for unused outputs
+ * and keeps them.
*/
static
void add_missing_keeps(ia32_code_gen_t *cg)
projects / libfirm / blobdiff