ir_node *block, ir_node *base, ir_node *index, ir_node *op1,
ir_node *op2, ir_node *mem);
+typedef ir_node *construct_binop_float_func(dbg_info *db, ir_graph *irg,
+ ir_node *block, ir_node *base, ir_node *index, ir_node *op1,
+ ir_node *op2, ir_node *mem, ir_node *fpcw);
+
typedef ir_node *construct_unop_func(dbg_info *db, ir_graph *irg,
ir_node *block, ir_node *base, ir_node *index, ir_node *op,
ir_node *mem);
char buf[64];
snprintf(buf, sizeof(buf), "prim_type_%s", get_mode_name(mode));
res = new_type_primitive(new_id_from_str(buf), mode);
+ set_type_alignment_bytes(res, 16);
pmap_insert(types, mode, res);
}
else
} else {
floatent = get_entity_for_tv(env_cg, node);
- load = new_rd_ia32_vfld(dbgi, irg, block, noreg, noreg, nomem);
- set_ia32_am_support(load, ia32_am_Source);
+ load = new_rd_ia32_vfld(dbgi, irg, block, noreg, noreg, nomem, mode);
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_flavour(load, ia32_am_N);
set_ia32_am_sc(load, floatent);
floatent = get_entity_for_tv(env_cg, node);
load = new_rd_ia32_xLoad(dbgi, irg, block, noreg, noreg, nomem);
- set_ia32_am_support(load, ia32_am_Source);
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_flavour(load, ia32_am_N);
set_ia32_am_sc(load, floatent);
cnst = new_rd_ia32_xConst(dbgi, irg, block);
else
cnst = new_rd_ia32_vfConst(dbgi, irg, block);
- set_ia32_ls_mode(cnst, mode);
+ //set_ia32_ls_mode(cnst, mode);
+ set_ia32_ls_mode(cnst, mode_E);
} else {
cnst = new_rd_ia32_Const(dbgi, irg, block);
}
return cnst;
}
-#if 0
-/**
- * SSE convert of an integer node into a floating point node.
- */
-static ir_node *gen_sse_conv_int2float(ia32_code_gen_t *cg, dbg_info *dbgi,
- ir_graph *irg, ir_node *block,
- ir_node *in, ir_node *old_node, ir_mode *tgt_mode)
-{
- ir_node *noreg = ia32_new_NoReg_gp(cg);
- ir_node *nomem = new_rd_NoMem(irg);
- ir_node *old_pred = get_Cmp_left(old_node);
- ir_mode *in_mode = get_irn_mode(old_pred);
- int in_bits = get_mode_size_bits(in_mode);
- ir_node *conv = new_rd_ia32_Conv_I2FP(dbgi, irg, block, noreg, noreg, in, nomem);
-
- set_ia32_ls_mode(conv, tgt_mode);
- if (in_bits == 32) {
- set_ia32_am_support(conv, ia32_am_Source);
- }
- SET_IA32_ORIG_NODE(conv, ia32_get_old_node_name(cg, old_node));
-
- return conv;
-}
-
-/**
- * SSE convert of an float node into a double node.
- */
-static ir_node *gen_sse_conv_f2d(ia32_code_gen_t *cg, dbg_info *dbgi,
- ir_graph *irg, ir_node *block,
- ir_node *in, ir_node *old_node)
-{
- ir_node *noreg = ia32_new_NoReg_gp(cg);
- ir_node *nomem = new_rd_NoMem(irg);
- ir_node *conv = new_rd_ia32_Conv_FP2FP(dbgi, irg, block, noreg, noreg, in, nomem);
-
- set_ia32_am_support(conv, ia32_am_Source);
- set_ia32_ls_mode(conv, mode_xmm);
- SET_IA32_ORIG_NODE(conv, ia32_get_old_node_name(cg, old_node));
-
- return conv;
-}
-#endif
-
/* Generates an entity for a known FP const (used for FP Neg + Abs) */
ir_entity *ia32_gen_fp_known_const(ia32_known_const_t kct) {
static const struct {
}
clear_ia32_commutative(node);
- set_ia32_am_support(node, get_ia32_am_support(node) & ~ia32_am_Source);
+ set_ia32_am_support(node, get_ia32_am_support(node) & ~ia32_am_Source,
+ get_ia32_am_arity(node));
}
/**
new_node = func(dbgi, irg, block, noreg_gp, noreg_gp, new_op1, new_op2, nomem);
if (func == new_rd_ia32_IMul) {
- set_ia32_am_support(new_node, ia32_am_Source);
+ set_ia32_am_support(new_node, ia32_am_Source, ia32_am_binary);
} else {
- set_ia32_am_support(new_node, ia32_am_Full);
+ set_ia32_am_support(new_node, ia32_am_Full, ia32_am_binary);
}
SET_IA32_ORIG_NODE(new_node, ia32_get_old_node_name(env_cg, node));
* @param func The node constructor function
* @return The constructed ia32 node.
*/
-static ir_node *gen_binop_float(ir_node *node, ir_node *op1, ir_node *op2,
- construct_binop_func *func)
+static ir_node *gen_binop_sse_float(ir_node *node, ir_node *op1, ir_node *op2,
+ construct_binop_func *func)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *new_op1 = be_transform_node(op1);
ir_node *noreg_gp = ia32_new_NoReg_gp(env_cg);
ir_node *nomem = new_NoMem();
- new_node = func(dbgi, irg, block, noreg_gp, noreg_gp, new_op1, new_op2, nomem);
- set_ia32_am_support(new_node, ia32_am_Source);
+ new_node = func(dbgi, irg, block, noreg_gp, noreg_gp, new_op1, new_op2,
+ nomem);
+ set_ia32_am_support(new_node, ia32_am_Source, ia32_am_binary);
if (is_op_commutative(get_irn_op(node))) {
set_ia32_commutative(new_node);
}
return new_node;
}
+/**
+ * Construct a standard binary operation, set AM and immediate if required.
+ *
+ * @param op1 The first operand
+ * @param op2 The second operand
+ * @param func The node constructor function
+ * @return The constructed ia32 node.
+ */
+static ir_node *gen_binop_x87_float(ir_node *node, ir_node *op1, ir_node *op2,
+ construct_binop_float_func *func)
+{
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ ir_node *new_op1 = be_transform_node(op1);
+ ir_node *new_op2 = be_transform_node(op2);
+ ir_node *new_node = NULL;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_graph *irg = current_ir_graph;
+ ir_mode *mode = get_irn_mode(node);
+ ir_node *noreg_gp = ia32_new_NoReg_gp(env_cg);
+ ir_node *nomem = new_NoMem();
+ ir_node *fpcw = be_abi_get_ignore_irn(env_cg->birg->abi,
+ &ia32_fp_cw_regs[REG_FPCW]);
+
+ new_node = func(dbgi, irg, block, noreg_gp, noreg_gp, new_op1, new_op2,
+ nomem, fpcw);
+ set_ia32_am_support(new_node, ia32_am_Source, ia32_am_binary);
+ if (is_op_commutative(get_irn_op(node))) {
+ set_ia32_commutative(new_node);
+ }
+ if (USE_SSE2(env_cg)) {
+ set_ia32_ls_mode(new_node, mode);
+ }
+
+ SET_IA32_ORIG_NODE(new_node, ia32_get_old_node_name(env_cg, node));
+
+ return new_node;
+}
/**
* Construct a shift/rotate binary operation, sets AM and immediate if required.
}
/* set AM support */
- set_ia32_am_support(new_op, ia32_am_Dest);
+ set_ia32_am_support(new_op, ia32_am_Dest, ia32_am_binary);
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
new_node = func(dbgi, irg, block, noreg, noreg, new_op, nomem);
DB((dbg, LEVEL_1, "INT unop ..."));
- set_ia32_am_support(new_node, ia32_am_Dest);
+ set_ia32_am_support(new_node, ia32_am_Dest, ia32_am_unary);
SET_IA32_ORIG_NODE(new_node, ia32_get_old_node_name(env_cg, node));
if (mode_is_float(mode)) {
FP_USED(env_cg);
if (USE_SSE2(env_cg))
- return gen_binop_float(node, op1, op2, new_rd_ia32_xAdd);
+ return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xAdd);
else
- return gen_binop_float(node, op1, op2, new_rd_ia32_vfadd);
+ return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfadd);
}
/* integer ADD */
new_op = new_rd_ia32_Lea(dbgi, irg, block, new_op1, noreg);
set_ia32_am_sc(new_op, get_ia32_Immop_symconst(new_op2));
set_ia32_am_flavour(new_op, ia32_am_B);
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
DBG_OPT_LEA3(new_op1, new_op2, node, new_op);
set_ia32_am_sc(new_op, get_ia32_Immop_symconst(new_op1));
add_ia32_am_offs_int(new_op, offs);
set_ia32_am_flavour(new_op, ia32_am_OB);
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
} else if (tp2 == ia32_ImmSymConst) {
tarval *tv = get_ia32_Immop_tarval(new_op1);
add_ia32_am_offs_int(new_op, offs);
set_ia32_am_sc(new_op, get_ia32_Immop_symconst(new_op2));
set_ia32_am_flavour(new_op, ia32_am_OB);
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
} else {
tarval *tv1 = get_ia32_Immop_tarval(new_op1);
new_op = new_rd_ia32_Add(dbgi, irg, block, noreg, noreg, new_op1, new_op2, nomem);
/* set AM support */
- set_ia32_am_support(new_op, ia32_am_Full);
+ set_ia32_am_support(new_op, ia32_am_Full, ia32_am_binary);
set_ia32_commutative(new_op);
fold_immediate(new_op, 2, 3);
res = new_rd_ia32_Mul(dbgi, irg, block, noreg, noreg, new_op1, new_op2, new_NoMem());
set_ia32_commutative(res);
- set_ia32_am_support(res, ia32_am_Source);
+ set_ia32_am_support(res, ia32_am_Source | ia32_am_binary);
/* imediates are not supported, so no fold_immediate */
proj_EAX = new_rd_Proj(dbgi, irg, block, res, mode_Iu, pn_EAX);
if (mode_is_float(mode)) {
FP_USED(env_cg);
if (USE_SSE2(env_cg))
- return gen_binop_float(node, op1, op2, new_rd_ia32_xMul);
+ return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xMul);
else
- return gen_binop_float(node, op1, op2, new_rd_ia32_vfmul);
+ return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfmul);
}
/*
}
set_ia32_commutative(res);
- set_ia32_am_support(res, ia32_am_Source);
-
- set_ia32_am_support(res, ia32_am_Source);
+ set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);
proj_EAX = new_rd_Proj(dbgi, irg, block, res, mode_Iu, pn_EAX);
proj_EDX = new_rd_Proj(dbgi, irg, block, res, mode_Iu, pn_EDX);
if (mode_is_float(mode)) {
FP_USED(env_cg);
if (USE_SSE2(env_cg)) {
- new_op = gen_binop_float(node, new_op1, new_op2, new_rd_ia32_xMax);
+ new_op = gen_binop_sse_float(node, new_op1, new_op2, new_rd_ia32_xMax);
} else {
panic("Can't create Max node");
}
if (mode_is_float(mode)) {
FP_USED(env_cg);
if (USE_SSE2(env_cg)) {
- new_op = gen_binop_float(node, op1, op2, new_rd_ia32_xMin);
+ new_op = gen_binop_sse_float(node, op1, op2, new_rd_ia32_xMin);
} else {
panic("can't create Min node");
}
if (mode_is_float(mode)) {
FP_USED(env_cg);
if (USE_SSE2(env_cg))
- return gen_binop_float(node, op1, op2, new_rd_ia32_xSub);
+ return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xSub);
else
- return gen_binop_float(node, op1, op2, new_rd_ia32_vfsub);
+ return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfsub);
}
/* integer SUB */
set_ia32_am_sc(new_op, get_ia32_Immop_symconst(new_op1));
add_ia32_am_offs_int(new_op, -offs);
set_ia32_am_flavour(new_op, ia32_am_OB);
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
} else if (tp2 == ia32_ImmSymConst) {
tarval *tv = get_ia32_Immop_tarval(new_op1);
set_ia32_am_sc(new_op, get_ia32_Immop_symconst(new_op2));
set_ia32_am_sc_sign(new_op);
set_ia32_am_flavour(new_op, ia32_am_OB);
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
} else {
tarval *tv1 = get_ia32_Immop_tarval(new_op1);
new_op = new_rd_ia32_Sub(dbgi, irg, block, noreg, noreg, new_op1, new_op2, nomem);
/* set AM support */
- set_ia32_am_support(new_op, ia32_am_Full);
+ set_ia32_am_support(new_op, ia32_am_Full, ia32_am_binary);
fold_immediate(new_op, 2, 3);
}
set_ia32_exc_label(res, has_exc);
+ set_irn_pinned(res, get_irn_pinned(node));
/* Matze: code can't handle this at the moment... */
#if 0
/* set AM support */
- set_ia32_am_support(res, ia32_am_Source);
+ set_ia32_am_support(res, ia32_am_Source | ia32_am_binary);
#endif
/* check, which Proj-Keep, we need to add */
ir_mode *mode = get_irn_mode(op1);
if (is_ia32_xConst(new_op2)) {
new_op = new_rd_ia32_xDiv(dbgi, irg, block, noreg, noreg, new_op1, noreg, nomem);
- set_ia32_am_support(new_op, ia32_am_None);
+ set_ia32_am_support(new_op, ia32_am_None, ia32_am_arity_none);
copy_ia32_Immop_attr(new_op, new_op2);
} else {
new_op = new_rd_ia32_xDiv(dbgi, irg, block, noreg, noreg, new_op1, new_op2, nomem);
// Matze: disabled for now, spillslot coalescer fails
- //set_ia32_am_support(new_op, ia32_am_Source);
+ //set_ia32_am_support(new_op, ia32_am_Source | ia32_am_binary);
}
set_ia32_ls_mode(new_op, mode);
} else {
- new_op = new_rd_ia32_vfdiv(dbgi, irg, block, noreg, noreg, new_op1, new_op2, nomem);
+ ir_node *fpcw = be_abi_get_ignore_irn(env_cg->birg->abi,
+ &ia32_fp_cw_regs[REG_FPCW]);
+ new_op = new_rd_ia32_vfdiv(dbgi, irg, block, noreg, noreg, new_op1,
+ new_op2, nomem, fpcw);
// Matze: disabled for now (spillslot coalescer fails)
- //set_ia32_am_support(new_op, ia32_am_Source);
+ //set_ia32_am_support(new_op, ia32_am_Source | ia32_am_binary);
}
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
return new_op;
new_op = new_rd_ia32_xLoad(dbgi, irg, block, lptr, noreg, new_mem);
res_mode = mode_xmm;
} else {
- new_op = new_rd_ia32_vfld(dbgi, irg, block, lptr, noreg, new_mem);
+ new_op = new_rd_ia32_vfld(dbgi, irg, block, lptr, noreg, new_mem, mode);
res_mode = mode_vfp;
}
} else {
}
set_irn_pinned(new_op, get_irn_pinned(node));
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
set_ia32_am_flavour(new_op, am_flav);
set_ia32_ls_mode(new_op, mode);
if (USE_SSE2(env_cg)) {
new_op = new_rd_ia32_xStore(dbgi, irg, block, sptr, noreg, sval, new_mem);
} else {
- new_op = new_rd_ia32_vfst(dbgi, irg, block, sptr, noreg, sval, new_mem);
+ new_op = new_rd_ia32_vfst(dbgi, irg, block, sptr, noreg, sval, new_mem, mode);
}
} else if (get_mode_size_bits(mode) == 8) {
new_op = new_rd_ia32_Store8Bit(dbgi, irg, block, sptr, noreg, sval, new_mem);
}
set_irn_pinned(new_op, get_irn_pinned(node));
- set_ia32_am_support(new_op, ia32_am_Dest);
set_ia32_op_type(new_op, ia32_AddrModeD);
set_ia32_am_flavour(new_op, am_flav);
set_ia32_ls_mode(new_op, mode);
// is not able to detect the mode of the spilled value
// moreover, the lea optimize phase freely exchanges left/right
// without updating the pnc
- //set_ia32_am_support(res, ia32_am_Source);
+ //set_ia32_am_support(res, ia32_am_Source | ia32_am_binary);
}
else {
/* determine the smallest switch case value */
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env_cg, node));
add_ia32_am_offs_int(res, -switch_min);
set_ia32_am_flavour(res, ia32_am_OB);
- set_ia32_am_support(res, ia32_am_Source);
set_ia32_op_type(res, ia32_AddrModeS);
}
}
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
return new_op;
-
-#if 0
- if (mode_is_float(mode)) {
- if(mode_is_float(cmp_mode)) {
- pnc |= ia32_pn_Cmp_Unsigned;
- }
-
- /* floating point psi */
- FP_USED(cg);
-
- /* 1st case: compare operands are float too */
- if (USE_SSE2(cg)) {
- /* psi(cmp(a, b), t, f) can be done as: */
- /* tmp = cmp a, b */
- /* tmp2 = t and tmp */
- /* tmp3 = f and not tmp */
- /* res = tmp2 or tmp3 */
-
- /* in case the compare operands are int, we move them into xmm register */
- if (! mode_is_float(get_irn_mode(cmp_a))) {
- new_cmp_a = gen_sse_conv_int2float(cg, dbgi, irg, block, new_cmp_a, node, mode_xmm);
- new_cmp_b = gen_sse_conv_int2float(cg, dbgi, irg, block, new_cmp_b, node, mode_xmm);
-
- pnc |= 8; /* transform integer compare to fp compare */
- }
-
- new_op = new_rd_ia32_xCmp(dbgi, irg, block, noreg, noreg, new_cmp_a, new_cmp_b, nomem);
- set_ia32_pncode(new_op, pnc);
- set_ia32_am_support(new_op, ia32_am_Source);
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
-
- and1 = new_rd_ia32_xAnd(dbgi, irg, block, noreg, noreg, new_psi_true, new_op, nomem);
- set_ia32_am_support(and1, ia32_am_None);
- set_ia32_commutative(and1);
- SET_IA32_ORIG_NODE(and1, ia32_get_old_node_name(cg, node));
-
- and2 = new_rd_ia32_xAndNot(dbgi, irg, block, noreg, noreg, new_op, new_psi_default, nomem);
- set_ia32_am_support(and2, ia32_am_None);
- set_ia32_commutative(and2);
- SET_IA32_ORIG_NODE(and2, ia32_get_old_node_name(cg, node));
-
- new_op = new_rd_ia32_xOr(dbgi, irg, block, noreg, noreg, and1, and2, nomem);
- set_ia32_am_support(new_op, ia32_am_None);
- set_ia32_commutative(new_op);
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
- }
- else {
- /* x87 FPU */
- new_op = new_rd_ia32_vfCMov(dbgi, irg, block, new_cmp_a, new_cmp_b, new_psi_true, new_psi_default);
- set_ia32_pncode(new_op, pnc);
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
- }
- }
- else {
- /* integer psi */
- construct_binop_func *set_func = NULL;
- cmov_func_t *cmov_func = NULL;
-
- if (mode_is_float(get_irn_mode(cmp_a))) {
- /* 1st case: compare operands are floats */
- FP_USED(cg);
-
- if (USE_SSE2(cg)) {
- /* SSE FPU */
- set_func = new_rd_ia32_xCmpSet;
- cmov_func = new_rd_ia32_xCmpCMov;
- }
- else {
- /* x87 FPU */
- set_func = new_rd_ia32_vfCmpSet;
- cmov_func = new_rd_ia32_vfCmpCMov;
- }
-
- pnc &= ~0x8; /* fp compare -> int compare */
- }
- else {
- /* 2nd case: compare operand are integer too */
- set_func = new_rd_ia32_CmpSet;
- cmov_func = new_rd_ia32_CmpCMov;
- }
-
- /* check for special case first: And/Or -- Cmp with 0 -- Psi */
- if (is_ia32_Const_0(new_cmp_b) && is_Proj(new_cmp_a) && (is_ia32_And(get_Proj_pred(new_cmp_a)) || is_ia32_Or(get_Proj_pred(new_cmp_a)))) {
- if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) {
- /* first case for SETcc: default is 0, set to 1 iff condition is true */
- new_op = new_rd_ia32_PsiCondSet(dbgi, irg, block, new_cmp_a);
- set_ia32_pncode(new_op, pnc);
- }
- else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) {
- /* second case for SETcc: default is 1, set to 0 iff condition is true: */
- /* we invert condition and set default to 0 */
- new_op = new_rd_ia32_PsiCondSet(dbgi, irg, block, new_cmp_a);
- set_ia32_pncode(new_op, get_inversed_pnc(pnc));
- }
- else {
- /* otherwise: use CMOVcc */
- new_op = new_rd_ia32_PsiCondCMov(dbgi, irg, block, new_cmp_a, new_psi_true, new_psi_default);
- set_ia32_pncode(new_op, pnc);
- }
-
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
- }
- else {
- if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) {
- /* first case for SETcc: default is 0, set to 1 iff condition is true */
- new_op = gen_binop(node, cmp_a, cmp_b, set_func, 0);
- set_ia32_pncode(new_op, pnc);
- set_ia32_am_support(new_op, ia32_am_Source);
- }
- else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) {
- /* second case for SETcc: default is 1, set to 0 iff condition is true: */
- /* we invert condition and set default to 0 */
- new_op = gen_binop(node, cmp_a, cmp_b, set_func, 0);
- set_ia32_pncode(new_op, get_inversed_pnc(pnc));
- set_ia32_am_support(new_op, ia32_am_Source);
- }
- else {
- /* otherwise: use CMOVcc */
- new_op = cmov_func(dbgi, irg, block, new_cmp_a, new_cmp_b, new_psi_true, new_psi_default);
- set_ia32_pncode(new_op, pnc);
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
- }
- }
- }
-#endif
-
- return new_op;
}
set_irn_pinned(fist, op_pin_state_floats);
set_ia32_use_frame(fist);
- set_ia32_am_support(fist, ia32_am_Dest);
set_ia32_op_type(fist, ia32_AddrModeD);
set_ia32_am_flavour(fist, ia32_am_B);
set_ia32_ls_mode(fist, mode_Iu);
set_irn_pinned(load, op_pin_state_floats);
set_ia32_use_frame(load);
- set_ia32_am_support(load, ia32_am_Source);
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_flavour(load, ia32_am_B);
set_ia32_ls_mode(load, mode_Iu);
src_bits = get_mode_size_bits(src_mode);
if (src_bits == 8) {
new_op = new_rd_ia32_Conv_I2I8Bit(dbgi, irg, block, noreg, noreg, new_op, nomem);
- set_ia32_am_support(new_op, ia32_am_Source);
+ set_ia32_am_support(new_op, ia32_am_Source, ia32_am_unary);
set_ia32_ls_mode(new_op, src_mode);
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
} else if (src_bits < 32) {
new_op = new_rd_ia32_Conv_I2I(dbgi, irg, block, noreg, noreg, new_op, nomem);
- set_ia32_am_support(new_op, ia32_am_Source);
+ set_ia32_am_support(new_op, ia32_am_Source, ia32_am_unary);
set_ia32_ls_mode(new_op, src_mode);
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
}
store = new_rd_ia32_Store(dbgi, irg, block, get_irg_frame(irg), noreg, new_op, nomem);
set_ia32_use_frame(store);
- set_ia32_am_support(store, ia32_am_Dest);
set_ia32_op_type(store, ia32_AddrModeD);
set_ia32_am_flavour(store, ia32_am_OB);
set_ia32_ls_mode(store, mode_Iu);
fild = new_rd_ia32_vfild(dbgi, irg, block, get_irg_frame(irg), noreg, store);
set_ia32_use_frame(fild);
- set_ia32_am_support(fild, ia32_am_Source);
set_ia32_op_type(fild, ia32_AddrModeS);
set_ia32_am_flavour(fild, ia32_am_OB);
set_ia32_ls_mode(fild, mode_Iu);
return new_r_Proj(irg, block, fild, mode_vfp, pn_ia32_vfild_res);
}
+static ir_node *create_Strict_conv(ir_mode *src_mode, ir_mode *tgt_mode,
+ ir_node *node)
+{
+ ir_node *block = get_nodes_block(node);
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *noreg = ia32_new_NoReg_gp(env_cg);
+ ir_node *nomem = new_NoMem();
+ int src_bits = get_mode_size_bits(src_mode);
+ int tgt_bits = get_mode_size_bits(tgt_mode);
+ ir_node *frame = get_irg_frame(irg);
+ ir_mode *smaller_mode;
+ ir_node *store, *load;
+ ir_node *res;
+
+ if(src_bits <= tgt_bits)
+ smaller_mode = src_mode;
+ else
+ smaller_mode = tgt_mode;
+
+ store = new_rd_ia32_vfst(dbgi, irg, block, frame, noreg, node, nomem,
+ smaller_mode);
+ set_ia32_use_frame(store);
+ set_ia32_op_type(store, ia32_AddrModeD);
+ set_ia32_am_flavour(store, ia32_am_OB);
+
+ load = new_rd_ia32_vfld(dbgi, irg, block, frame, noreg, store,
+ smaller_mode);
+ set_ia32_use_frame(load);
+ set_ia32_op_type(load, ia32_AddrModeS);
+ set_ia32_am_flavour(load, ia32_am_OB);
+
+ res = new_r_Proj(irg, block, load, mode_E, pn_ia32_vfld_res);
+ return res;
+}
+
/**
* Transforms a Conv node.
*
set_ia32_ls_mode(res, tgt_mode);
} else {
// Matze: TODO what about strict convs?
- DEBUG_ONLY(ir_fprintf(stderr, "Debug warning: strict conv %+F ignored yet\n", node));
+ if(get_Conv_strict(node)) {
+ res = create_Strict_conv(src_mode, tgt_mode, new_op);
+ SET_IA32_ORIG_NODE(get_Proj_pred(res), ia32_get_old_node_name(env_cg, node));
+ return res;
+ }
DB((dbg, LEVEL_1, "killed Conv(float, float) ..."));
return new_op;
}
res = new_rd_ia32_Conv_I2FP(dbgi, irg, block, noreg, noreg, new_op, nomem);
set_ia32_ls_mode(res, tgt_mode);
if(src_bits == 32) {
- set_ia32_am_support(res, ia32_am_Source);
+ set_ia32_am_support(res, ia32_am_Source, ia32_am_unary);
}
} else {
return gen_x87_gp_to_fp(node, src_mode);
res = new_rd_ia32_Conv_I2I(dbgi, irg, block, noreg, noreg, new_op, nomem);
set_ia32_ls_mode(res, smaller_mode);
}
- set_ia32_am_support(res, ia32_am_Source);
+ set_ia32_am_support(res, ia32_am_Source, ia32_am_unary);
}
}
pn_res = pn_ia32_xLoad_res;
proj_mode = mode_xmm;
} else {
- new_op = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, nomem);
+ new_op = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, nomem, load_mode);
pn_res = pn_ia32_vfld_res;
proj_mode = mode_vfp;
}
set_ia32_frame_ent(new_op, ent);
set_ia32_use_frame(new_op);
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
set_ia32_am_flavour(new_op, ia32_am_B);
set_ia32_ls_mode(new_op, load_mode);
res = new_rd_ia32_Lea(dbgi, irg, block, new_op, noreg);
set_ia32_frame_ent(res, arch_get_frame_entity(env_cg->arch_env, node));
- set_ia32_am_support(res, ia32_am_Full);
set_ia32_use_frame(res);
set_ia32_am_flavour(res, ia32_am_OB);
new_op = new_rd_ia32_xLoad(dbgi, irg, block, new_ptr, noreg, new_mem);
}
else {
- new_op = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, new_mem);
+ new_op = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, new_mem, mode);
}
}
else {
set_ia32_frame_ent(new_op, ent);
set_ia32_use_frame(new_op);
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
set_ia32_am_flavour(new_op, ia32_am_B);
set_ia32_ls_mode(new_op, mode);
if (USE_SSE2(env_cg)) {
new_op = new_rd_ia32_xStore(dbgi, irg, block, new_ptr, noreg, new_val, new_mem);
} else {
- new_op = new_rd_ia32_vfst(dbgi, irg, block, new_ptr, noreg, new_val, new_mem);
+ new_op = new_rd_ia32_vfst(dbgi, irg, block, new_ptr, noreg, new_val, new_mem, mode);
}
} else if (get_mode_size_bits(mode) == 8) {
new_op = new_rd_ia32_Store8Bit(dbgi, irg, block, new_ptr, noreg, new_val, new_mem);
set_ia32_frame_ent(new_op, ent);
set_ia32_use_frame(new_op);
- set_ia32_am_support(new_op, ia32_am_Dest);
set_ia32_op_type(new_op, ia32_AddrModeD);
set_ia32_am_flavour(new_op, ia32_am_B);
set_ia32_ls_mode(new_op, mode);
set_ia32_op_type(sse_store, ia32_AddrModeD);
set_ia32_use_frame(sse_store);
set_ia32_am_flavour(sse_store, ia32_am_B);
- set_ia32_am_support(sse_store, ia32_am_Dest);
/* load into st0 */
fld = new_rd_ia32_SetST0(dbgi, irg, block, frame, noreg, sse_store);
set_ia32_op_type(fld, ia32_AddrModeS);
set_ia32_use_frame(fld);
set_ia32_am_flavour(fld, ia32_am_B);
- set_ia32_am_support(fld, ia32_am_Source);
mproj = new_r_Proj(irg, block, fld, mode_M, pn_ia32_SetST0_M);
fld = new_r_Proj(irg, block, fld, mode_vfp, pn_ia32_SetST0_res);
/* ia32 stack grows in reverse direction, make a SubSP */
new_op = new_rd_ia32_SubSP(dbgi, irg, block, noreg, noreg, new_sp, new_sz, nomem);
- set_ia32_am_support(new_op, ia32_am_Source);
+ set_ia32_am_support(new_op, ia32_am_Source, ia32_am_binary);
fold_immediate(new_op, 2, 3);
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
/* ia32 stack grows in reverse direction, make an AddSP */
new_op = new_rd_ia32_AddSP(dbgi, irg, block, noreg, noreg, new_sp, new_sz, nomem);
- set_ia32_am_support(new_op, ia32_am_Source);
+ set_ia32_am_support(new_op, ia32_am_Source, ia32_am_binary);
fold_immediate(new_op, 2, 3);
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
/* all integer operations are on 32bit registers now */
mode = mode_Iu;
} else if(mode_is_float(mode)) {
- assert(mode == mode_D || mode == mode_F);
if (USE_SSE2(env_cg)) {
mode = mode_xmm;
} else {
new_op = func(dbgi, irg, block, new_ptr, noreg, new_mem);
- set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
set_ia32_am_flavour(new_op, ia32_am_OB);
set_ia32_am_offs_int(new_op, 0);
add_ia32_am_offs_int(new_op, am_offs);
}
- set_ia32_am_support(new_op, ia32_am_Dest);
set_ia32_op_type(new_op, ia32_AddrModeD);
set_ia32_am_flavour(new_op, am_flav);
set_ia32_ls_mode(new_op, mode);
}
#define GEN_LOWERED_x87_OP(op) \
- static ir_node *gen_ia32_l_##op(ir_node *node) {\
+ static ir_node *gen_ia32_l_##op(ir_node *node) { \
ir_node *new_op; \
- FORCE_x87(env_cg); \
- new_op = gen_binop_float(node, get_binop_left(node), \
- get_binop_right(node), new_rd_ia32_##op); \
+ FORCE_x87(env_cg); \
+ new_op = gen_binop_x87_float(node, get_binop_left(node), \
+ get_binop_right(node), new_rd_ia32_##op); \
return new_op; \
}
ir_node *noreg = ia32_new_NoReg_gp(env_cg);
ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *fpcw = be_abi_get_ignore_irn(env_cg->birg->abi,
+ &ia32_fp_cw_regs[REG_FPCW]);
ir_node *vfdiv;
- vfdiv = new_rd_ia32_vfdiv(dbgi, irg, block, noreg, noreg, new_left, new_right, new_NoMem());
+ vfdiv = new_rd_ia32_vfdiv(dbgi, irg, block, noreg, noreg, new_left,
+ new_right, new_NoMem(), fpcw);
clear_ia32_commutative(vfdiv);
- set_ia32_am_support(vfdiv, ia32_am_Source);
+ set_ia32_am_support(vfdiv, ia32_am_Source, ia32_am_binary);
fold_immediate(vfdiv, 2, 3);
SET_IA32_ORIG_NODE(vfdiv, ia32_get_old_node_name(env_cg, node));
/* and then skip the result Proj, because all needed Projs are already there. */
ir_node *muls = new_rd_ia32_Mul(dbgi, irg, block, noreg, noreg, new_left, new_right, new_NoMem());
clear_ia32_commutative(muls);
- set_ia32_am_support(muls, ia32_am_Source);
+ set_ia32_am_support(muls, ia32_am_Source, ia32_am_binary);
fold_immediate(muls, 2, 3);
/* check if EAX and EDX proj exist, add missing one */
}
/* set AM support */
- // Matze: node has unsupported format (6inputs)
- //set_ia32_am_support(new_op, ia32_am_Dest);
+ set_ia32_am_support(new_op, ia32_am_Dest, ia32_am_binary);
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
dbgi = get_irn_dbg_info(node);
/* Store x87 -> MEM */
- res = new_rd_ia32_vfst(dbgi, irg, block, new_ptr, noreg, new_val, new_mem);
+ res = new_rd_ia32_vfst(dbgi, irg, block, new_ptr, noreg, new_val, new_mem, get_ia32_ls_mode(node));
set_ia32_frame_ent(res, get_ia32_frame_ent(node));
set_ia32_use_frame(res);
set_ia32_ls_mode(res, get_ia32_ls_mode(node));
- set_ia32_am_support(res, ia32_am_Dest);
set_ia32_am_flavour(res, ia32_B);
set_ia32_op_type(res, ia32_AddrModeD);
set_ia32_frame_ent(res, get_ia32_frame_ent(node));
set_ia32_use_frame(res);
set_ia32_ls_mode(res, get_ia32_ls_mode(node));
- set_ia32_am_support(res, ia32_am_Source);
set_ia32_am_flavour(res, ia32_B);
set_ia32_op_type(res, ia32_AddrModeS);
res = new_rd_Proj(dbgi, irg, block, res, mode_xmm, pn_ia32_xLoad_res);
set_ia32_frame_ent(res, fent);
set_ia32_use_frame(res);
set_ia32_ls_mode(res, lsmode);
- set_ia32_am_support(res, ia32_am_Dest);
set_ia32_am_flavour(res, ia32_B);
set_ia32_op_type(res, ia32_AddrModeD);
mem = res;
}
/* Load MEM -> x87 */
- res = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, new_mem);
+ res = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, new_mem, lsmode);
set_ia32_frame_ent(res, fent);
set_ia32_use_frame(res);
- set_ia32_ls_mode(res, lsmode);
add_ia32_am_offs_int(res, offs);
- set_ia32_am_support(res, ia32_am_Source);
set_ia32_am_flavour(res, ia32_B);
set_ia32_op_type(res, ia32_AddrModeS);
res = new_rd_Proj(dbgi, irg, block, res, mode_vfp, pn_ia32_vfld_res);
set_ia32_op_type(fstp, ia32_AddrModeD);
set_ia32_use_frame(fstp);
set_ia32_am_flavour(fstp, ia32_am_B);
- set_ia32_am_support(fstp, ia32_am_Dest);
/* load into SSE register */
sse_load = new_rd_ia32_xLoad(dbgi, irg, block, frame, noreg, fstp);
set_ia32_op_type(sse_load, ia32_AddrModeS);
set_ia32_use_frame(sse_load);
set_ia32_am_flavour(sse_load, ia32_am_B);
- set_ia32_am_support(sse_load, ia32_am_Source);
sse_load = new_rd_Proj(dbgi, irg, block, sse_load, mode_xmm, pn_ia32_xLoad_res);
}
/* TODO:
* (a == b) -> !(a ^ b)
- * (a < 0) -> (a & 0x80000000)
- * (a <= 0) -> !(a & 0x7fffffff)
- * (a > 0) -> (a & 0x7fffffff)
- * (a >= 0) -> !(a & 0x80000000)
+ * (a < 0) -> (a & 0x80000000) oder a >> 31
+ * (a >= 0) -> (a >> 31) ^ 1
*/
if(!mode_is_signed(cmp_mode)) {
/* we exchange the ProjX with a jump */
block = be_transform_node(block);
jump = new_rd_Jmp(dbgi, irg, block);
- ir_fprintf(stderr, "created jump: %+F\n", jump);
return jump;
}
if (node == be_get_old_anchor(anchor_tls)) {
projects / libfirm / blobdiff