#include "irnode_t.h"
#include "irgraph_t.h"
#include "irmode_t.h"
+#include "iropt_t.h"
+#include "irop_t.h"
+#include "irprog_t.h"
#include "irgmod.h"
#include "iredges.h"
#include "irvrfy.h"
#include "ircons.h"
#include "dbginfo.h"
-#include "iropt_t.h"
#include "debug.h"
#include "../benode_t.h"
}
-#undef is_cnst
-#define is_cnst(op) (is_ia32_Const(op) || is_ia32_fConst(op))
/* determine if one operator is an Imm */
static ir_node *get_immediate_op(ir_node *op1, ir_node *op2) {
if (op1)
- return is_cnst(op1) ? op1 : (is_cnst(op2) ? op2 : NULL);
- else return is_cnst(op2) ? op2 : NULL;
+ return is_ia32_Cnst(op1) ? op1 : (is_ia32_Cnst(op2) ? op2 : NULL);
+ else return is_ia32_Cnst(op2) ? op2 : NULL;
}
/* determine if one operator is not an Imm */
static ir_node *get_expr_op(ir_node *op1, ir_node *op2) {
- return !is_cnst(op1) ? op1 : (!is_cnst(op2) ? op2 : NULL);
+ return !is_ia32_Cnst(op1) ? op1 : (!is_ia32_Cnst(op2) ? op2 : NULL);
}
ir_node *expr_op, *imm_op;
- /* check if it's an operation with immediate */
- if (is_op_commutative(get_irn_op(env->irn))) {
+ /* Check if immediate optimization is on and */
+ /* if it's an operation with immediate. */
+ if (! env->cg->opt.immops) {
+ expr_op = op1;
+ imm_op = NULL;
+ }
+ else if (is_op_commutative(get_irn_op(env->irn))) {
imm_op = get_immediate_op(op1, op2);
expr_op = get_expr_op(op1, op2);
}
}
}
+ if (is_op_commutative(get_irn_op(env->irn))) {
+ set_ia32_commutative(new_op);
+ }
+
return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
}
assert(! mode_is_float(mode) && "Shift/Rotate with float not supported");
- imm_op = get_immediate_op(NULL, op2);
+ /* Check if immediate optimization is on and */
+ /* if it's an operation with immediate. */
+ imm_op = env->cg->opt.immops ? get_immediate_op(NULL, op2) : NULL;
expr_op = get_expr_op(op1, op2);
assert((expr_op || imm_op) && "invalid operands");
int normal_add = 1;
tarval_classification_t class_tv, class_negtv;
- /* const_op: tarval or SymConst? */
- if (tv) {
+ /* try to optimize to inc/dec */
+ if (env->cg->opt.incdec && tv) {
/* optimize tarvals */
class_tv = classify_tarval(tv);
class_negtv = classify_tarval(tarval_neg(tv));
ir_node *nomem = new_NoMem();
ir_node *expr_op, *imm_op;
- imm_op = get_immediate_op(op1, op2);
+ /* Check if immediate optimization is on and */
+ /* if it's an operation with immediate. */
+ imm_op = env->cg->opt.immops ? get_immediate_op(op1, op2) : NULL;
expr_op = get_expr_op(op1, op2);
assert((expr_op || imm_op) && "invalid operands");
int normal_sub = 1;
tarval_classification_t class_tv, class_negtv;
- /* const_op: tarval or SymConst? */
- if (tv) {
+ /* try to optimize to inc/dec */
+ if (env->cg->opt.incdec && tv) {
/* optimize tarvals */
class_tv = classify_tarval(tv);
class_negtv = classify_tarval(tarval_neg(tv));
ir_node *nomem = new_NoMem();
ir_node *expr_op, *imm_op;
- imm_op = get_immediate_op(NULL, op2);
+ /* Check if immediate optimization is on and */
+ /* if it's an operation with immediate. */
+ imm_op = env->cg->opt.immops ? get_immediate_op(NULL, op2) : NULL;
expr_op = get_expr_op(op1, op2);
assert((expr_op || imm_op) && "invalid operands");
}
set_ia32_am_support(new_op, ia32_am_Source);
+ set_ia32_op_type(new_op, ia32_AddrModeS);
+ set_ia32_am_flavour(new_op, ia32_B);
set_ia32_ls_mode(new_op, get_Load_mode(node));
return new_op;
static ir_node *gen_Store(ia32_transform_env_t *env) {
ir_node *node = env->irn;
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
+ ir_node *val = get_Store_value(node);
+ ir_node *ptr = get_Store_ptr(node);
+ ir_node *mem = get_Store_mem(node);
+ ir_node *sval = val;
ir_node *new_op;
+ /* in case of storing a const -> make it an attribute */
+ if (is_ia32_Cnst(val)) {
+ sval = noreg;
+ }
+
if (mode_is_float(env->mode)) {
- new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, get_Store_ptr(node), noreg, get_Store_value(node), get_Store_mem(node), env->mode);
+ new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
}
else {
- new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, get_Store_ptr(node), noreg, get_Store_value(node), get_Store_mem(node), env->mode);
+ new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
+ }
+
+ /* stored const is an attribute (saves a register) */
+ if (is_ia32_Cnst(val)) {
+ set_ia32_Immop_attr(new_op, val);
}
set_ia32_am_support(new_op, ia32_am_Dest);
- set_ia32_ls_mode(new_op, get_irn_mode(get_Store_value(node)));
+ set_ia32_op_type(new_op, ia32_AddrModeD);
+ set_ia32_am_flavour(new_op, ia32_B);
+ set_ia32_ls_mode(new_op, get_irn_mode(val));
return new_op;
}
cmp_b = get_Cmp_right(pred);
/* check if we can use a CondJmp with immediate */
- cnst = get_immediate_op(cmp_a, cmp_b);
+ cnst = env->cg->opt.immops ? get_immediate_op(cmp_a, cmp_b) : NULL;
expr = get_expr_op(cmp_a, cmp_b);
if (cnst && expr) {
}
set_ia32_pncode(res, get_Proj_proj(sel));
+ set_ia32_am_support(res, ia32_am_Source);
}
else {
- res = new_rd_ia32_SwitchJmp(dbg, irg, block, noreg, noreg, sel, nomem, mode_T);
+ res = new_rd_ia32_SwitchJmp(dbg, irg, block, sel, mode_T);
set_ia32_pncode(res, get_Cond_defaultProj(node));
}
/* If we have to copy more than 16 bytes, we use REP MOVSx and */
/* then we need the size explicitly in ECX. */
- if (size >= 16) {
+ if (size >= 16 * 4) {
rem = size & 0x3; /* size % 4 */
size >>= 2;
* @return The transformed node.
*/
static ir_node *gen_Mux(ia32_transform_env_t *env) {
- ir_node *node = env->irn;
+ ir_node *node = env->irn;
return new_rd_ia32_CMov(env->dbg, env->irg, env->block,
get_Mux_sel(node), get_Mux_false(node), get_Mux_true(node), env->mode);
+/********************************************
+ * _ _
+ * | | | |
+ * | |__ ___ _ __ ___ __| | ___ ___
+ * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
+ * | |_) | __/ | | | (_) | (_| | __/\__ \
+ * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
+ *
+ ********************************************/
+
+static ir_node *gen_FrameAddr(ia32_transform_env_t *env) {
+ ir_node *new_op = NULL;
+ ir_node *node = env->irn;
+ ir_node *op = get_irn_n(node, 0);
+ ir_node *noreg = ia32_new_NoReg_gp(env->cg);
+ ir_node *nomem = new_rd_NoMem(env->irg);
+
+ new_op = new_rd_ia32_Add(env->dbg, env->irg, env->block, noreg, noreg, op, noreg, nomem, mode_T);
+ set_ia32_frame_ent(new_op, be_get_frame_entity(node));
+ set_ia32_am_support(new_op, ia32_am_Full);
+ set_ia32_use_frame(new_op);
+
+ return new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
+}
+
+static ir_node *gen_FrameLoad(ia32_transform_env_t *env) {
+ ir_node *new_op = NULL;
+
+ return new_op;
+}
+
+static ir_node *gen_FrameStore(ia32_transform_env_t *env) {
+ ir_node *new_op = NULL;
+
+ return new_op;
+}
+
+
+
/*********************************************************
* _ _ _
* (_) | | (_)
*
*********************************************************/
-
-
/**
* Transforms the given firm node (and maybe some other related nodes)
* into one or more assembler nodes.
#define GEN(a) case iro_##a: asm_node = gen_##a(&tenv); break
#define IGN(a) case iro_##a: break
#define BAD(a) case iro_##a: goto bad
+#define OTHER_BIN(a) \
+ if (get_irn_op(node) == get_op_##a()) { \
+ asm_node = gen_##a(&tenv, get_irn_n(node, 0), get_irn_n(node, 1)); \
+ break; \
+ }
+#define BE_GEN(a) \
+ if (be_is_##a(node)) { \
+ asm_node = gen_##a(&tenv); \
+ break; \
+ }
DBG((tenv.mod, LEVEL_1, "check %+F ... ", node));
IGN(Break);
IGN(Cmp);
IGN(Unknown);
+
/* constant transformation happens earlier */
IGN(Const);
IGN(SymConst);
BAD(EndExcept);
default:
- if (get_irn_op(node) == get_op_Max()) {
- asm_node = gen_Max(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
- }
- else if (get_irn_op(node) == get_op_Min()) {
- asm_node = gen_Min(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
- }
- else if (get_irn_op(node) == get_op_Mulh()) {
- asm_node = gen_Mulh(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
- }
+ OTHER_BIN(Max);
+ OTHER_BIN(Min);
+ OTHER_BIN(Mulh);
+
+ BE_GEN(FrameAddr);
+ BE_GEN(FrameLoad);
+ BE_GEN(FrameStore);
break;
bad:
fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
assert(0);
}
+ /* exchange nodes if a new one was generated */
if (asm_node) {
exchange(node, asm_node);
DB((tenv.mod, LEVEL_1, "created node %+F[%p]\n", asm_node, asm_node));
else {
DB((tenv.mod, LEVEL_1, "ignored\n"));
}
+
+#undef UNOP
+#undef BINOP
+#undef GEN
+#undef IGN
+#undef BAD
+#undef OTHER_BIN
+#undef BE_GEN
}
projects / libfirm / blobdiff