static ia32_code_gen_t *env_cg = NULL;
static ir_node *initial_fpcw = NULL;
static heights_t *heights = NULL;
+static transform_config_t transform_config;
extern ir_op *get_op_Mulh(void);
/**
* Get an atomic entity that is initialized with a tarval
*/
-static ir_entity *ia32_get_entity_for_tv(ia32_isa_t *isa, ir_node *cnst)
+static ir_entity *create_float_const_entity(ir_node *cnst)
{
- tarval *tv = get_Const_tarval(cnst);
- pmap_entry *e = pmap_find(isa->tv_ent, tv);
+ ia32_isa_t *isa = env_cg->isa;
+ tarval *tv = get_Const_tarval(cnst);
+ pmap_entry *e = pmap_find(isa->tv_ent, tv);
ir_entity *res;
ir_graph *rem;
return is_Const(node) && is_Const_all_one(node);
}
+/**
+ * returns true if constant can be created with a simple float command
+ */
+static int is_simple_x87_Const(ir_node *node)
+{
+ tarval *tv = get_Const_tarval(node);
+
+ if(tarval_is_null(tv) || tarval_is_one(tv))
+ return 1;
+
+ /* TODO: match all the other float constants */
+ return 0;
+}
+
/**
* Transforms a Const.
*/
set_ia32_ls_mode(load, mode);
res = load;
} else {
- floatent = ia32_get_entity_for_tv(env_cg->isa, node);
+ floatent = create_float_const_entity(node);
load = new_rd_ia32_xLoad(dbgi, irg, block, noreg, noreg, nomem,
mode);
load = new_rd_ia32_vfld1(dbgi, irg, block);
res = load;
} else {
- floatent = ia32_get_entity_for_tv(env_cg->isa, node);
+ floatent = create_float_const_entity(node);
load = new_rd_ia32_vfld(dbgi, irg, block, noreg, noreg, nomem, mode);
set_ia32_op_type(load, ia32_AddrModeS);
cnst = new_rd_ia32_Const(dbgi, irg, block, NULL, 0, val);
SET_IA32_ORIG_NODE(cnst, ia32_get_old_node_name(env_cg, node));
- if(val == 0) {
- set_ia32_flags(cnst,
- get_ia32_flags(cnst) | arch_irn_flags_modify_flags);
- }
/* see above */
if (get_irg_start_block(irg) == block) {
}
#endif /* NDEBUG */
-static int use_source_address_mode(ir_node *block, ir_node *node,
- ir_node *other)
+int use_source_address_mode(ir_node *block, ir_node *node, ir_node *other)
{
- ir_mode *mode;
+ ir_mode *mode = get_irn_mode(node);
ir_node *load;
long pn;
+ /* float constants are always available */
+ if(is_Const(node) && mode_is_float(mode)
+ && !is_simple_x87_Const(node) && get_irn_n_edges(node) == 1) {
+ return 1;
+ }
+
if(!is_Proj(node))
return 0;
load = get_Proj_pred(node);
if(get_irn_n_edges(node) > 1)
return 0;
- mode = get_irn_mode(node);
- if(!mode_needs_gp_reg(mode))
- return 0;
if(other != NULL && get_Load_mode(load) != get_irn_mode(other))
return 0;
static void build_address(ia32_address_mode_t *am, ir_node *node)
{
- ia32_address_t *addr = &am->addr;
- ir_node *load = get_Proj_pred(node);
- ir_node *ptr = get_Load_ptr(load);
- ir_node *mem = get_Load_mem(load);
- ir_node *new_mem = be_transform_node(mem);
+ ir_node *noreg_gp = ia32_new_NoReg_gp(env_cg);
+ ia32_address_t *addr = &am->addr;
+ ir_node *load;
+ ir_node *ptr;
+ ir_node *mem;
+ ir_node *new_mem;
ir_node *base;
ir_node *index;
+ if(is_Const(node)) {
+ ir_entity *entity = create_float_const_entity(node);
+ addr->base = noreg_gp;
+ addr->index = noreg_gp;
+ addr->mem = new_NoMem();
+ addr->symconst_ent = entity;
+ addr->use_frame = 1;
+ am->ls_mode = get_irn_mode(node);
+ return;
+ }
+
+ load = get_Proj_pred(node);
+ ptr = get_Load_ptr(load);
+ mem = get_Load_mem(load);
+ new_mem = be_transform_node(mem);
am->ls_mode = get_Load_mode(load);
am->mem_proj = be_get_Proj_for_pn(load, pn_Load_M);
index = addr->index;
if(base == NULL) {
- base = ia32_new_NoReg_gp(env_cg);
+ base = noreg_gp;
} else {
base = be_transform_node(base);
}
if(index == NULL) {
- index = ia32_new_NoReg_gp(env_cg);
+ index = noreg_gp;
} else {
index = be_transform_node(index);
}
match_commutative = 1 << 0,
match_am_and_immediates = 1 << 1,
match_no_am = 1 << 2,
- match_8_16_bit_am = 1 << 3
+ match_8_16_bit_am = 1 << 3,
+ match_no_immediate = 1 << 4
} match_flags_t;
static void match_arguments(ia32_address_mode_t *am, ir_node *block,
ir_node *noreg_gp = ia32_new_NoReg_gp(env_cg);
ir_node *new_op1;
ir_node *new_op2;
+ ir_mode *mode = get_irn_mode(op2);
int use_am;
int commutative;
int use_am_and_immediates;
+ int use_immediate;
memset(am, 0, sizeof(am[0]));
commutative = (flags & match_commutative) != 0;
use_am_and_immediates = (flags & match_am_and_immediates) != 0;
use_am = ! (flags & match_no_am);
+ use_immediate = !(flags & match_no_immediate);
+
+ assert(op2 != NULL);
+ assert(!commutative || op1 != NULL);
+
if(!(flags & match_8_16_bit_am)
- && get_mode_size_bits(get_irn_mode(op1)) < 32)
+ && get_mode_size_bits(mode) < 32)
use_am = 0;
- new_op2 = try_create_Immediate(op2, 0);
+ new_op2 = (use_immediate ? try_create_Immediate(op2, 0) : NULL);
if(new_op2 == NULL && use_am && use_source_address_mode(block, op2, op1)) {
build_address(am, op2);
- new_op1 = be_transform_node(op1);
- new_op2 = noreg_gp;
+ new_op1 = (op1 == NULL ? NULL : be_transform_node(op1));
+ if(mode_is_float(mode)) {
+ new_op2 = ia32_new_NoReg_vfp(env_cg);
+ } else {
+ new_op2 = noreg_gp;
+ }
am->op_type = ia32_AddrModeS;
} else if(commutative && (new_op2 == NULL || use_am_and_immediates) &&
use_am && use_source_address_mode(block, op1, op2)) {
+ ir_node *noreg;
build_address(am, op1);
+
+ if(mode_is_float(mode)) {
+ noreg = ia32_new_NoReg_vfp(env_cg);
+ } else {
+ noreg = noreg_gp;
+ }
+
if(new_op2 != NULL) {
- new_op1 = noreg_gp;
+ new_op1 = noreg;
} else {
new_op1 = be_transform_node(op2);
- new_op2 = noreg_gp;
+ new_op2 = noreg;
am->flipped = 1;
}
am->op_type = ia32_AddrModeS;
} else {
- new_op1 = be_transform_node(op1);
+ new_op1 = (op1 == NULL ? NULL : be_transform_node(op1));
if(new_op2 == NULL)
new_op2 = be_transform_node(op2);
am->op_type = ia32_Normal;
* @return The constructed ia32 node.
*/
static ir_node *gen_binop_sse_float(ir_node *node, ir_node *op1, ir_node *op2,
- construct_binop_func *func)
+ construct_binop_func *func,
+ int commutative)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *new_op1 = be_transform_node(op1);
new_node = func(dbgi, irg, block, noreg_gp, noreg_gp, nomem, new_op1,
new_op2);
- if (is_op_commutative(get_irn_op(node))) {
+ if (commutative) {
set_ia32_commutative(new_node);
}
set_ia32_ls_mode(new_node, mode);
* @return The constructed ia32 node.
*/
static ir_node *gen_binop_x87_float(ir_node *node, ir_node *op1, ir_node *op2,
- construct_binop_float_func *func)
+ construct_binop_float_func *func,
+ int commutative)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *new_op1 = be_transform_node(op1);
- ir_node *new_op2 = be_transform_node(op2);
- ir_node *new_node = NULL;
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_graph *irg = current_ir_graph;
- ir_node *noreg_gp = ia32_new_NoReg_gp(env_cg);
- ir_node *nomem = new_NoMem();
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *src_block = get_nodes_block(node);
+ ir_node *new_block = be_transform_node(src_block);
+ ir_node *new_node;
+ ia32_address_mode_t am;
+ ia32_address_t *addr = &am.addr;
+ match_flags_t flags = 0;
- new_node = func(dbgi, irg, block, noreg_gp, noreg_gp, nomem, new_op1, new_op2,
- get_fpcw());
- if (is_op_commutative(get_irn_op(node))) {
- set_ia32_commutative(new_node);
- }
+ if(commutative)
+ flags |= match_commutative;
+
+ match_arguments(&am, src_block, op1, op2, flags);
+
+ new_node = func(dbgi, irg, new_block, addr->base, addr->index, addr->mem,
+ am.new_op1, am.new_op2, get_fpcw());
+ set_am_attributes(new_node, &am);
SET_IA32_ORIG_NODE(new_node, ia32_get_old_node_name(env_cg, node));
+ new_node = fix_mem_proj(new_node, &am);
+
return new_node;
}
if (mode_is_float(mode)) {
if (USE_SSE2(env_cg))
- return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xAdd);
+ return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xAdd, 1);
else
- return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfadd);
+ return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfadd, 1);
}
/**
if (mode_is_float(mode)) {
if (USE_SSE2(env_cg))
- return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xMul);
+ return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xMul, 1);
else
- return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfmul);
+ return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfmul, 1);
}
/*
if (mode_is_float(mode)) {
if (USE_SSE2(env_cg))
- return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xSub);
+ return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xSub, 0);
else
- return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfsub);
+ return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfsub, 0);
}
if(is_Const(op2)) {
*
* @return The created ia32 xDiv node
*/
-static ir_node *gen_Quot(ir_node *node) {
- ir_node *block = be_transform_node(get_nodes_block(node));
+static ir_node *gen_Quot(ir_node *node)
+{
ir_node *op1 = get_Quot_left(node);
- ir_node *new_op1 = be_transform_node(op1);
ir_node *op2 = get_Quot_right(node);
- ir_node *new_op2 = be_transform_node(op2);
- ir_graph *irg = current_ir_graph;
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *noreg = ia32_new_NoReg_gp(env_cg);
- ir_node *nomem = new_rd_NoMem(current_ir_graph);
- ir_node *new_op;
if (USE_SSE2(env_cg)) {
- ir_mode *mode = get_irn_mode(op1);
- new_op = new_rd_ia32_xDiv(dbgi, irg, block, noreg, noreg, nomem, new_op1,
- new_op2);
- set_ia32_ls_mode(new_op, mode);
+ return gen_binop_sse_float(node, op1, op2, new_rd_ia32_xDiv, 0);
} else {
- new_op = new_rd_ia32_vfdiv(dbgi, irg, block, noreg, noreg, nomem, new_op1,
- new_op2, get_fpcw());
+ return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfdiv, 0);
}
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
- return new_op;
}
/**
* Transforms a Minus node.
*
- * @param op The Minus operand
* @return The created ia32 Minus node
*/
-ir_node *gen_Minus_ex(ir_node *node, ir_node *op) {
+static ir_node *gen_Minus(ir_node *node)
+{
+ ir_node *op = get_Minus_op(node);
ir_node *block = be_transform_node(get_nodes_block(node));
ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
return res;
}
-/**
- * Transforms a Minus node.
- *
- * @return The created ia32 Minus node
- */
-static ir_node *gen_Minus(ir_node *node) {
- return gen_Minus_ex(node, get_Minus_op(node));
-}
-
-static ir_node *create_Immediate_from_int(int val)
-{
- ir_graph *irg = current_ir_graph;
- ir_node *start_block = get_irg_start_block(irg);
- ir_node *immediate = new_rd_ia32_Immediate(NULL, irg, start_block, NULL, 0, val);
- arch_set_irn_register(env_cg->arch_env, immediate, &ia32_gp_regs[REG_GP_NOREG]);
-
- return immediate;
-}
-
-static ir_node *gen_bin_Not(ir_node *node)
-{
- ir_graph *irg = current_ir_graph;
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *op = get_Not_op(node);
- ir_node *new_op = be_transform_node(op);
- ir_node *noreg = ia32_new_NoReg_gp(env_cg);
- ir_node *nomem = new_NoMem();
- ir_node *one = create_Immediate_from_int(1);
-
- return new_rd_ia32_Xor(dbgi, irg, block, noreg, noreg, nomem, new_op, one);
-}
-
/**
* Transforms a Not node.
*
ir_node *op = get_Not_op(node);
ir_mode *mode = get_irn_mode(node);
- if(mode == mode_b) {
- return gen_bin_Not(node);
- }
+ assert(mode != mode_b); /* should be lowered already */
assert (! mode_is_float(get_irn_mode(node)));
return gen_unop(node, op, new_rd_ia32_Not);
*
* @return The created ia32 Abs node
*/
-static ir_node *gen_Abs(ir_node *node) {
+static ir_node *gen_Abs(ir_node *node)
+{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *op = get_Abs_op(node);
ir_node *new_op = be_transform_node(op);
set_ia32_op_type(res, ia32_AddrModeS);
set_ia32_ls_mode(res, mode);
- }
- else {
+ } else {
res = new_rd_ia32_vfabs(dbgi, irg, block, new_op);
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env_cg, node));
}
/* create a conv node with address mode for smaller modes */
if(get_mode_size_bits(mode) < 32) {
- new_op = new_rd_ia32_Conv_I2I(dbgi, irg, block, base, index, new_mem,
- noreg, mode);
+ new_op = new_rd_ia32_Conv_I2I(dbgi, irg, block, base, index,
+ new_mem, noreg, mode);
} else {
new_op = new_rd_ia32_Load(dbgi, irg, block, base, index, new_mem);
}
if(!is_Const_0(cmp_right))
return NULL;
- if(is_And(cmp_left) && can_fold_test_and(node)) {
+ if(is_And(cmp_left) && get_irn_n_edges(cmp_left) == 1 &&
+ can_fold_test_and(node)) {
ir_node *and_left = get_And_left(cmp_left);
ir_node *and_right = get_And_right(cmp_left);
ir_node *left = get_Cmp_left(node);
ir_node *new_left = be_transform_node(left);
ir_node *right = get_Cmp_right(node);
- ir_node *new_right = be_transform_node(right);
+ ir_node *new_right;
ir_node *res;
- res = new_rd_ia32_vFucomFnstsw(dbgi, irg, new_block, new_left, new_right,
- 0);
+ if(transform_config.use_ftst && is_Const_null(right)) {
+ res = new_rd_ia32_vFtstFnstsw(dbgi, irg, new_block, new_left, 0);
+ } else {
+ new_right = be_transform_node(right);
+ res = new_rd_ia32_vFucomFnstsw(dbgi, irg, new_block, new_left,
+ new_right, 0);
+ }
+
set_ia32_commutative(res);
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env_cg, node));
return res;
}
+static ir_node *create_Immediate(ir_entity *symconst, int symconst_sign, long val)
+{
+ ir_graph *irg = current_ir_graph;
+ ir_node *start_block = get_irg_start_block(irg);
+ ir_node *immediate = new_rd_ia32_Immediate(NULL, irg, start_block,
+ symconst, symconst_sign, val);
+ arch_set_irn_register(env_cg->arch_env, immediate, &ia32_gp_regs[REG_GP_NOREG]);
+
+ return immediate;
+}
+
/**
* Create a conversion from general purpose to x87 register
*/
static ir_node *gen_x87_gp_to_fp(ir_node *node, ir_mode *src_mode) {
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *op = get_Conv_op(node);
- ir_node *new_op = be_transform_node(op);
- ir_graph *irg = current_ir_graph;
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *noreg = ia32_new_NoReg_gp(env_cg);
- ir_node *nomem = new_NoMem();
- ir_mode *mode = get_irn_mode(op);
- ir_mode *store_mode;
- ir_node *fild, *store;
- ir_node *res;
- int src_bits;
+ ir_node *src_block = get_nodes_block(node);
+ ir_node *block = be_transform_node(src_block);
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *op = get_Conv_op(node);
+ ir_node *new_op;
+ ir_node *noreg;
+ ir_node *nomem;
+ ir_mode *mode;
+ ir_mode *store_mode;
+ ir_node *fild;
+ ir_node *store;
+ ir_node *res;
+ int src_bits;
+
+ /* fild can use source AM if the operand is a signed 32bit integer */
+ if (src_mode == mode_Is) {
+ ia32_address_mode_t am;
+
+ match_arguments(&am, src_block, NULL, op, match_no_immediate);
+ if (am.op_type == ia32_AddrModeS) {
+ ia32_address_t *addr = &am.addr;
+
+ fild = new_rd_ia32_vfild(dbgi, irg, block, addr->base, addr->index, addr->mem);
+ res = new_r_Proj(irg, block, fild, mode_vfp, pn_ia32_vfild_res);
+
+ set_am_attributes(fild, &am);
+ SET_IA32_ORIG_NODE(fild, ia32_get_old_node_name(env_cg, node));
+
+ fix_mem_proj(fild, &am);
+
+ return res;
+ }
+ new_op = am.new_op2;
+ } else {
+ new_op = be_transform_node(op);
+ }
+
+ noreg = ia32_new_NoReg_gp(env_cg);
+ nomem = new_NoMem();
+ mode = get_irn_mode(op);
/* first convert to 32 bit signed if necessary */
src_bits = get_mode_size_bits(src_mode);
if(!mode_is_signed(mode)) {
ir_node *in[2];
/* store a zero */
- ir_node *zero_const = create_Immediate_from_int(0);
+ ir_node *zero_const = create_Immediate(NULL, 0, 0);
ir_node *zero_store = new_rd_ia32_Store(dbgi, irg, block,
get_irg_frame(irg), noreg, nomem,
new_op = noreg;
am.op_type = ia32_AddrModeS;
} else {
- new_op = be_transform_node(op);
+ new_op = be_transform_node(op);
am.op_type = ia32_Normal;
}
if(addr->base == NULL)
ir_node *cnst = NULL;
ir_node *symconst = NULL;
ir_node *res;
- ir_graph *irg;
- dbg_info *dbgi;
- ir_node *block;
mode = get_irn_mode(node);
if(!mode_is_int(mode) && !mode_is_reference(mode)) {
offset = tarval_neg(offset);
}
- irg = current_ir_graph;
- dbgi = get_irn_dbg_info(node);
- block = get_irg_start_block(irg);
- res = new_rd_ia32_Immediate(dbgi, irg, block, symconst_ent,
- symconst_sign, val);
- arch_set_irn_register(env_cg->arch_env, res, &ia32_gp_regs[REG_GP_NOREG]);
+ res = create_Immediate(symconst_ent, symconst_sign, val);
return res;
}
case 'y': /* we don't support mmx registers yet */
case 'Z': /* not available in 32 bit mode */
case 'e': /* not available in 32 bit mode */
- assert(0 && "asm constraint not supported");
+ panic("unsupported asm constraint '%c' found in (%+F)",
+ *c, current_ir_graph);
break;
default:
- assert(0 && "unknown asm constraint found");
+ panic("unknown asm constraint '%c' found in (%+F)", *c,
+ current_ir_graph);
break;
}
++c;
req->cls = other_constr->cls;
req->type = arch_register_req_type_should_be_same;
req->limited = NULL;
- req->other_same = pos;
+ req->other_same[0] = pos;
+ req->other_same[1] = -1;
req->other_different = -1;
/* switch constraints. This is because in firm we have same_as
static ir_node *gen_ia32_l_##op(ir_node *node) { \
ir_node *new_op; \
new_op = gen_binop_x87_float(node, get_binop_left(node), \
- get_binop_right(node), new_rd_ia32_##op); \
+ get_binop_right(node), new_rd_ia32_##op, 0); \
return new_op; \
}
return muls;
}
-static ir_node *gen_ia32_Add64Bit(ir_node *node)
-{
- ir_node *a_l = be_transform_node(get_irn_n(node, 0));
- ir_node *a_h = be_transform_node(get_irn_n(node, 1));
- ir_node *b_l = create_immediate_or_transform(get_irn_n(node, 2), 0);
- ir_node *b_h = create_immediate_or_transform(get_irn_n(node, 3), 0);
- ir_node *block = be_transform_node(get_nodes_block(node));
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_graph *irg = current_ir_graph;
- ir_node *new_op = new_rd_ia32_Add64Bit(dbgi, irg, block, a_l, a_h, b_l, b_h);
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
- return new_op;
+static ir_node *gen_ia32_l_Sub(ir_node *node) {
+ ir_node *left = get_irn_n(node, n_ia32_l_Sub_left);
+ ir_node *right = get_irn_n(node, n_ia32_l_Sub_right);
+ ir_node *lowered = gen_binop(node, left, right, new_rd_ia32_Sub, 0);
+
+ if(is_Proj(lowered)) {
+ lowered = get_Proj_pred(lowered);
+ } else {
+ assert(is_ia32_Sub(lowered));
+ set_irn_mode(lowered, mode_T);
+ }
+
+ return lowered;
}
-static ir_node *gen_ia32_Sub64Bit(ir_node *node)
-{
- ir_node *a_l = be_transform_node(get_irn_n(node, 0));
- ir_node *a_h = be_transform_node(get_irn_n(node, 1));
- ir_node *b_l = create_immediate_or_transform(get_irn_n(node, 2), 0);
- ir_node *b_h = create_immediate_or_transform(get_irn_n(node, 3), 0);
- ir_node *block = be_transform_node(get_nodes_block(node));
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_graph *irg = current_ir_graph;
- ir_node *new_op = new_rd_ia32_Sub64Bit(dbgi, irg, block, a_l, a_h, b_l, b_h);
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
- return new_op;
+static ir_node *gen_ia32_l_Sbb(ir_node *node) {
+ ir_node *src_block = get_nodes_block(node);
+ ir_node *block = be_transform_node(src_block);
+ ir_node *op1 = get_irn_n(node, n_ia32_l_Sbb_left);
+ ir_node *op2 = get_irn_n(node, n_ia32_l_Sbb_right);
+ ir_node *flags = get_irn_n(node, n_ia32_l_Sbb_eflags);
+ ir_node *new_flags = be_transform_node(flags);
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *new_node;
+ ia32_address_mode_t am;
+ ia32_address_t *addr = &am.addr;
+
+ match_arguments(&am, src_block, op1, op2, match_commutative);
+
+ new_node = new_rd_ia32_Sbb(dbgi, irg, block, addr->base, addr->index,
+ addr->mem, am.new_op1, am.new_op2, new_flags);
+ set_am_attributes(new_node, &am);
+ /* we can't use source address mode anymore when using immediates */
+ if(is_ia32_Immediate(am.new_op1) || is_ia32_Immediate(am.new_op2))
+ set_ia32_am_support(new_node, ia32_am_None, ia32_am_arity_none);
+ SET_IA32_ORIG_NODE(new_node, ia32_get_old_node_name(env_cg, node));
+
+ new_node = fix_mem_proj(new_node, &am);
+
+ return new_node;
}
/**
GEN(IJmp);
/* transform ops from intrinsic lowering */
- GEN(ia32_Add64Bit);
- GEN(ia32_Sub64Bit);
GEN(ia32_l_Add);
GEN(ia32_l_Adc);
GEN(ia32_l_Neg);
GEN(ia32_l_SarDep);
GEN(ia32_l_ShlD);
GEN(ia32_l_ShrD);
+ GEN(ia32_l_Sub);
+ GEN(ia32_l_Sbb);
GEN(ia32_l_vfdiv);
GEN(ia32_l_vfprem);
GEN(ia32_l_vfmul);
/* do the transformation */
void ia32_transform_graph(ia32_code_gen_t *cg) {
+ ir_graph *irg = cg->irg;
+
register_transformers();
env_cg = cg;
initial_fpcw = NULL;
- heights = heights_new(cg->irg);
+ heights = heights_new(irg);
+ calculate_non_address_mode_nodes(irg);
be_transform_graph(cg->birg, ia32_pretransform_node, cg);
+ free_non_address_mode_nodes();
heights_free(heights);
heights = NULL;
}
projects / libfirm / blobdiff