DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
/* try to optimize to inc/dec */
- if ((env->cg->opt & IA32_OPT_INCDEC) && tv) {
+ if ((env->cg->opt & IA32_OPT_INCDEC) && (get_ia32_op_type(const_op) == ia32_Const)) {
/* optimize tarvals */
class_tv = classify_tarval(tv);
class_negtv = classify_tarval(tarval_neg(tv));
}
set_ia32_pncode(res, get_Proj_proj(sel));
- set_ia32_am_support(res, ia32_am_Source);
+ //set_ia32_am_support(res, ia32_am_Source);
}
else {
/* determine the smallest switch case value */
set_ia32_am_support(res, ia32_am_Full);
set_ia32_commutative(res);
}
+ set_ia32_res_mode(res, tenv.mode);
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(tenv.cg, irn));
/* copy register */
arch_set_irn_register(cg->arch_env, res, out_reg);
set_ia32_op_type(res, ia32_Normal);
set_ia32_commutative(res);
+ set_ia32_res_mode(res, tenv.mode);
if (imm) {
set_ia32_cnst(res, offs);